drivers/gpu/drm/radeon/radeon_legacy_crtc.c

1007

WREG32_PLL_P(RADEON_VCLK_ECP_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

234

WREG32_PLL_P(RADEON_PPLL_REF_DIV,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

261

WREG32_PLL_P(RADEON_P2PLL_REF_DIV,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

854

WREG32_PLL_P(RADEON_PIXCLKS_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

858

WREG32_PLL_P(RADEON_P2PLL_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

866

WREG32_PLL_P(RADEON_P2PLL_REF_DIV,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

870

WREG32_PLL_P(RADEON_P2PLL_DIV_0,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

874

WREG32_PLL_P(RADEON_P2PLL_DIV_0,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

883

WREG32_PLL_P(RADEON_P2PLL_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

902

WREG32_PLL_P(RADEON_PIXCLKS_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

935

WREG32_PLL_P(RADEON_VCLK_ECP_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

938

WREG32_PLL_P(RADEON_PPLL_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

961

WREG32_PLL_P(RADEON_PPLL_REF_DIV,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

966

WREG32_PLL_P(RADEON_PPLL_REF_DIV,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

971

WREG32_PLL_P(RADEON_PPLL_REF_DIV,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

975

WREG32_PLL_P(RADEON_PPLL_DIV_3,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

979

WREG32_PLL_P(RADEON_PPLL_DIV_3,

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

988

WREG32_PLL_P(RADEON_PPLL_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

121

WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

758

WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVCLK_SRC_SEL_TVPLL);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

760

WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVPLL_RESET, ~RADEON_TVPLL_RESET);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

764

WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_RESET);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

769

WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~0xf);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

770

WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVCLK_SRC_SEL_TVPLL, ~RADEON_TVCLK_SRC_SEL_TVPLL);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

772

WREG32_PLL_P(RADEON_TV_PLL_CNTL1, (1 << RADEON_TVPDC_SHIFT), ~RADEON_TVPDC_MASK);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

773

WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_SLEEP);