drivers/accel/habanalabs/common/decoder.c

138

WREG32(dec->base_addr + VCMD_CONTROL_OFFSET, 0);

drivers/accel/habanalabs/common/decoder.c

60

WREG32(dec->base_addr + VCMD_IRQ_STATUS_OFFSET, irq_status);

drivers/accel/habanalabs/common/device.c

303

WREG32(addr - cfg_region->region_base, *val);

drivers/accel/habanalabs/common/device.c

312

WREG32(addr - cfg_region->region_base, lower_32_bits(*val));

drivers/accel/habanalabs/common/device.c

313

WREG32(addr + sizeof(u32) - cfg_region->region_base, upper_32_bits(*val));

drivers/accel/habanalabs/common/firmware_if.c

1381

WREG32(static_loader->kmd_msg_to_cpu_reg, KMD_MSG_RST_DEV);

drivers/accel/habanalabs/common/firmware_if.c

1420

WREG32(static_loader->kmd_msg_to_cpu_reg, KMD_MSG_GOTO_WFE);

drivers/accel/habanalabs/common/firmware_if.c

1426

WREG32(static_loader->kmd_msg_to_cpu_reg, KMD_MSG_NA);

drivers/accel/habanalabs/common/firmware_if.c

1816

WREG32(le32_to_cpu(dyn_regs->kmd_msg_to_cpu), val);

drivers/accel/habanalabs/common/firmware_if.c

2957

WREG32(cpu_msg_status_reg, CPU_MSG_CLR);

drivers/accel/habanalabs/common/firmware_if.c

2960

WREG32(msg_to_cpu_reg, KMD_MSG_FIT_RDY);

drivers/accel/habanalabs/common/firmware_if.c

2978

WREG32(msg_to_cpu_reg, KMD_MSG_NA);

drivers/accel/habanalabs/common/firmware_if.c

3039

WREG32(msg_to_cpu_reg, KMD_MSG_SKIP_BMC);

drivers/accel/habanalabs/common/firmware_if.c

3053

WREG32(msg_to_cpu_reg, KMD_MSG_NA);

drivers/accel/habanalabs/common/firmware_if.c

3059

WREG32(msg_to_cpu_reg, KMD_MSG_FIT_RDY);

drivers/accel/habanalabs/common/firmware_if.c

3070

WREG32(msg_to_cpu_reg, KMD_MSG_NA);

drivers/accel/habanalabs/common/habanalabs.h

2638

WREG32(reg, tmp_); \

drivers/accel/habanalabs/common/habanalabs.h

2652

WREG32(mm##reg + offset, (RREG32(mm##reg + offset) & \

drivers/accel/habanalabs/common/security.c

238

WREG32(block_base + HL_BLOCK_GLBL_ERR_CAUSE, cause);

drivers/accel/habanalabs/common/security.c

268

WREG32(sgs_base + j * sizeof(u32),

drivers/accel/habanalabs/common/security.c

710

WREG32(glbl_err_cause, cause_val);

drivers/accel/habanalabs/gaudi/gaudi.c

1131

WREG32((mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0 +

drivers/accel/habanalabs/gaudi/gaudi.c

1626

WREG32(mmNIC0_QM0_GLBL_CFG1, NIC0_QM0_GLBL_CFG1_PQF_STOP_MASK |

drivers/accel/habanalabs/gaudi/gaudi.c

1630

WREG32(mmNIC0_QM1_GLBL_CFG1, NIC0_QM0_GLBL_CFG1_PQF_STOP_MASK |

drivers/accel/habanalabs/gaudi/gaudi.c

1634

WREG32(mmNIC0_QM0_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

1635

WREG32(mmNIC0_QM1_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2081

WREG32(mmNIF_RTR_CTRL_0_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2083

WREG32(mmNIF_RTR_CTRL_1_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2085

WREG32(mmNIF_RTR_CTRL_2_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2087

WREG32(mmNIF_RTR_CTRL_3_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2089

WREG32(mmNIF_RTR_CTRL_4_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2091

WREG32(mmNIF_RTR_CTRL_5_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2093

WREG32(mmNIF_RTR_CTRL_6_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2095

WREG32(mmNIF_RTR_CTRL_7_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2098

WREG32(mmSIF_RTR_CTRL_0_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2100

WREG32(mmSIF_RTR_CTRL_1_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2102

WREG32(mmSIF_RTR_CTRL_2_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2104

WREG32(mmSIF_RTR_CTRL_3_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2106

WREG32(mmSIF_RTR_CTRL_4_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2108

WREG32(mmSIF_RTR_CTRL_5_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2110

WREG32(mmSIF_RTR_CTRL_6_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2112

WREG32(mmSIF_RTR_CTRL_7_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2115

WREG32(mmDMA_IF_E_N_DOWN_CH0_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2117

WREG32(mmDMA_IF_E_N_DOWN_CH1_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2119

WREG32(mmDMA_IF_E_S_DOWN_CH0_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2121

WREG32(mmDMA_IF_E_S_DOWN_CH1_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2123

WREG32(mmDMA_IF_W_N_DOWN_CH0_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2125

WREG32(mmDMA_IF_W_N_DOWN_CH1_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2127

WREG32(mmDMA_IF_W_S_DOWN_CH0_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2129

WREG32(mmDMA_IF_W_S_DOWN_CH1_SCRAM_SRAM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2149

WREG32(mmNIF_RTR_CTRL_0_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2151

WREG32(mmNIF_RTR_CTRL_1_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2153

WREG32(mmNIF_RTR_CTRL_2_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2155

WREG32(mmNIF_RTR_CTRL_3_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2157

WREG32(mmNIF_RTR_CTRL_4_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2159

WREG32(mmNIF_RTR_CTRL_5_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2161

WREG32(mmNIF_RTR_CTRL_6_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2163

WREG32(mmNIF_RTR_CTRL_7_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2166

WREG32(mmSIF_RTR_CTRL_0_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2168

WREG32(mmSIF_RTR_CTRL_1_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2170

WREG32(mmSIF_RTR_CTRL_2_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2172

WREG32(mmSIF_RTR_CTRL_3_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2174

WREG32(mmSIF_RTR_CTRL_4_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2176

WREG32(mmSIF_RTR_CTRL_5_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2178

WREG32(mmSIF_RTR_CTRL_6_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2180

WREG32(mmSIF_RTR_CTRL_7_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2183

WREG32(mmDMA_IF_E_N_DOWN_CH0_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2185

WREG32(mmDMA_IF_E_N_DOWN_CH1_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2187

WREG32(mmDMA_IF_E_S_DOWN_CH0_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2189

WREG32(mmDMA_IF_E_S_DOWN_CH1_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2191

WREG32(mmDMA_IF_W_N_DOWN_CH0_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2193

WREG32(mmDMA_IF_W_N_DOWN_CH1_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2195

WREG32(mmDMA_IF_W_S_DOWN_CH0_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2197

WREG32(mmDMA_IF_W_S_DOWN_CH1_SCRAM_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2212

WREG32(mmSIF_RTR_CTRL_0_E2E_HBM_WR_SIZE, 247 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2213

WREG32(mmSIF_RTR_CTRL_0_E2E_HBM_RD_SIZE, 785 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2214

WREG32(mmSIF_RTR_CTRL_0_E2E_PCI_WR_SIZE, 49);

drivers/accel/habanalabs/gaudi/gaudi.c

2215

WREG32(mmSIF_RTR_CTRL_0_E2E_PCI_RD_SIZE, 101);

drivers/accel/habanalabs/gaudi/gaudi.c

2217

WREG32(mmSIF_RTR_CTRL_1_E2E_HBM_WR_SIZE, 275 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2218

WREG32(mmSIF_RTR_CTRL_1_E2E_HBM_RD_SIZE, 614 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2219

WREG32(mmSIF_RTR_CTRL_1_E2E_PCI_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2220

WREG32(mmSIF_RTR_CTRL_1_E2E_PCI_RD_SIZE, 39);

drivers/accel/habanalabs/gaudi/gaudi.c

2222

WREG32(mmSIF_RTR_CTRL_2_E2E_HBM_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2223

WREG32(mmSIF_RTR_CTRL_2_E2E_HBM_RD_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2224

WREG32(mmSIF_RTR_CTRL_2_E2E_PCI_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2225

WREG32(mmSIF_RTR_CTRL_2_E2E_PCI_RD_SIZE, 32);

drivers/accel/habanalabs/gaudi/gaudi.c

2227

WREG32(mmSIF_RTR_CTRL_3_E2E_HBM_WR_SIZE, 176 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2228

WREG32(mmSIF_RTR_CTRL_3_E2E_HBM_RD_SIZE, 32 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2229

WREG32(mmSIF_RTR_CTRL_3_E2E_PCI_WR_SIZE, 19);

drivers/accel/habanalabs/gaudi/gaudi.c

2230

WREG32(mmSIF_RTR_CTRL_3_E2E_PCI_RD_SIZE, 32);

drivers/accel/habanalabs/gaudi/gaudi.c

2232

WREG32(mmSIF_RTR_CTRL_4_E2E_HBM_WR_SIZE, 176 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2233

WREG32(mmSIF_RTR_CTRL_4_E2E_HBM_RD_SIZE, 32 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2234

WREG32(mmSIF_RTR_CTRL_4_E2E_PCI_WR_SIZE, 19);

drivers/accel/habanalabs/gaudi/gaudi.c

2235

WREG32(mmSIF_RTR_CTRL_4_E2E_PCI_RD_SIZE, 32);

drivers/accel/habanalabs/gaudi/gaudi.c

2237

WREG32(mmSIF_RTR_CTRL_5_E2E_HBM_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2238

WREG32(mmSIF_RTR_CTRL_5_E2E_HBM_RD_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2239

WREG32(mmSIF_RTR_CTRL_5_E2E_PCI_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2240

WREG32(mmSIF_RTR_CTRL_5_E2E_PCI_RD_SIZE, 32);

drivers/accel/habanalabs/gaudi/gaudi.c

2242

WREG32(mmSIF_RTR_CTRL_6_E2E_HBM_WR_SIZE, 275 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2243

WREG32(mmSIF_RTR_CTRL_6_E2E_HBM_RD_SIZE, 614 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2244

WREG32(mmSIF_RTR_CTRL_6_E2E_PCI_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2245

WREG32(mmSIF_RTR_CTRL_6_E2E_PCI_RD_SIZE, 39);

drivers/accel/habanalabs/gaudi/gaudi.c

2247

WREG32(mmSIF_RTR_CTRL_7_E2E_HBM_WR_SIZE, 297 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2248

WREG32(mmSIF_RTR_CTRL_7_E2E_HBM_RD_SIZE, 908 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2249

WREG32(mmSIF_RTR_CTRL_7_E2E_PCI_WR_SIZE, 19);

drivers/accel/habanalabs/gaudi/gaudi.c

2250

WREG32(mmSIF_RTR_CTRL_7_E2E_PCI_RD_SIZE, 19);

drivers/accel/habanalabs/gaudi/gaudi.c

2252

WREG32(mmNIF_RTR_CTRL_0_E2E_HBM_WR_SIZE, 318 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2253

WREG32(mmNIF_RTR_CTRL_0_E2E_HBM_RD_SIZE, 956 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2254

WREG32(mmNIF_RTR_CTRL_0_E2E_PCI_WR_SIZE, 79);

drivers/accel/habanalabs/gaudi/gaudi.c

2255

WREG32(mmNIF_RTR_CTRL_0_E2E_PCI_RD_SIZE, 163);

drivers/accel/habanalabs/gaudi/gaudi.c

2257

WREG32(mmNIF_RTR_CTRL_1_E2E_HBM_WR_SIZE, 275 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2258

WREG32(mmNIF_RTR_CTRL_1_E2E_HBM_RD_SIZE, 614 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2259

WREG32(mmNIF_RTR_CTRL_1_E2E_PCI_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2260

WREG32(mmNIF_RTR_CTRL_1_E2E_PCI_RD_SIZE, 39);

drivers/accel/habanalabs/gaudi/gaudi.c

2262

WREG32(mmNIF_RTR_CTRL_2_E2E_HBM_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2263

WREG32(mmNIF_RTR_CTRL_2_E2E_HBM_RD_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2264

WREG32(mmNIF_RTR_CTRL_2_E2E_PCI_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2265

WREG32(mmNIF_RTR_CTRL_2_E2E_PCI_RD_SIZE, 32);

drivers/accel/habanalabs/gaudi/gaudi.c

2267

WREG32(mmNIF_RTR_CTRL_3_E2E_HBM_WR_SIZE, 176 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2268

WREG32(mmNIF_RTR_CTRL_3_E2E_HBM_RD_SIZE, 32 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2269

WREG32(mmNIF_RTR_CTRL_3_E2E_PCI_WR_SIZE, 19);

drivers/accel/habanalabs/gaudi/gaudi.c

2270

WREG32(mmNIF_RTR_CTRL_3_E2E_PCI_RD_SIZE, 32);

drivers/accel/habanalabs/gaudi/gaudi.c

2272

WREG32(mmNIF_RTR_CTRL_4_E2E_HBM_WR_SIZE, 176 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2273

WREG32(mmNIF_RTR_CTRL_4_E2E_HBM_RD_SIZE, 32 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2274

WREG32(mmNIF_RTR_CTRL_4_E2E_PCI_WR_SIZE, 19);

drivers/accel/habanalabs/gaudi/gaudi.c

2275

WREG32(mmNIF_RTR_CTRL_4_E2E_PCI_RD_SIZE, 32);

drivers/accel/habanalabs/gaudi/gaudi.c

2277

WREG32(mmNIF_RTR_CTRL_5_E2E_HBM_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2278

WREG32(mmNIF_RTR_CTRL_5_E2E_HBM_RD_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2279

WREG32(mmNIF_RTR_CTRL_5_E2E_PCI_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2280

WREG32(mmNIF_RTR_CTRL_5_E2E_PCI_RD_SIZE, 32);

drivers/accel/habanalabs/gaudi/gaudi.c

2282

WREG32(mmNIF_RTR_CTRL_6_E2E_HBM_WR_SIZE, 275 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2283

WREG32(mmNIF_RTR_CTRL_6_E2E_HBM_RD_SIZE, 614 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2284

WREG32(mmNIF_RTR_CTRL_6_E2E_PCI_WR_SIZE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

2285

WREG32(mmNIF_RTR_CTRL_6_E2E_PCI_RD_SIZE, 39);

drivers/accel/habanalabs/gaudi/gaudi.c

2287

WREG32(mmNIF_RTR_CTRL_7_E2E_HBM_WR_SIZE, 318 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2288

WREG32(mmNIF_RTR_CTRL_7_E2E_HBM_RD_SIZE, 956 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2289

WREG32(mmNIF_RTR_CTRL_7_E2E_PCI_WR_SIZE, 79);

drivers/accel/habanalabs/gaudi/gaudi.c

2290

WREG32(mmNIF_RTR_CTRL_7_E2E_PCI_RD_SIZE, 79);

drivers/accel/habanalabs/gaudi/gaudi.c

2292

WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_HBM_WR_SIZE, 344 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2293

WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_HBM_RD_SIZE, 1000 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2294

WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_PCI_WR_SIZE, 162);

drivers/accel/habanalabs/gaudi/gaudi.c

2295

WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_PCI_RD_SIZE, 338);

drivers/accel/habanalabs/gaudi/gaudi.c

2297

WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_HBM_WR_SIZE, 344 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2298

WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_HBM_RD_SIZE, 1000 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2299

WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_PCI_WR_SIZE, 162);

drivers/accel/habanalabs/gaudi/gaudi.c

2300

WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_PCI_RD_SIZE, 338);

drivers/accel/habanalabs/gaudi/gaudi.c

2302

WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_HBM_WR_SIZE, 344 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2303

WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_HBM_RD_SIZE, 1000 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2304

WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_PCI_WR_SIZE, 162);

drivers/accel/habanalabs/gaudi/gaudi.c

2305

WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_PCI_RD_SIZE, 338);

drivers/accel/habanalabs/gaudi/gaudi.c

2307

WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_HBM_WR_SIZE, 344 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2308

WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_HBM_RD_SIZE, 1000 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2309

WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_PCI_WR_SIZE, 162);

drivers/accel/habanalabs/gaudi/gaudi.c

2310

WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_PCI_RD_SIZE, 338);

drivers/accel/habanalabs/gaudi/gaudi.c

2312

WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_HBM_WR_SIZE, 344 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2313

WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_HBM_RD_SIZE, 1000 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2314

WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_PCI_WR_SIZE, 162);

drivers/accel/habanalabs/gaudi/gaudi.c

2315

WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_PCI_RD_SIZE, 338);

drivers/accel/habanalabs/gaudi/gaudi.c

2317

WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_HBM_WR_SIZE, 344 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2318

WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_HBM_RD_SIZE, 1000 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2319

WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_PCI_WR_SIZE, 162);

drivers/accel/habanalabs/gaudi/gaudi.c

2320

WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_PCI_RD_SIZE, 338);

drivers/accel/habanalabs/gaudi/gaudi.c

2322

WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_HBM_WR_SIZE, 344 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2323

WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_HBM_RD_SIZE, 1000 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2324

WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_PCI_WR_SIZE, 162);

drivers/accel/habanalabs/gaudi/gaudi.c

2325

WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_PCI_RD_SIZE, 338);

drivers/accel/habanalabs/gaudi/gaudi.c

2327

WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_HBM_WR_SIZE, 344 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2328

WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_HBM_RD_SIZE, 1000 >> 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2329

WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_PCI_WR_SIZE, 162);

drivers/accel/habanalabs/gaudi/gaudi.c

2330

WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_PCI_RD_SIZE, 338);

drivers/accel/habanalabs/gaudi/gaudi.c

2332

WREG32(mmSIF_RTR_CTRL_0_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2334

WREG32(mmSIF_RTR_CTRL_0_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2337

WREG32(mmSIF_RTR_CTRL_1_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2339

WREG32(mmSIF_RTR_CTRL_1_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2342

WREG32(mmSIF_RTR_CTRL_2_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2344

WREG32(mmSIF_RTR_CTRL_2_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2347

WREG32(mmSIF_RTR_CTRL_3_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2349

WREG32(mmSIF_RTR_CTRL_3_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2352

WREG32(mmSIF_RTR_CTRL_4_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2354

WREG32(mmSIF_RTR_CTRL_4_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2357

WREG32(mmSIF_RTR_CTRL_5_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2359

WREG32(mmSIF_RTR_CTRL_5_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2362

WREG32(mmSIF_RTR_CTRL_6_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2364

WREG32(mmSIF_RTR_CTRL_6_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2367

WREG32(mmSIF_RTR_CTRL_7_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2369

WREG32(mmSIF_RTR_CTRL_7_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2372

WREG32(mmNIF_RTR_CTRL_0_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2374

WREG32(mmNIF_RTR_CTRL_0_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2377

WREG32(mmNIF_RTR_CTRL_1_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2379

WREG32(mmNIF_RTR_CTRL_1_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2382

WREG32(mmNIF_RTR_CTRL_2_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2384

WREG32(mmNIF_RTR_CTRL_2_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2387

WREG32(mmNIF_RTR_CTRL_3_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2389

WREG32(mmNIF_RTR_CTRL_3_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2392

WREG32(mmNIF_RTR_CTRL_4_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2394

WREG32(mmNIF_RTR_CTRL_4_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2397

WREG32(mmNIF_RTR_CTRL_5_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2399

WREG32(mmNIF_RTR_CTRL_5_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2402

WREG32(mmNIF_RTR_CTRL_6_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2404

WREG32(mmNIF_RTR_CTRL_6_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2407

WREG32(mmNIF_RTR_CTRL_7_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2409

WREG32(mmNIF_RTR_CTRL_7_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2412

WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2414

WREG32(mmDMA_IF_E_N_DOWN_CH0_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2417

WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2419

WREG32(mmDMA_IF_E_N_DOWN_CH1_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2422

WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2424

WREG32(mmDMA_IF_E_S_DOWN_CH0_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2427

WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2429

WREG32(mmDMA_IF_E_S_DOWN_CH1_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2432

WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2434

WREG32(mmDMA_IF_W_N_DOWN_CH0_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2437

WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2439

WREG32(mmDMA_IF_W_N_DOWN_CH1_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2442

WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2444

WREG32(mmDMA_IF_W_S_DOWN_CH0_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2447

WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_HBM_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2449

WREG32(mmDMA_IF_W_S_DOWN_CH1_E2E_PCI_EN,

drivers/accel/habanalabs/gaudi/gaudi.c

2469

WREG32(mmDMA_IF_E_N_HBM0_WR_CRED_CNT, hbm0_wr);

drivers/accel/habanalabs/gaudi/gaudi.c

2470

WREG32(mmDMA_IF_E_N_HBM1_WR_CRED_CNT, hbm1_wr);

drivers/accel/habanalabs/gaudi/gaudi.c

2471

WREG32(mmDMA_IF_E_N_HBM0_RD_CRED_CNT, hbm0_rd);

drivers/accel/habanalabs/gaudi/gaudi.c

2472

WREG32(mmDMA_IF_E_N_HBM1_RD_CRED_CNT, hbm1_rd);

drivers/accel/habanalabs/gaudi/gaudi.c

2474

WREG32(mmDMA_IF_E_S_HBM0_WR_CRED_CNT, hbm0_wr);

drivers/accel/habanalabs/gaudi/gaudi.c

2475

WREG32(mmDMA_IF_E_S_HBM1_WR_CRED_CNT, hbm1_wr);

drivers/accel/habanalabs/gaudi/gaudi.c

2476

WREG32(mmDMA_IF_E_S_HBM0_RD_CRED_CNT, hbm0_rd);

drivers/accel/habanalabs/gaudi/gaudi.c

2477

WREG32(mmDMA_IF_E_S_HBM1_RD_CRED_CNT, hbm1_rd);

drivers/accel/habanalabs/gaudi/gaudi.c

2479

WREG32(mmDMA_IF_W_N_HBM0_WR_CRED_CNT, hbm0_wr);

drivers/accel/habanalabs/gaudi/gaudi.c

2480

WREG32(mmDMA_IF_W_N_HBM1_WR_CRED_CNT, hbm1_wr);

drivers/accel/habanalabs/gaudi/gaudi.c

2481

WREG32(mmDMA_IF_W_N_HBM0_RD_CRED_CNT, hbm0_rd);

drivers/accel/habanalabs/gaudi/gaudi.c

2482

WREG32(mmDMA_IF_W_N_HBM1_RD_CRED_CNT, hbm1_rd);

drivers/accel/habanalabs/gaudi/gaudi.c

2484

WREG32(mmDMA_IF_W_S_HBM0_WR_CRED_CNT, hbm0_wr);

drivers/accel/habanalabs/gaudi/gaudi.c

2485

WREG32(mmDMA_IF_W_S_HBM1_WR_CRED_CNT, hbm1_wr);

drivers/accel/habanalabs/gaudi/gaudi.c

2486

WREG32(mmDMA_IF_W_S_HBM0_RD_CRED_CNT, hbm0_rd);

drivers/accel/habanalabs/gaudi/gaudi.c

2487

WREG32(mmDMA_IF_W_S_HBM1_RD_CRED_CNT, hbm1_rd);

drivers/accel/habanalabs/gaudi/gaudi.c

2489

WREG32(mmDMA_IF_E_N_HBM_CRED_EN_0,

drivers/accel/habanalabs/gaudi/gaudi.c

2492

WREG32(mmDMA_IF_E_S_HBM_CRED_EN_0,

drivers/accel/habanalabs/gaudi/gaudi.c

2495

WREG32(mmDMA_IF_W_N_HBM_CRED_EN_0,

drivers/accel/habanalabs/gaudi/gaudi.c

2498

WREG32(mmDMA_IF_W_S_HBM_CRED_EN_0,

drivers/accel/habanalabs/gaudi/gaudi.c

2502

WREG32(mmDMA_IF_E_N_HBM_CRED_EN_1,

drivers/accel/habanalabs/gaudi/gaudi.c

2505

WREG32(mmDMA_IF_E_S_HBM_CRED_EN_1,

drivers/accel/habanalabs/gaudi/gaudi.c

2508

WREG32(mmDMA_IF_W_N_HBM_CRED_EN_1,

drivers/accel/habanalabs/gaudi/gaudi.c

2511

WREG32(mmDMA_IF_W_S_HBM_CRED_EN_1,

drivers/accel/habanalabs/gaudi/gaudi.c

2528

WREG32(mmTPC0_CFG_TPC_INTR_MASK + tpc_offset, 0x8FFE);

drivers/accel/habanalabs/gaudi/gaudi.c

2538

WREG32(mmMME0_CTRL_EUS_ROLLUP_CNT_ADD, 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2539

WREG32(mmMME1_CTRL_EUS_ROLLUP_CNT_ADD, 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2540

WREG32(mmMME2_CTRL_EUS_ROLLUP_CNT_ADD, 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2541

WREG32(mmMME3_CTRL_EUS_ROLLUP_CNT_ADD, 3);

drivers/accel/habanalabs/gaudi/gaudi.c

2575

WREG32(mmDMA0_QM_PQ_BASE_LO_0 + q_off, lower_32_bits(qman_pq_addr));

drivers/accel/habanalabs/gaudi/gaudi.c

2576

WREG32(mmDMA0_QM_PQ_BASE_HI_0 + q_off, upper_32_bits(qman_pq_addr));

drivers/accel/habanalabs/gaudi/gaudi.c

2578

WREG32(mmDMA0_QM_PQ_SIZE_0 + q_off, ilog2(HL_QUEUE_LENGTH));

drivers/accel/habanalabs/gaudi/gaudi.c

2579

WREG32(mmDMA0_QM_PQ_PI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2580

WREG32(mmDMA0_QM_PQ_CI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2582

WREG32(mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off, QMAN_LDMA_SIZE_OFFSET);

drivers/accel/habanalabs/gaudi/gaudi.c

2583

WREG32(mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2585

WREG32(mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2588

WREG32(mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_0 + q_off, mtr_base_en_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

2589

WREG32(mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_0 + q_off, mtr_base_en_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

2590

WREG32(mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_0 + q_off, so_base_en_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

2591

WREG32(mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_0 + q_off, so_base_en_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

2592

WREG32(mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_0 + q_off, mtr_base_ws_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

2593

WREG32(mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 + q_off, mtr_base_ws_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

2594

WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 + q_off, so_base_ws_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

2595

WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_0 + q_off, so_base_ws_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

2597

WREG32(mmDMA0_QM_CP_BARRIER_CFG_0 + q_off, 0x100);

drivers/accel/habanalabs/gaudi/gaudi.c

2611

WREG32(mmDMA0_QM_GLBL_ERR_CFG + dma_qm_offset, dma_qm_err_cfg);

drivers/accel/habanalabs/gaudi/gaudi.c

2613

WREG32(mmDMA0_QM_GLBL_ERR_ADDR_LO + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2615

WREG32(mmDMA0_QM_GLBL_ERR_ADDR_HI + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2618

WREG32(mmDMA0_QM_GLBL_ERR_WDATA + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2622

WREG32(mmDMA0_QM_ARB_ERR_MSG_EN + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2626

WREG32(mmDMA0_QM_ARB_SLV_CHOISE_WDT + dma_qm_offset, GAUDI_ARB_WDT_TIMEOUT);

drivers/accel/habanalabs/gaudi/gaudi.c

2628

WREG32(mmDMA0_QM_GLBL_PROT + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2631

WREG32(mmDMA0_QM_GLBL_CFG1 + dma_qm_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2644

WREG32(mmDMA0_CORE_RD_MAX_OUTSTAND + dma_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2645

WREG32(mmDMA0_CORE_RD_MAX_SIZE + dma_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2648

WREG32(mmDMA0_CORE_LBW_MAX_OUTSTAND + dma_offset, 15);

drivers/accel/habanalabs/gaudi/gaudi.c

2654

WREG32(mmDMA0_CORE_ERR_CFG + dma_offset, dma_err_cfg);

drivers/accel/habanalabs/gaudi/gaudi.c

2660

WREG32(mmDMA0_CORE_ERRMSG_ADDR_LO + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2662

WREG32(mmDMA0_CORE_ERRMSG_ADDR_HI + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2665

WREG32(mmDMA0_CORE_ERRMSG_WDATA + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2667

WREG32(mmDMA0_CORE_PROT + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2670

WREG32(mmDMA0_CORE_SECURE_PROPS + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2672

WREG32(mmDMA0_CORE_CFG_0 + dma_offset, 1 << DMA0_CORE_CFG_0_EN_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

2680

WREG32(mmDMA0_QM_GLBL_CFG0 + dma_qm_offset, enable_mask);

drivers/accel/habanalabs/gaudi/gaudi.c

2756

WREG32(mmDMA0_QM_PQ_BASE_LO_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2758

WREG32(mmDMA0_QM_PQ_BASE_HI_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2761

WREG32(mmDMA0_QM_PQ_SIZE_0 + q_off, ilog2(HBM_DMA_QMAN_LENGTH));

drivers/accel/habanalabs/gaudi/gaudi.c

2762

WREG32(mmDMA0_QM_PQ_PI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2763

WREG32(mmDMA0_QM_PQ_CI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2765

WREG32(mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2767

WREG32(mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2769

WREG32(mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2776

WREG32(mmDMA0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2778

WREG32(mmDMA0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2780

WREG32(mmDMA0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2789

WREG32(mmDMA0_QM_GLBL_ERR_CFG + dma_qm_offset, dma_qm_err_cfg);

drivers/accel/habanalabs/gaudi/gaudi.c

2791

WREG32(mmDMA0_QM_GLBL_ERR_ADDR_LO + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2793

WREG32(mmDMA0_QM_GLBL_ERR_ADDR_HI + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2796

WREG32(mmDMA0_QM_GLBL_ERR_WDATA + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2800

WREG32(mmDMA0_QM_ARB_ERR_MSG_EN + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2804

WREG32(mmDMA0_QM_ARB_SLV_CHOISE_WDT + dma_qm_offset, GAUDI_ARB_WDT_TIMEOUT);

drivers/accel/habanalabs/gaudi/gaudi.c

2806

WREG32(mmDMA0_QM_GLBL_CFG1 + dma_qm_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2807

WREG32(mmDMA0_QM_GLBL_PROT + dma_qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2811

WREG32(mmDMA0_QM_CP_MSG_BASE0_ADDR_LO_0 + q_off, mtr_base_en_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

2812

WREG32(mmDMA0_QM_CP_MSG_BASE0_ADDR_HI_0 + q_off, mtr_base_en_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

2813

WREG32(mmDMA0_QM_CP_MSG_BASE1_ADDR_LO_0 + q_off, so_base_en_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

2814

WREG32(mmDMA0_QM_CP_MSG_BASE1_ADDR_HI_0 + q_off, so_base_en_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

2818

WREG32(mmDMA0_QM_CP_MSG_BASE2_ADDR_LO_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2820

WREG32(mmDMA0_QM_CP_MSG_BASE2_ADDR_HI_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2822

WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2824

WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2889

WREG32(mmMME0_QM_PQ_BASE_LO_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2891

WREG32(mmMME0_QM_PQ_BASE_HI_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2894

WREG32(mmMME0_QM_PQ_SIZE_0 + q_off, ilog2(MME_QMAN_LENGTH));

drivers/accel/habanalabs/gaudi/gaudi.c

2895

WREG32(mmMME0_QM_PQ_PI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2896

WREG32(mmMME0_QM_PQ_CI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2898

WREG32(mmMME0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2900

WREG32(mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2902

WREG32(mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2909

WREG32(mmMME0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2911

WREG32(mmMME0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2913

WREG32(mmMME0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

2925

WREG32(mmMME0_QM_GLBL_ERR_CFG + mme_offset, mme_qm_err_cfg);

drivers/accel/habanalabs/gaudi/gaudi.c

2927

WREG32(mmMME0_QM_GLBL_ERR_ADDR_LO + mme_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2929

WREG32(mmMME0_QM_GLBL_ERR_ADDR_HI + mme_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2932

WREG32(mmMME0_QM_GLBL_ERR_WDATA + mme_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2936

WREG32(mmMME0_QM_ARB_ERR_MSG_EN + mme_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2940

WREG32(mmMME0_QM_ARB_SLV_CHOISE_WDT + mme_offset, GAUDI_ARB_WDT_TIMEOUT);

drivers/accel/habanalabs/gaudi/gaudi.c

2942

WREG32(mmMME0_QM_GLBL_CFG1 + mme_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

2943

WREG32(mmMME0_QM_GLBL_PROT + mme_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

2947

WREG32(mmMME0_QM_CP_MSG_BASE0_ADDR_LO_0 + q_off, mtr_base_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

2948

WREG32(mmMME0_QM_CP_MSG_BASE0_ADDR_HI_0 + q_off, mtr_base_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

2949

WREG32(mmMME0_QM_CP_MSG_BASE1_ADDR_LO_0 + q_off, so_base_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

2950

WREG32(mmMME0_QM_CP_MSG_BASE1_ADDR_HI_0 + q_off, so_base_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

2986

WREG32(mmMME2_QM_GLBL_CFG0, QMAN_MME_ENABLE);

drivers/accel/habanalabs/gaudi/gaudi.c

2987

WREG32(mmMME0_QM_GLBL_CFG0, QMAN_MME_ENABLE);

drivers/accel/habanalabs/gaudi/gaudi.c

3025

WREG32(mmTPC0_QM_PQ_BASE_LO_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3027

WREG32(mmTPC0_QM_PQ_BASE_HI_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3030

WREG32(mmTPC0_QM_PQ_SIZE_0 + q_off, ilog2(TPC_QMAN_LENGTH));

drivers/accel/habanalabs/gaudi/gaudi.c

3031

WREG32(mmTPC0_QM_PQ_PI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3032

WREG32(mmTPC0_QM_PQ_CI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3034

WREG32(mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3036

WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3038

WREG32(mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3045

WREG32(mmTPC0_QM_CP_LDMA_TSIZE_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3047

WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3049

WREG32(mmTPC0_QM_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3058

WREG32(mmTPC0_QM_GLBL_ERR_CFG + tpc_offset, tpc_qm_err_cfg);

drivers/accel/habanalabs/gaudi/gaudi.c

3060

WREG32(mmTPC0_QM_GLBL_ERR_ADDR_LO + tpc_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3062

WREG32(mmTPC0_QM_GLBL_ERR_ADDR_HI + tpc_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3065

WREG32(mmTPC0_QM_GLBL_ERR_WDATA + tpc_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3069

WREG32(mmTPC0_QM_ARB_ERR_MSG_EN + tpc_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3073

WREG32(mmTPC0_QM_ARB_SLV_CHOISE_WDT + tpc_offset, GAUDI_ARB_WDT_TIMEOUT);

drivers/accel/habanalabs/gaudi/gaudi.c

3075

WREG32(mmTPC0_QM_GLBL_CFG1 + tpc_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3076

WREG32(mmTPC0_QM_GLBL_PROT + tpc_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3080

WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_LO_0 + q_off, mtr_base_en_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

3081

WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_HI_0 + q_off, mtr_base_en_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

3082

WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_LO_0 + q_off, so_base_en_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

3083

WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_HI_0 + q_off, so_base_en_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

3087

WREG32(mmTPC0_QM_CP_MSG_BASE2_ADDR_LO_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3089

WREG32(mmTPC0_QM_CP_MSG_BASE2_ADDR_HI_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3091

WREG32(mmTPC0_QM_CP_MSG_BASE3_ADDR_LO_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3093

WREG32(mmTPC0_QM_CP_MSG_BASE3_ADDR_HI_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3128

WREG32(mmTPC0_QM_GLBL_CFG0 + tpc_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3133

WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_HIGH + tpc_id * tpc_delta,

drivers/accel/habanalabs/gaudi/gaudi.c

3172

WREG32(mmNIC0_QM0_PQ_BASE_LO_0 + q_off, lower_32_bits(qman_base_addr));

drivers/accel/habanalabs/gaudi/gaudi.c

3173

WREG32(mmNIC0_QM0_PQ_BASE_HI_0 + q_off, upper_32_bits(qman_base_addr));

drivers/accel/habanalabs/gaudi/gaudi.c

3175

WREG32(mmNIC0_QM0_PQ_SIZE_0 + q_off, ilog2(NIC_QMAN_LENGTH));

drivers/accel/habanalabs/gaudi/gaudi.c

3176

WREG32(mmNIC0_QM0_PQ_PI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3177

WREG32(mmNIC0_QM0_PQ_CI_0 + q_off, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3179

WREG32(mmNIC0_QM0_CP_LDMA_TSIZE_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3181

WREG32(mmNIC0_QM0_CP_LDMA_SRC_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3183

WREG32(mmNIC0_QM0_CP_LDMA_DST_BASE_LO_OFFSET_0 + q_off,

drivers/accel/habanalabs/gaudi/gaudi.c

3186

WREG32(mmNIC0_QM0_CP_MSG_BASE0_ADDR_LO_0 + q_off, mtr_base_en_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

3187

WREG32(mmNIC0_QM0_CP_MSG_BASE0_ADDR_HI_0 + q_off, mtr_base_en_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

3188

WREG32(mmNIC0_QM0_CP_MSG_BASE1_ADDR_LO_0 + q_off, so_base_en_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

3189

WREG32(mmNIC0_QM0_CP_MSG_BASE1_ADDR_HI_0 + q_off, so_base_en_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

3192

WREG32(mmNIC0_QM0_CP_MSG_BASE2_ADDR_LO_0 + q_off, mtr_base_ws_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

3193

WREG32(mmNIC0_QM0_CP_MSG_BASE2_ADDR_HI_0 + q_off, mtr_base_ws_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

3194

WREG32(mmNIC0_QM0_CP_MSG_BASE3_ADDR_LO_0 + q_off, so_base_ws_lo);

drivers/accel/habanalabs/gaudi/gaudi.c

3195

WREG32(mmNIC0_QM0_CP_MSG_BASE3_ADDR_HI_0 + q_off, so_base_ws_hi);

drivers/accel/habanalabs/gaudi/gaudi.c

3208

WREG32(mmNIC0_QM0_GLBL_ERR_CFG + nic_offset, nic_qm_err_cfg);

drivers/accel/habanalabs/gaudi/gaudi.c

3210

WREG32(mmNIC0_QM0_GLBL_ERR_ADDR_LO + nic_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3212

WREG32(mmNIC0_QM0_GLBL_ERR_ADDR_HI + nic_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3215

WREG32(mmNIC0_QM0_GLBL_ERR_WDATA + nic_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3219

WREG32(mmNIC0_QM0_ARB_ERR_MSG_EN + nic_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3223

WREG32(mmNIC0_QM0_ARB_SLV_CHOISE_WDT + nic_offset, GAUDI_ARB_WDT_TIMEOUT);

drivers/accel/habanalabs/gaudi/gaudi.c

3225

WREG32(mmNIC0_QM0_GLBL_CFG1 + nic_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3226

WREG32(mmNIC0_QM0_GLBL_PROT + nic_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3271

WREG32(mmNIC0_QM0_GLBL_CFG0 + nic_offset, NIC_QMAN_ENABLE);

drivers/accel/habanalabs/gaudi/gaudi.c

3290

WREG32(mmDMA0_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3291

WREG32(mmDMA1_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3292

WREG32(mmDMA5_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3302

WREG32(mmDMA2_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3303

WREG32(mmDMA3_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3304

WREG32(mmDMA4_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3305

WREG32(mmDMA6_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3306

WREG32(mmDMA7_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3316

WREG32(mmMME2_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3317

WREG32(mmMME0_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3330

WREG32(mmTPC0_QM_GLBL_CFG0 + tpc_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3349

WREG32(mmNIC0_QM0_GLBL_CFG0 + nic_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3367

WREG32(mmDMA0_QM_GLBL_CFG1, 0xF << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3368

WREG32(mmDMA1_QM_GLBL_CFG1, 0xF << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3369

WREG32(mmDMA5_QM_GLBL_CFG1, 0xF << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3381

WREG32(mmDMA2_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3382

WREG32(mmDMA3_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3383

WREG32(mmDMA4_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3384

WREG32(mmDMA6_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3385

WREG32(mmDMA7_QM_GLBL_CFG1, 0x1F << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3396

WREG32(mmMME2_QM_GLBL_CFG1, 0x1F << MME0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3397

WREG32(mmMME0_QM_GLBL_CFG1, 0x1F << MME0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3407

WREG32(mmTPC0_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3408

WREG32(mmTPC1_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3409

WREG32(mmTPC2_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3410

WREG32(mmTPC3_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3411

WREG32(mmTPC4_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3412

WREG32(mmTPC5_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3413

WREG32(mmTPC6_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3414

WREG32(mmTPC7_QM_GLBL_CFG1, 0x1F << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3424

WREG32(mmNIC0_QM0_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3430

WREG32(mmNIC0_QM1_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3436

WREG32(mmNIC1_QM0_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3442

WREG32(mmNIC1_QM1_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3448

WREG32(mmNIC2_QM0_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3454

WREG32(mmNIC2_QM1_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3460

WREG32(mmNIC3_QM0_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3466

WREG32(mmNIC3_QM1_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3472

WREG32(mmNIC4_QM0_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3478

WREG32(mmNIC4_QM1_GLBL_CFG1,

drivers/accel/habanalabs/gaudi/gaudi.c

3491

WREG32(mmDMA0_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3492

WREG32(mmDMA1_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3493

WREG32(mmDMA5_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3503

WREG32(mmDMA2_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3504

WREG32(mmDMA3_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3505

WREG32(mmDMA4_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3506

WREG32(mmDMA6_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3507

WREG32(mmDMA7_CORE_CFG_1, 1 << DMA0_CORE_CFG_1_HALT_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3518

WREG32(mmMME0_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3519

WREG32(mmMME0_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3520

WREG32(mmMME0_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3521

WREG32(mmMME0_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3522

WREG32(mmMME1_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3523

WREG32(mmMME1_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3524

WREG32(mmMME1_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3525

WREG32(mmMME1_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3526

WREG32(mmMME2_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3527

WREG32(mmMME2_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3528

WREG32(mmMME2_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3529

WREG32(mmMME2_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3530

WREG32(mmMME3_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3531

WREG32(mmMME3_ACC_ACC_STALL, 1 << MME_ACC_ACC_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3532

WREG32(mmMME3_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3533

WREG32(mmMME3_SBAB_SB_STALL, 1 << MME_SBAB_SB_STALL_R_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3543

WREG32(mmTPC0_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3544

WREG32(mmTPC1_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3545

WREG32(mmTPC2_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3546

WREG32(mmTPC3_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3547

WREG32(mmTPC4_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3548

WREG32(mmTPC5_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3549

WREG32(mmTPC6_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3550

WREG32(mmTPC7_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

3562

WREG32(mmDMA0_QM_CGM_CFG + qman_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3563

WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3568

WREG32(mmMME0_QM_CGM_CFG, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3569

WREG32(mmMME0_QM_CGM_CFG1, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3570

WREG32(mmMME2_QM_CGM_CFG, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3571

WREG32(mmMME2_QM_CGM_CFG1, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3574

WREG32(mmTPC0_QM_CGM_CFG + qman_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3575

WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3584

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3587

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3588

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3591

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

3597

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3662

WREG32(mmSTLB_CACHE_INV_BASE_39_8, prop->mmu_cache_mng_addr >> 8);

drivers/accel/habanalabs/gaudi/gaudi.c

3663

WREG32(mmSTLB_CACHE_INV_BASE_49_40, prop->mmu_cache_mng_addr >> 40);

drivers/accel/habanalabs/gaudi/gaudi.c

3666

WREG32(mmSTLB_MEM_CACHE_INVALIDATION, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

3672

WREG32(mmMMU_UP_MMU_ENABLE, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

3673

WREG32(mmMMU_UP_SPI_MASK, 0xF);

drivers/accel/habanalabs/gaudi/gaudi.c

3675

WREG32(mmSTLB_HOP_CONFIGURATION, 0x30440);

drivers/accel/habanalabs/gaudi/gaudi.c

3801

WREG32(mmCPU_IF_CPU_MSB_ADDR, hdev->cpu_pci_msb_addr);

drivers/accel/habanalabs/gaudi/gaudi.c

3833

WREG32(mmCPU_IF_PQ_BASE_ADDR_LOW, lower_32_bits(cpu_pq->bus_address));

drivers/accel/habanalabs/gaudi/gaudi.c

3834

WREG32(mmCPU_IF_PQ_BASE_ADDR_HIGH, upper_32_bits(cpu_pq->bus_address));

drivers/accel/habanalabs/gaudi/gaudi.c

3836

WREG32(mmCPU_IF_EQ_BASE_ADDR_LOW, lower_32_bits(eq->bus_address));

drivers/accel/habanalabs/gaudi/gaudi.c

3837

WREG32(mmCPU_IF_EQ_BASE_ADDR_HIGH, upper_32_bits(eq->bus_address));

drivers/accel/habanalabs/gaudi/gaudi.c

3839

WREG32(mmCPU_IF_CQ_BASE_ADDR_LOW,

drivers/accel/habanalabs/gaudi/gaudi.c

3841

WREG32(mmCPU_IF_CQ_BASE_ADDR_HIGH,

drivers/accel/habanalabs/gaudi/gaudi.c

3844

WREG32(mmCPU_IF_PQ_LENGTH, HL_QUEUE_SIZE_IN_BYTES);

drivers/accel/habanalabs/gaudi/gaudi.c

3845

WREG32(mmCPU_IF_EQ_LENGTH, HL_EQ_SIZE_IN_BYTES);

drivers/accel/habanalabs/gaudi/gaudi.c

3846

WREG32(mmCPU_IF_CQ_LENGTH, HL_CPU_ACCESSIBLE_MEM_SIZE);

drivers/accel/habanalabs/gaudi/gaudi.c

3849

WREG32(mmCPU_IF_EQ_RD_OFFS, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3851

WREG32(mmCPU_IF_PF_PQ_PI, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

3853

WREG32(mmCPU_IF_QUEUE_INIT, PQ_INIT_STATUS_READY_FOR_CP_SINGLE_MSI);

drivers/accel/habanalabs/gaudi/gaudi.c

3859

WREG32(irq_handler_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

3895

WREG32(mmPCIE_WRAP_LBW_PROT_OVR,

drivers/accel/habanalabs/gaudi/gaudi.c

3911

WREG32(mmHW_STATE, HL_DEVICE_HW_STATE_DIRTY);

drivers/accel/habanalabs/gaudi/gaudi.c

4038

WREG32(mmPCIE_AUX_FLR_CTRL, (PCIE_AUX_FLR_CTRL_HW_CTRL_MASK |

drivers/accel/habanalabs/gaudi/gaudi.c

4050

WREG32(irq_handler_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

4082

WREG32(mmPSOC_GLOBAL_CONF_SOFT_RST_CFG_H,

drivers/accel/habanalabs/gaudi/gaudi.c

4088

WREG32(mmPSOC_GLOBAL_CONF_SOFT_RST_CFG_L, CFG_RST_L_TPC_MASK);

drivers/accel/habanalabs/gaudi/gaudi.c

4090

WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG_H,

drivers/accel/habanalabs/gaudi/gaudi.c

4100

WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG_L,

drivers/accel/habanalabs/gaudi/gaudi.c

4108

WREG32(mmPREBOOT_PCIE_EN, LKD_HARD_RESET_MAGIC);

drivers/accel/habanalabs/gaudi/gaudi.c

4111

WREG32(mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START, 1);

drivers/accel/habanalabs/gaudi/gaudi.c

4113

WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST,

drivers/accel/habanalabs/gaudi/gaudi.c

4524

WREG32(db_reg_offset, db_value);

drivers/accel/habanalabs/gaudi/gaudi.c

4534

WREG32(irq_handler_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

4589

WREG32(mmDMA0_CORE_SRC_BASE_LO + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

4591

WREG32(mmDMA0_CORE_SRC_BASE_HI + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

4593

WREG32(mmDMA0_CORE_DST_BASE_LO + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

4595

WREG32(mmDMA0_CORE_DST_BASE_HI + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

4597

WREG32(mmDMA0_CORE_DST_TSIZE_0 + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

4599

WREG32(mmDMA0_CORE_COMMIT + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

5577

WREG32(mmCPU_IF_EQ_RD_OFFS, val);

drivers/accel/habanalabs/gaudi/gaudi.c

5621

WREG32(mmDMA0_CORE_ERR_CAUSE, err_cause);

drivers/accel/habanalabs/gaudi/gaudi.c

5648

WREG32(mmDMA0_CORE_ERR_CAUSE, err_cause);

drivers/accel/habanalabs/gaudi/gaudi.c

5809

WREG32(mmDMA0_CORE_WR_COMP_ADDR_LO + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

5811

WREG32(mmDMA0_CORE_WR_COMP_ADDR_HI + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

5813

WREG32(mmDMA0_CORE_WR_COMP_WDATA + dma_offset, 0x80000001);

drivers/accel/habanalabs/gaudi/gaudi.c

5819

WREG32(mmDMA0_CORE_WR_AWUSER_31_11 + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

5831

WREG32(mmDMA0_QM_ARB_CFG_0 + qman_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

5836

WREG32(mmMME0_QM_ARB_CFG_0 + qman_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

5841

WREG32(mmTPC0_QM_ARB_CFG_0 + qman_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

5847

WREG32(mmNIC0_QM0_ARB_CFG_0 + qman_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

5897

WREG32(mmDMA0_CORE_SRC_BASE_LO + dma_offset, lower_32_bits(addr));

drivers/accel/habanalabs/gaudi/gaudi.c

5898

WREG32(mmDMA0_CORE_SRC_BASE_HI + dma_offset, upper_32_bits(addr));

drivers/accel/habanalabs/gaudi/gaudi.c

5899

WREG32(mmDMA0_CORE_DST_BASE_LO + dma_offset, lower_32_bits(dma_addr));

drivers/accel/habanalabs/gaudi/gaudi.c

5900

WREG32(mmDMA0_CORE_DST_BASE_HI + dma_offset, upper_32_bits(dma_addr));

drivers/accel/habanalabs/gaudi/gaudi.c

5901

WREG32(mmDMA0_CORE_DST_TSIZE_0 + dma_offset, size_to_dma);

drivers/accel/habanalabs/gaudi/gaudi.c

5902

WREG32(mmDMA0_CORE_COMMIT + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

5927

WREG32(mmDMA0_CORE_ERR_CAUSE + dma_offset, err_cause);

drivers/accel/habanalabs/gaudi/gaudi.c

5981

WREG32(mmDMA0_QM_GLBL_CFG1 + qm_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

5996

WREG32(mmDMA0_CORE_ERR_CAUSE + dma_offset, err_cause);

drivers/accel/habanalabs/gaudi/gaudi.c

6030

WREG32(mmDMA0_QM_GLBL_CFG1 + qm_offset, cfg1);

drivers/accel/habanalabs/gaudi/gaudi.c

6397

WREG32(mmDMA0_CORE_PROT + dma_offset,

drivers/accel/habanalabs/gaudi/gaudi.c

6419

WREG32(mmDMA0_CORE_PROT + dma_offset, BIT(DMA0_CORE_PROT_ERR_VAL_SHIFT));

drivers/accel/habanalabs/gaudi/gaudi.c

6664

WREG32(mmMMU_UP_RAZWI_WRITE_VLD, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

6672

WREG32(mmMMU_UP_RAZWI_READ_VLD, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

6694

WREG32(mmMMU_UP_PAGE_ERROR_CAPTURE, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

6705

WREG32(mmMMU_UP_ACCESS_ERROR_CAPTURE, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

6764

WREG32(params->block_address + GAUDI_ECC_MEM_SEL_OFFSET,

drivers/accel/habanalabs/gaudi/gaudi.c

6779

WREG32(params->block_address + GAUDI_ECC_MEM_INFO_CLR_OFFSET, reg);

drivers/accel/habanalabs/gaudi/gaudi.c

6995

WREG32(glbl_sts_addr + 4 * i, glbl_sts_clr_val);

drivers/accel/habanalabs/gaudi/gaudi.c

7437

WREG32(base + (ch * 0x1000) + 0x06C, 0x1F1F);

drivers/accel/habanalabs/gaudi/gaudi.c

7438

WREG32(base + (ch * 0x1000) + 0x07C, 0x1F1F);

drivers/accel/habanalabs/gaudi/gaudi.c

7507

WREG32(mmTPC0_CFG_TPC_INTR_CAUSE + tpc_offset, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

7930

WREG32(mmSTLB_INV_PS, 3);

drivers/accel/habanalabs/gaudi/gaudi.c

7931

WREG32(mmSTLB_CACHE_INV, gaudi->mmu_cache_inv_pi++);

drivers/accel/habanalabs/gaudi/gaudi.c

7932

WREG32(mmSTLB_INV_PS, 2);

drivers/accel/habanalabs/gaudi/gaudi.c

7942

WREG32(mmSTLB_INV_SET, 0);

drivers/accel/habanalabs/gaudi/gaudi.c

7967

WREG32(MMU_ASID, asid);

drivers/accel/habanalabs/gaudi/gaudi.c

7968

WREG32(MMU_HOP0_PA43_12, phys_addr >> MMU_HOP0_PA43_12_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

7969

WREG32(MMU_HOP0_PA49_44, phys_addr >> MMU_HOP0_PA49_44_SHIFT);

drivers/accel/habanalabs/gaudi/gaudi.c

7970

WREG32(MMU_BUSY, 0x80000000);

drivers/accel/habanalabs/gaudi/gaudi.c

8221

WREG32(mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_LOW + offset,

drivers/accel/habanalabs/gaudi/gaudi.c

8223

WREG32(mmTPC0_CFG_QM_KERNEL_BASE_ADDRESS_HIGH + offset,

drivers/accel/habanalabs/gaudi/gaudi.c

8226

WREG32(mmTPC0_CFG_ICACHE_BASE_ADDERESS_LOW + offset,

drivers/accel/habanalabs/gaudi/gaudi.c

8228

WREG32(mmTPC0_CFG_ICACHE_BASE_ADDERESS_HIGH + offset,

drivers/accel/habanalabs/gaudi/gaudi.c

8231

WREG32(mmTPC0_CFG_LUT_FUNC256_BASE_ADDR_LO + offset,

drivers/accel/habanalabs/gaudi/gaudi.c

8233

WREG32(mmTPC0_CFG_LUT_FUNC256_BASE_ADDR_HI + offset,

drivers/accel/habanalabs/gaudi/gaudi.c

8236

WREG32(mmTPC0_CFG_QM_SYNC_OBJECT_ADDR + offset,

drivers/accel/habanalabs/gaudi/gaudi.c

8240

WREG32(mmTPC0_CFG_TPC_CMD + offset,

drivers/accel/habanalabs/gaudi/gaudi.c

8263

WREG32(mmTPC0_CFG_TPC_EXECUTE + offset,

drivers/accel/habanalabs/gaudi/gaudi.c

8770

WREG32(mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0 +

drivers/accel/habanalabs/gaudi/gaudi.c

8804

WREG32(irq_handler_offset,

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

405

WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

413

WREG32(base_reg + 0xE80, 0x80004);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

414

WREG32(base_reg + 0xD64, 7);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

415

WREG32(base_reg + 0xD60, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

416

WREG32(base_reg + 0xD00, lower_32_bits(input->he_mask));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

417

WREG32(base_reg + 0xD60, 1);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

418

WREG32(base_reg + 0xD00, upper_32_bits(input->he_mask));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

419

WREG32(base_reg + 0xE70, 0x10);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

420

WREG32(base_reg + 0xE60, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

421

WREG32(base_reg + 0xE00, lower_32_bits(input->sp_mask));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

422

WREG32(base_reg + 0xEF4, input->id);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

423

WREG32(base_reg + 0xDF4, 0x80);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

427

WREG32(base_reg + 0xE8C, frequency);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

428

WREG32(base_reg + 0xE90, 0x1F00);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

434

WREG32(base_reg + 0xE68, 0xffff8005);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

435

WREG32(base_reg + 0xE6C, 0x0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

438

WREG32(base_reg + 0xE80, 0x23 | (input->id << 16));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

440

WREG32(base_reg + 0xE80, 4);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

441

WREG32(base_reg + 0xD64, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

442

WREG32(base_reg + 0xD60, 1);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

443

WREG32(base_reg + 0xD00, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

444

WREG32(base_reg + 0xD20, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

445

WREG32(base_reg + 0xD60, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

446

WREG32(base_reg + 0xE20, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

447

WREG32(base_reg + 0xE00, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

448

WREG32(base_reg + 0xDF4, 0x80);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

449

WREG32(base_reg + 0xE70, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

450

WREG32(base_reg + 0xE60, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

451

WREG32(base_reg + 0xE64, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

452

WREG32(base_reg + 0xE8C, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

462

WREG32(base_reg + 0xE80, 4);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

483

WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

492

WREG32(base_reg + 0x304, val);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

494

WREG32(base_reg + 0x304, val);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

512

WREG32(base_reg + 0x20, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

520

WREG32(base_reg + 0x34, 0x3FFC);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

521

WREG32(base_reg + 0x28, input->sink_mode);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

522

WREG32(base_reg + 0x304, 0x4001);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

523

WREG32(base_reg + 0x308, 0xA);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

524

WREG32(base_reg + 0x20, 1);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

526

WREG32(base_reg + 0x34, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

527

WREG32(base_reg + 0x28, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

528

WREG32(base_reg + 0x304, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

586

WREG32(mmPSOC_ETR_LAR, CORESIGHT_UNLOCK);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

597

WREG32(mmPSOC_ETR_FFCR, val);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

599

WREG32(mmPSOC_ETR_FFCR, val);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

615

WREG32(mmPSOC_ETR_CTL, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

640

WREG32(mmPSOC_GLOBAL_CONF_TRACE_ADDR, msb);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

642

WREG32(mmPSOC_ETR_BUFWM, 0x3FFC);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

643

WREG32(mmPSOC_ETR_RSZ, input->buffer_size);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

644

WREG32(mmPSOC_ETR_MODE, input->sink_mode);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

658

WREG32(mmPSOC_ETR_AXICTL, val);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

660

WREG32(mmPSOC_ETR_DBALO,

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

662

WREG32(mmPSOC_ETR_DBAHI,

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

664

WREG32(mmPSOC_ETR_FFCR, 3);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

665

WREG32(mmPSOC_ETR_PSCR, 0xA);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

666

WREG32(mmPSOC_ETR_CTL, 1);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

668

WREG32(mmPSOC_ETR_BUFWM, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

669

WREG32(mmPSOC_ETR_RSZ, 0x400);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

670

WREG32(mmPSOC_ETR_DBALO, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

671

WREG32(mmPSOC_ETR_DBAHI, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

672

WREG32(mmPSOC_ETR_PSCR, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

673

WREG32(mmPSOC_ETR_MODE, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

674

WREG32(mmPSOC_ETR_FFCR, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

710

WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

712

WREG32(base_reg, params->enable ? 0x33F : 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

730

WREG32(base_reg + 0x104, 1);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

738

WREG32(base_reg + 0x200, lower_32_bits(input->start_addr0));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

739

WREG32(base_reg + 0x204, upper_32_bits(input->start_addr0));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

740

WREG32(base_reg + 0x208, lower_32_bits(input->addr_mask0));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

741

WREG32(base_reg + 0x20C, upper_32_bits(input->addr_mask0));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

742

WREG32(base_reg + 0x240, lower_32_bits(input->start_addr1));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

743

WREG32(base_reg + 0x244, upper_32_bits(input->start_addr1));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

744

WREG32(base_reg + 0x248, lower_32_bits(input->addr_mask1));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

745

WREG32(base_reg + 0x24C, upper_32_bits(input->addr_mask1));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

746

WREG32(base_reg + 0x224, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

747

WREG32(base_reg + 0x234, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

748

WREG32(base_reg + 0x30C, input->bw_win);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

749

WREG32(base_reg + 0x308, input->win_capture);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

750

WREG32(base_reg + 0x700, 0xA000B00 | (input->id << 12));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

751

WREG32(base_reg + 0x708, 0xA000A00 | (input->id << 12));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

752

WREG32(base_reg + 0x70C, 0xA000C00 | (input->id << 12));

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

753

WREG32(base_reg + 0x100, 0x11);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

754

WREG32(base_reg + 0x304, 0x1);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

756

WREG32(base_reg + 0x200, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

757

WREG32(base_reg + 0x204, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

758

WREG32(base_reg + 0x208, 0xFFFFFFFF);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

759

WREG32(base_reg + 0x20C, 0xFFFFFFFF);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

760

WREG32(base_reg + 0x240, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

761

WREG32(base_reg + 0x244, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

762

WREG32(base_reg + 0x248, 0xFFFFFFFF);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

763

WREG32(base_reg + 0x24C, 0xFFFFFFFF);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

764

WREG32(base_reg + 0x224, 0xFFFFFFFF);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

765

WREG32(base_reg + 0x234, 0x1070F);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

766

WREG32(base_reg + 0x30C, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

767

WREG32(base_reg + 0x308, 0xFFFF);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

768

WREG32(base_reg + 0x700, 0xA000B00);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

769

WREG32(base_reg + 0x708, 0xA000A00);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

770

WREG32(base_reg + 0x70C, 0xA000C00);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

771

WREG32(base_reg + 0x100, 1);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

772

WREG32(base_reg + 0x304, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

773

WREG32(base_reg + 0x104, 0);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

816

WREG32(base_reg + 0xE04, 0x41013046);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

817

WREG32(base_reg + 0xE04, 0x41013040);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

820

WREG32(base_reg + SPMU_EVENT_TYPES_OFFSET + i * 4,

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

823

WREG32(base_reg + 0xE04, 0x41013041);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

824

WREG32(base_reg + 0xC00, 0x8000003F);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

847

WREG32(base_reg + 0xE04, 0x41013040);

drivers/accel/habanalabs/gaudi/gaudi_coresight.c

858

WREG32(base_reg + 0xCC0, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10019

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10026

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10032

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10055

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10084

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10086

WREG32(mmTPC2_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10087

WREG32(mmTPC2_CFG_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10121

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10158

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10178

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10211

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1024

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10248

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10285

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10294

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1031

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10317

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10326

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10344

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10374

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10388

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10400

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10432

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10453

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10473

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10480

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10486

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10509

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10538

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10540

WREG32(mmTPC3_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10541

WREG32(mmTPC3_CFG_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10575

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10612

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10632

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1065

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10665

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10702

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10739

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10748

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10771

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10780

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10798

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10828

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10842

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10854

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10886

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10907

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10927

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10934

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10940

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10963

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10992

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10994

WREG32(mmTPC4_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

10995

WREG32(mmTPC4_CFG_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1102

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11029

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11066

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11086

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11119

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11156

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11193

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11202

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1122

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11225

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11234

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11252

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11282

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11296

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11308

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11340

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11361

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11381

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11388

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11394

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11417

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11446

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11448

WREG32(mmTPC5_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11449

WREG32(mmTPC5_CFG_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11483

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11520

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11540

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1155

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11573

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11610

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11647

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11656

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11679

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11688

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11706

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11736

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11750

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11762

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11794

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11815

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11835

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11842

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11848

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11871

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11900

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11902

WREG32(mmTPC6_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11903

WREG32(mmTPC6_CFG_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1192

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11937

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11974

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

11994

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12027

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12064

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12101

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12110

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12133

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12142

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12160

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12190

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12204

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12217

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12249

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12270

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1229

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12290

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12298

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12304

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12327

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12356

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12358

WREG32(mmTPC7_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12359

WREG32(mmTPC7_CFG_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1238

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12393

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12430

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12450

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12483

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12520

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12557

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12568

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12591

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12600

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1261

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12618

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12648

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12662

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12674

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1270

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12706

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12727

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12747

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12754

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12760

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12783

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12812

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1288

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12908

WREG32(gaudi_rr_lbw_hit_aw_regs[i],

drivers/accel/habanalabs/gaudi/gaudi_security.c

12910

WREG32(gaudi_rr_lbw_hit_ar_regs[i],

drivers/accel/habanalabs/gaudi/gaudi_security.c

12916

WREG32(gaudi_rr_lbw_min_aw_regs[i] + (j << 2),

drivers/accel/habanalabs/gaudi/gaudi_security.c

12919

WREG32(gaudi_rr_lbw_min_ar_regs[i] + (j << 2),

drivers/accel/habanalabs/gaudi/gaudi_security.c

12922

WREG32(gaudi_rr_lbw_max_aw_regs[i] + (j << 2),

drivers/accel/habanalabs/gaudi/gaudi_security.c

12925

WREG32(gaudi_rr_lbw_max_ar_regs[i] + (j << 2),

drivers/accel/habanalabs/gaudi/gaudi_security.c

12962

WREG32(gaudi_rr_hbw_hit_aw_regs[i], 0x1F);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12963

WREG32(gaudi_rr_hbw_hit_ar_regs[i], 0x1D);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12967

WREG32(gaudi_rr_hbw_base_low_aw_regs[i], dram_addr_lo);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12968

WREG32(gaudi_rr_hbw_base_low_ar_regs[i], dram_addr_lo);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12970

WREG32(gaudi_rr_hbw_base_high_aw_regs[i], dram_addr_hi);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12971

WREG32(gaudi_rr_hbw_base_high_ar_regs[i], dram_addr_hi);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12973

WREG32(gaudi_rr_hbw_mask_low_aw_regs[i], 0xE0000000);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12974

WREG32(gaudi_rr_hbw_mask_low_ar_regs[i], 0xE0000000);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12976

WREG32(gaudi_rr_hbw_mask_high_aw_regs[i], 0x3FFFF);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12977

WREG32(gaudi_rr_hbw_mask_high_ar_regs[i], 0x3FFFF);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12979

WREG32(gaudi_rr_hbw_base_low_aw_regs[i] + 4, sram_addr_lo);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12980

WREG32(gaudi_rr_hbw_base_high_aw_regs[i] + 4, sram_addr_hi);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12981

WREG32(gaudi_rr_hbw_mask_low_aw_regs[i] + 4, 0xFFFFFF80);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12982

WREG32(gaudi_rr_hbw_mask_high_aw_regs[i] + 4, 0x3FFFF);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12984

WREG32(gaudi_rr_hbw_base_low_aw_regs[i] + 8, scratch_addr_lo);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12985

WREG32(gaudi_rr_hbw_base_low_ar_regs[i] + 8, scratch_addr_lo);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12987

WREG32(gaudi_rr_hbw_base_high_aw_regs[i] + 8, scratch_addr_hi);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12988

WREG32(gaudi_rr_hbw_base_high_ar_regs[i] + 8, scratch_addr_hi);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12990

WREG32(gaudi_rr_hbw_mask_low_aw_regs[i] + 8, 0xFFFF0000);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12991

WREG32(gaudi_rr_hbw_mask_low_ar_regs[i] + 8, 0xFFFF0000);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12993

WREG32(gaudi_rr_hbw_mask_high_aw_regs[i] + 8, 0x3FFFF);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12994

WREG32(gaudi_rr_hbw_mask_high_ar_regs[i] + 8, 0x3FFFF);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12996

WREG32(gaudi_rr_hbw_base_low_aw_regs[i] + 12, pcie_fw_addr_lo);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12997

WREG32(gaudi_rr_hbw_base_low_ar_regs[i] + 12, pcie_fw_addr_lo);

drivers/accel/habanalabs/gaudi/gaudi_security.c

12999

WREG32(gaudi_rr_hbw_base_high_aw_regs[i] + 12, pcie_fw_addr_hi);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13000

WREG32(gaudi_rr_hbw_base_high_ar_regs[i] + 12, pcie_fw_addr_hi);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13002

WREG32(gaudi_rr_hbw_mask_low_aw_regs[i] + 12, 0xFFFF8000);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13003

WREG32(gaudi_rr_hbw_mask_low_ar_regs[i] + 12, 0xFFFF8000);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13005

WREG32(gaudi_rr_hbw_mask_high_aw_regs[i] + 12, 0x3FFFF);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13006

WREG32(gaudi_rr_hbw_mask_high_ar_regs[i] + 12, 0x3FFFF);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13008

WREG32(gaudi_rr_hbw_base_low_aw_regs[i] + 16, spi_addr_lo);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13009

WREG32(gaudi_rr_hbw_base_low_ar_regs[i] + 16, spi_addr_lo);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13011

WREG32(gaudi_rr_hbw_base_high_aw_regs[i] + 16, spi_addr_hi);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13012

WREG32(gaudi_rr_hbw_base_high_ar_regs[i] + 16, spi_addr_hi);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13014

WREG32(gaudi_rr_hbw_mask_low_aw_regs[i] + 16, 0xFE000000);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13015

WREG32(gaudi_rr_hbw_mask_low_ar_regs[i] + 16, 0xFE000000);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13017

WREG32(gaudi_rr_hbw_mask_high_aw_regs[i] + 16, 0x3FFFF);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13018

WREG32(gaudi_rr_hbw_mask_high_ar_regs[i] + 16, 0x3FFFF);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13024

WREG32(gaudi_rr_hbw_base_low_aw_regs[i] + 20, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13025

WREG32(gaudi_rr_hbw_base_low_ar_regs[i] + 20, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13027

WREG32(gaudi_rr_hbw_base_high_aw_regs[i] + 20, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13028

WREG32(gaudi_rr_hbw_base_high_ar_regs[i] + 20, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13030

WREG32(gaudi_rr_hbw_mask_low_aw_regs[i] + 20, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13031

WREG32(gaudi_rr_hbw_mask_low_ar_regs[i] + 20, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13033

WREG32(gaudi_rr_hbw_mask_high_aw_regs[i] + 20, 0xFFF80);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13034

WREG32(gaudi_rr_hbw_mask_high_ar_regs[i] + 20, 0xFFF80);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13054

WREG32(mmMME0_SBAB_PROT, 0x2);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13055

WREG32(mmMME0_ACC_PROT, 0x2);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13056

WREG32(mmMME1_SBAB_PROT, 0x2);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13057

WREG32(mmMME1_ACC_PROT, 0x2);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13058

WREG32(mmMME2_SBAB_PROT, 0x2);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13059

WREG32(mmMME2_ACC_PROT, 0x2);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13060

WREG32(mmMME3_SBAB_PROT, 0x2);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13061

WREG32(mmMME3_ACC_PROT, 0x2);

drivers/accel/habanalabs/gaudi/gaudi_security.c

13066

WREG32(0xC01B28, 0x1);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1318

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1332

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1344

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1376

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1397

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1417

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1424

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1459

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1466

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1494

WREG32(mmDMA0_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1495

WREG32(mmDMA1_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1496

WREG32(mmDMA2_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1497

WREG32(mmDMA3_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1498

WREG32(mmDMA4_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1499

WREG32(mmDMA5_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1500

WREG32(mmDMA6_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1501

WREG32(mmDMA7_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1503

WREG32(mmDMA0_CORE_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1504

WREG32(mmDMA1_CORE_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1505

WREG32(mmDMA2_CORE_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1506

WREG32(mmDMA3_CORE_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1507

WREG32(mmDMA4_CORE_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1508

WREG32(mmDMA5_CORE_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1509

WREG32(mmDMA6_CORE_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1510

WREG32(mmDMA7_CORE_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1544

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1581

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1601

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1634

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1671

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1708

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1718

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1741

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1750

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1768

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1798

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1811

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1824

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1856

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1877

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1897

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1904

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1938

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1975

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

1995

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2028

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2065

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2102

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2112

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2135

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2144

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2162

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2192

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2206

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2219

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2251

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2272

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2292

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2299

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2333

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2370

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2390

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2423

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2460

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2497

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2507

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2530

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2539

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2557

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2587

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2601

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2614

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2646

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2667

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2687

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2694

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2728

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2765

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2785

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2818

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2855

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2892

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2902

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2925

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2934

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2952

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2982

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

2996

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3009

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3041

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3062

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3082

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3089

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3123

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3160

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3180

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3213

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3250

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3287

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3297

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3320

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3329

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3347

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3377

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3391

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3404

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3436

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3457

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3477

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3484

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3518

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3555

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3575

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3608

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3645

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3682

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3692

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3715

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3724

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3742

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3772

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3786

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3799

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3831

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3852

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3872

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3879

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3913

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3950

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

3970

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4003

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4040

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4077

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4087

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4110

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4119

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4137

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4167

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4181

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4195

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4227

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4248

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4268

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4275

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4309

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4346

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4366

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4399

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4436

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4473

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4483

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4506

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4515

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4533

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4563

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4577

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4590

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4622

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4643

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4663

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4670

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4678

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4686

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4711

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4718

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4735

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4743

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4751

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4776

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4783

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4800

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4808

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4816

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

482

WREG32(pb_addr, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4840

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4847

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4864

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4872

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4880

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4904

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4911

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4928

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4936

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4944

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4968

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4975

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

4992

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5000

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5008

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5032

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5039

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

505

WREG32(mmMME0_CTRL_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5056

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

506

WREG32(mmMME1_CTRL_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5064

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

507

WREG32(mmMME2_CTRL_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5072

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

508

WREG32(mmMME3_CTRL_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5096

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

510

WREG32(mmMME0_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5103

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

511

WREG32(mmMME2_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5120

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5128

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5136

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5160

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5167

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5184

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5192

WREG32(mmNIC0_QM0_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5193

WREG32(mmNIC0_QM1_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5227

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5264

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5284

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5317

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5354

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5391

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5400

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5423

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5433

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5451

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

546

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5481

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5495

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5507

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

553

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5539

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5560

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5581

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5588

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5622

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5659

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5679

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5712

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5749

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5786

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5795

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5818

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5828

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5846

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

587

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5876

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5890

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5902

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5934

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5955

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5976

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5983

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5985

WREG32(mmNIC1_QM0_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

5986

WREG32(mmNIC1_QM1_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6020

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6057

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6077

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6110

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6147

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6184

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6193

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6216

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6226

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

624

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6244

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6274

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6288

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6299

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6331

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6352

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6373

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6380

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6414

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

644

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6451

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6471

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6504

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6541

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6578

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6587

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6610

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6620

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6638

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6668

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6682

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6694

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6726

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6747

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6768

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

677

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6775

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6777

WREG32(mmNIC2_QM0_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6778

WREG32(mmNIC2_QM1_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6812

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6849

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6869

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6902

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6939

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6977

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

6986

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7009

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7019

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7037

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7067

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7081

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7093

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7125

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

714

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7146

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7167

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7174

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7208

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7245

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7265

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7298

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7335

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7372

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7381

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7404

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7414

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7432

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7462

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7476

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7488

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

751

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7520

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7541

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7562

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7569

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7571

WREG32(mmNIC3_QM0_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7572

WREG32(mmNIC3_QM1_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

760

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7606

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7643

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7663

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7696

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7733

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7770

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7779

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7802

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7812

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

783

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7830

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7860

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7874

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7886

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7918

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

792

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7939

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7960

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

7967

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8001

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8038

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8058

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8091

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

810

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8128

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8165

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8174

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8197

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8207

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8225

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8255

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8269

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8281

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8313

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8334

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8355

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8362

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8364

WREG32(mmNIC4_QM0_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8365

WREG32(mmNIC4_QM1_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8399

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

840

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8436

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8456

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8489

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8526

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

853

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8563

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8572

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8595

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8605

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8623

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

865

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8653

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8667

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8679

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8711

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8732

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8753

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8760

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8794

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8831

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8851

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8884

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8921

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8958

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8967

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

897

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

8990

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9000

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9018

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9048

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9062

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9074

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9106

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9127

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9148

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9155

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9174

WREG32(mmTPC0_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9175

WREG32(mmTPC0_CFG_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

918

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9209

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9246

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9266

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9299

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9336

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9373

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

938

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9384

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9407

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9416

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9434

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

945

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9464

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9478

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9491

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9523

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9544

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9564

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9571

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9577

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9600

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9629

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9631

WREG32(mmTPC1_QM_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9632

WREG32(mmTPC1_CFG_BASE - CFG_BASE + PROT_BITS_OFFS + 0x7C, 0);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9666

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9703

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9723

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9756

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9793

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

980

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9830

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9839

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9862

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

987

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9871

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9889

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9919

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9933

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9946

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9978

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi/gaudi_security.c

9999

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10729

WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_MMU_BP +

drivers/accel/habanalabs/gaudi2/gaudi2.c

10731

WREG32(mmDCORE0_EDMA0_CORE_CTX_WR_COMP_ADDR_LO + edma_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

10733

WREG32(mmDCORE0_EDMA0_CORE_CTX_WR_COMP_ADDR_HI + edma_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

10735

WREG32(mmDCORE0_EDMA0_CORE_CTX_WR_COMP_WDATA + edma_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

10742

WREG32(sob_addr, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10786

WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_MMU_BP + edma_offset, old_mmubp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10787

WREG32(mmDCORE0_EDMA0_CORE_CTX_WR_COMP_ADDR_LO + edma_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10788

WREG32(mmDCORE0_EDMA0_CORE_CTX_WR_COMP_ADDR_HI + edma_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10789

WREG32(mmDCORE0_EDMA0_CORE_CTX_WR_COMP_WDATA + edma_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10802

WREG32(sob_addr, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10957

WREG32(reg_base + QM_ARB_CFG_0_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

10976

WREG32(reg_base + QM_ARB_CFG_0_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11475

WREG32(mmDCORE0_SYNC_MNGR_OBJS_SOB_OBJ_0 + hw_sob->sob_id * 4, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

11647

WREG32(irq_handler_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

3623

WREG32(reg_base + ARC_DCCM_UPPER_EN_OFFSET, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

3633

WREG32(reg_base + ARC_DCCM_UPPER_EN_OFFSET, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4198

WREG32(reg_base + QM_GLBL_CFG1_OFFSET, QM_GLBL_CFG1_PQF_STOP |

drivers/accel/habanalabs/gaudi2/gaudi2.c

4203

WREG32(reg_base + QM_GLBL_CFG2_OFFSET, QM_GLBL_CFG2_ARC_CQF_STOP);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4208

WREG32(reg_base + QM_GLBL_CFG1_OFFSET, QM_GLBL_CFG1_PQF_FLUSH |

drivers/accel/habanalabs/gaudi2/gaudi2.c

4215

WREG32(reg_base + QM_GLBL_CFG2_OFFSET, QM_GLBL_CFG2_ARC_CQF_FLUSH);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4366

WREG32(reg_base + DMA_CORE_CFG_1_OFFSET, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4410

WREG32(mmDCORE0_MME_CTRL_LO_QM_STALL + (i * offset), 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4427

WREG32(reg_base + TPC_CFG_STALL_OFFSET, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4448

WREG32(mmROT0_MSS_HALT + i * ROT_OFFSET, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4454

WREG32(reg_base + QM_GLBL_CFG0_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4560

WREG32(mmPSOC_TIMESTAMP_BASE, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4563

WREG32(mmPSOC_TIMESTAMP_BASE + 0xC, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4564

WREG32(mmPSOC_TIMESTAMP_BASE + 0x8, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4567

WREG32(mmPSOC_TIMESTAMP_BASE, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4573

WREG32(mmPSOC_TIMESTAMP_BASE, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4868

WREG32(mmDCORE0_DEC0_CMD_SWREG16 + offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4870

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_GRACEFUL + offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4908

WREG32(mmPCIE_DEC0_CMD_SWREG16 + offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4910

WREG32(mmPCIE_VDEC0_BRDG_CTRL_GRACEFUL + offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4953

WREG32(reg_base + ARC_HALT_REQ_OFFSET, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

4987

WREG32(reg_base + ARC_HALT_REQ_OFFSET, val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5067

WREG32(reg_addr, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5091

WREG32(reg_addr, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5112

WREG32(reg_addr, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5117

WREG32(reg_addr, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5319

WREG32(mmCPU_IF_PQ_BASE_ADDR_LOW, lower_32_bits(cpu_pq->bus_address));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5320

WREG32(mmCPU_IF_PQ_BASE_ADDR_HIGH, upper_32_bits(cpu_pq->bus_address));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5322

WREG32(mmCPU_IF_EQ_BASE_ADDR_LOW, lower_32_bits(eq->bus_address));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5323

WREG32(mmCPU_IF_EQ_BASE_ADDR_HIGH, upper_32_bits(eq->bus_address));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5325

WREG32(mmCPU_IF_CQ_BASE_ADDR_LOW, lower_32_bits(hdev->cpu_accessible_dma_address));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5326

WREG32(mmCPU_IF_CQ_BASE_ADDR_HIGH, upper_32_bits(hdev->cpu_accessible_dma_address));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5328

WREG32(mmCPU_IF_PQ_LENGTH, HL_QUEUE_SIZE_IN_BYTES);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5329

WREG32(mmCPU_IF_EQ_LENGTH, HL_EQ_SIZE_IN_BYTES);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5330

WREG32(mmCPU_IF_CQ_LENGTH, HL_CPU_ACCESSIBLE_MEM_SIZE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5333

WREG32(mmCPU_IF_EQ_RD_OFFS, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5335

WREG32(mmCPU_IF_PF_PQ_PI, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5337

WREG32(mmCPU_IF_QUEUE_INIT, PQ_INIT_STATUS_READY_FOR_CP);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5341

WREG32(le32_to_cpu(dyn_regs->gic_host_pi_upd_irq),

drivers/accel/habanalabs/gaudi2/gaudi2.c

5379

WREG32(reg_base + QM_PQ_BASE_LO_0_OFFSET + pq_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5381

WREG32(reg_base + QM_PQ_BASE_HI_0_OFFSET + pq_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5384

WREG32(reg_base + QM_PQ_BASE_LO_0_OFFSET + pq_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5386

WREG32(reg_base + QM_PQ_BASE_HI_0_OFFSET + pq_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5389

WREG32(reg_base + QM_PQ_SIZE_0_OFFSET + pq_offset, ilog2(HL_QUEUE_LENGTH));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5390

WREG32(reg_base + QM_PQ_PI_0_OFFSET + pq_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5391

WREG32(reg_base + QM_PQ_CI_0_OFFSET + pq_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5407

WREG32(reg_base + QM_CP_MSG_BASE0_ADDR_LO_0_OFFSET + cp_offset, mtr_base_lo);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5408

WREG32(reg_base + QM_CP_MSG_BASE0_ADDR_HI_0_OFFSET + cp_offset, mtr_base_hi);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5409

WREG32(reg_base + QM_CP_MSG_BASE1_ADDR_LO_0_OFFSET + cp_offset, so_base_lo);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5410

WREG32(reg_base + QM_CP_MSG_BASE1_ADDR_HI_0_OFFSET + cp_offset, so_base_hi);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5414

WREG32(reg_base + QM_CP_CFG_OFFSET, FIELD_PREP(PDMA0_QM_CP_CFG_SWITCH_EN_MASK, 0x1));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5430

WREG32(reg_base + QM_PQC_HBW_BASE_LO_0_OFFSET + pq_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5432

WREG32(reg_base + QM_PQC_HBW_BASE_HI_0_OFFSET + pq_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5434

WREG32(reg_base + QM_PQC_SIZE_0_OFFSET + pq_offset,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5437

WREG32(reg_base + QM_PQC_PI_0_OFFSET + pq_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5438

WREG32(reg_base + QM_PQC_LBW_WDATA_0_OFFSET + pq_offset, QM_PQC_LBW_WDATA);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5439

WREG32(reg_base + QM_PQC_LBW_BASE_LO_0_OFFSET + pq_offset, so_base_lo);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5440

WREG32(reg_base + QM_PQC_LBW_BASE_HI_0_OFFSET + pq_offset, so_base_hi);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5444

WREG32(reg_base + QM_PQC_CFG_OFFSET, 1 << PDMA0_QM_PQC_CFG_EN_SHIFT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5502

WREG32(reg_base + QM_GLBL_PROT_OFFSET, glbl_prot);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5505

WREG32(reg_base + QM_GLBL_ERR_ADDR_LO_OFFSET, lower_32_bits(CFG_BASE + irq_handler_offset));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5506

WREG32(reg_base + QM_GLBL_ERR_ADDR_HI_OFFSET, upper_32_bits(CFG_BASE + irq_handler_offset));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5509

WREG32(reg_base + QM_GLBL_ERR_WDATA_OFFSET,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5512

WREG32(reg_base + QM_ARB_ERR_MSG_EN_OFFSET, QM_ARB_ERR_MSG_EN_MASK);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5514

WREG32(reg_base + QM_ARB_SLV_CHOISE_WDT_OFFSET, GAUDI2_ARB_WDT_TIMEOUT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5515

WREG32(reg_base + QM_GLBL_CFG1_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5516

WREG32(reg_base + QM_GLBL_CFG2_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5525

WREG32(reg_base + QM_GLBL_CFG0_OFFSET, PDMA1_QMAN_ENABLE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5527

WREG32(reg_base + QM_GLBL_CFG0_OFFSET, PDMA0_QMAN_ENABLE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5529

WREG32(reg_base + QM_GLBL_CFG0_OFFSET, QMAN_ENABLE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5557

WREG32(reg_base + DMA_CORE_PROT_OFFSET, prot);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5562

WREG32(reg_base + DMA_CORE_ERRMSG_ADDR_LO_OFFSET,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5565

WREG32(reg_base + DMA_CORE_ERRMSG_ADDR_HI_OFFSET,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5569

WREG32(reg_base + DMA_CORE_ERRMSG_WDATA_OFFSET,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5573

WREG32(reg_base + DMA_CORE_CFG_0_OFFSET, 1 << ARC_FARM_KDMA_CFG_0_EN_SHIFT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5676

WREG32(mmDCORE0_SYNC_MNGR_OBJS_SOB_OBJ_0 + sob_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5690

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0 + mon_offset, lower_32_bits(addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5691

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_ADDRH_0 + mon_offset, upper_32_bits(addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5696

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_DATA_0 + mon_offset, payload);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5702

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0 + mon_offset, lower_32_bits(addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5703

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_ADDRH_0 + mon_offset, upper_32_bits(addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5714

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_DATA_0 + mon_offset, payload);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5720

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_CONFIG_0 + mon_offset, config);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5723

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0 + mon_offset, lower_32_bits(addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5724

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_ADDRH_0 + mon_offset, upper_32_bits(addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5727

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_DATA_0 + mon_offset, payload);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5729

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_ARM_0 + mon_offset, arm);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5766

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_CONFIG_0 + (4 * i), reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5770

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_CONFIG_0 + (4 * i), reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5773

WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0, lower_32_bits(gaudi2->virt_msix_db_dma_addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5774

WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0, upper_32_bits(gaudi2->virt_msix_db_dma_addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

5775

WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_DATA_0, GAUDI2_IRQ_NUM_COMPLETION);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5781

WREG32(mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_L_0 + (4 * i),

drivers/accel/habanalabs/gaudi2/gaudi2.c

5783

WREG32(mmDCORE0_SYNC_MNGR_GLBL_CQ_BASE_ADDR_H_0 + (4 * i),

drivers/accel/habanalabs/gaudi2/gaudi2.c

5785

WREG32(mmDCORE0_SYNC_MNGR_GLBL_CQ_SIZE_LOG2_0 + (4 * i),

drivers/accel/habanalabs/gaudi2/gaudi2.c

5790

WREG32(mmDCORE0_SYNC_MNGR_GLBL_ASID_SEC, 0x10000);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5791

WREG32(mmDCORE0_SYNC_MNGR_GLBL_ASID_NONE_SEC_PRIV, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5810

WREG32(reg_base + MME_ACC_INTR_MASK_OFFSET, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5811

WREG32(reg_base + MME_ACC_AP_LFSR_POLY_OFFSET, 0x80DEADAF);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5814

WREG32(reg_base + MME_ACC_AP_LFSR_SEED_SEL_OFFSET, i);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5815

WREG32(reg_base + MME_ACC_AP_LFSR_SEED_WDATA_OFFSET, gaudi2->lfsr_rand_seeds[i]);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5869

WREG32(reg_base + TPC_CFG_TPC_INTR_MASK_OFFSET, 0x23FFFE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5872

WREG32(reg_base + TPC_CFG_MSS_CONFIG_OFFSET,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5944

WREG32(base_addr + BRDG_CTRL_NRM_MSIX_LBW_AWADDR,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5946

WREG32(base_addr + BRDG_CTRL_NRM_MSIX_LBW_WDATA, GAUDI2_SOB_INCREMENT_BY_ONE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

5950

WREG32(base_addr + BRDG_CTRL_ABNRM_MSIX_LBW_AWADDR,

drivers/accel/habanalabs/gaudi2/gaudi2.c

5952

WREG32(base_addr + BRDG_CTRL_ABNRM_MSIX_LBW_WDATA, GAUDI2_SOB_INCREMENT_BY_ONE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6009

WREG32(stlb_base + STLB_ASID_OFFSET, asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6010

WREG32(stlb_base + STLB_HOP0_PA43_12_OFFSET, phys_addr >> MMU_HOP0_PA43_12_SHIFT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6011

WREG32(stlb_base + STLB_HOP0_PA63_44_OFFSET, phys_addr >> MMU_HOP0_PA63_44_SHIFT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6012

WREG32(stlb_base + STLB_BUSY_OFFSET, 0x80000000);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6036

WREG32(mmPMMU_HBW_STLB_MEM_CACHE_INVALIDATION, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6041

WREG32(stlb_base + start_offset, inv_start_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6067

WREG32(mmPMMU_HBW_STLB_MEM_CACHE_INV_STATUS, 0x0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6128

WREG32(stlb_base + STLB_RANGE_INV_START_LSB_OFFSET,

drivers/accel/habanalabs/gaudi2/gaudi2.c

6131

WREG32(stlb_base + STLB_RANGE_INV_START_MSB_OFFSET,

drivers/accel/habanalabs/gaudi2/gaudi2.c

6134

WREG32(stlb_base + STLB_RANGE_INV_END_LSB_OFFSET,

drivers/accel/habanalabs/gaudi2/gaudi2.c

6137

WREG32(stlb_base + STLB_RANGE_INV_END_MSB_OFFSET,

drivers/accel/habanalabs/gaudi2/gaudi2.c

6314

WREG32(stlb_base + STLB_INV_ALL_START_OFFSET, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6331

WREG32(mmu_base + MMU_BYPASS_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6344

WREG32(mmu_base + MMU_ENABLE_OFFSET, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6374

WREG32(stlb_base + STLB_LL_LOOKUP_MASK_63_32_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6389

WREG32(mmu_base + MMU_SPI_SEI_MASK_OFFSET, GAUDI2_PMMU_SPI_SEI_ENABLE_MASK);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6441

WREG32(mmu_base + MMU_SPI_SEI_MASK_OFFSET, GAUDI2_HMMU_SPI_SEI_ENABLE_MASK);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6491

WREG32(mmHW_STATE, HL_DEVICE_HW_STATE_DIRTY);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6615

WREG32(le32_to_cpu(dyn_regs->gic_host_halt_irq),

drivers/accel/habanalabs/gaudi2/gaudi2.c

6663

WREG32(mmPCIE_AUX_FLR_CTRL,

drivers/accel/habanalabs/gaudi2/gaudi2.c

6668

WREG32(mmPSOC_RESET_CONF_SW_ALL_RST, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

6697

WREG32(mmPSOC_RESET_CONF_SOFT_RST, 1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7059

WREG32(db_reg_offset, db_value);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7064

WREG32(le32_to_cpu(dyn_regs->gic_host_pi_upd_irq),

drivers/accel/habanalabs/gaudi2/gaudi2.c

7229

WREG32(mmARC_FARM_KDMA_CTX_AXUSER_HB_ASID, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7230

WREG32(mmARC_FARM_KDMA_CTX_AXUSER_HB_MMU_BP, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7243

WREG32(mmDCORE0_SYNC_MNGR_OBJS_SOB_OBJ_0 + sob_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7246

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_ADDRL_0 + mon_offset, cq_id);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7249

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_PAY_DATA_0 + mon_offset, mon_payload);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7259

WREG32(mmDCORE0_SYNC_MNGR_OBJS_MON_ARM_0 + mon_offset, mon_arm);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7283

WREG32(mmARC_FARM_KDMA_CTX_SRC_BASE_LO, lower_32_bits(src_addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

7284

WREG32(mmARC_FARM_KDMA_CTX_SRC_BASE_HI, upper_32_bits(src_addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

7285

WREG32(mmARC_FARM_KDMA_CTX_DST_BASE_LO, lower_32_bits(dst_addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

7286

WREG32(mmARC_FARM_KDMA_CTX_DST_BASE_HI, upper_32_bits(dst_addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

7287

WREG32(mmARC_FARM_KDMA_CTX_WR_COMP_ADDR_LO, lower_32_bits(comp_addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

7288

WREG32(mmARC_FARM_KDMA_CTX_WR_COMP_ADDR_HI, upper_32_bits(comp_addr));

drivers/accel/habanalabs/gaudi2/gaudi2.c

7289

WREG32(mmARC_FARM_KDMA_CTX_WR_COMP_WDATA, comp_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7290

WREG32(mmARC_FARM_KDMA_CTX_DST_TSIZE_0, size);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7298

WREG32(mmARC_FARM_KDMA_CTX_COMMIT, commit_mask);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7325

WREG32(mmARC_FARM_KDMA_CFG_1, 1 << ARC_FARM_KDMA_CFG_1_HALT_SHIFT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7339

WREG32(addr + i, val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7347

WREG32(reg_base + QM_GLBL_PROT_OFFSET, QMAN_MAKE_TRUSTED_TEST_MODE);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7348

WREG32(reg_base + QM_PQC_CFG_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7350

WREG32(reg_base + QM_GLBL_PROT_OFFSET, QMAN_MAKE_TRUSTED);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7351

WREG32(reg_base + QM_PQC_CFG_OFFSET, 1 << PDMA0_QM_PQC_CFG_EN_SHIFT);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7367

WREG32(sob_addr, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7899

WREG32(mmCPU_IF_EQ_RD_OFFS, val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7921

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_DEC_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7922

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_DEC_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7924

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_ABNRM_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7925

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_ABNRM_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7927

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7928

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7930

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7931

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7933

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_VCD_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7934

WREG32(mmDCORE0_VDEC0_BRDG_CTRL_AXUSER_MSIX_VCD_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7949

WREG32(mmDCORE0_EDMA0_QM_AXUSER_NONSECURED_HB_MMU_BP + dcore_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7950

WREG32(mmDCORE0_EDMA0_QM_AXUSER_NONSECURED_HB_ASID + dcore_offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7951

WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_MMU_BP + dcore_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7952

WREG32(mmDCORE0_EDMA0_CORE_CTX_AXUSER_HB_ASID + dcore_offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7956

WREG32(mmDCORE0_EDMA1_QM_AXUSER_NONSECURED_HB_MMU_BP + dcore_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7957

WREG32(mmDCORE0_EDMA1_QM_AXUSER_NONSECURED_HB_ASID + dcore_offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7958

WREG32(mmDCORE0_EDMA1_CORE_CTX_AXUSER_HB_ASID + dcore_offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7959

WREG32(mmDCORE0_EDMA1_CORE_CTX_AXUSER_HB_MMU_BP + dcore_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7963

WREG32(mmDCORE0_SYNC_MNGR_GLBL_ASID_NONE_SEC_PRIV + dcore_offset, asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7971

WREG32(mmDCORE0_SYNC_MNGR_MSTR_IF_AXUSER_HB_ASID + dcore_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7972

WREG32(mmDCORE0_SYNC_MNGR_MSTR_IF_AXUSER_HB_MMU_BP + dcore_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7975

WREG32(mmDCORE0_MME_CTRL_LO_MME_AXUSER_HB_MMU_BP + dcore_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7976

WREG32(mmDCORE0_MME_CTRL_LO_MME_AXUSER_HB_ASID + dcore_offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7980

WREG32(mmDCORE0_MME_SBTE0_MSTR_IF_AXUSER_HB_MMU_BP +

drivers/accel/habanalabs/gaudi2/gaudi2.c

7982

WREG32(mmDCORE0_MME_SBTE0_MSTR_IF_AXUSER_HB_ASID +

drivers/accel/habanalabs/gaudi2/gaudi2.c

7988

WREG32(mmDCORE0_MME_WB0_MSTR_IF_AXUSER_HB_MMU_BP +

drivers/accel/habanalabs/gaudi2/gaudi2.c

7990

WREG32(mmDCORE0_MME_WB0_MSTR_IF_AXUSER_HB_ASID +

drivers/accel/habanalabs/gaudi2/gaudi2.c

7994

WREG32(mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_MMU_BP + dcore_offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

7995

WREG32(mmDCORE0_MME_QM_AXUSER_NONSECURED_HB_ASID + dcore_offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8011

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_DEC_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8012

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_DEC_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8014

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_ABNRM_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8015

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_ABNRM_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8017

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8018

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_L2C_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8020

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8021

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_NRM_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8023

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_VCD_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8024

WREG32(mmPCIE_VDEC0_BRDG_CTRL_AXUSER_MSIX_VCD_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8032

WREG32(mmARC_FARM_ARC0_DUP_ENG_AXUSER_HB_MMU_BP + offset, rw_mmu_bp);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8033

WREG32(mmARC_FARM_ARC0_DUP_ENG_AXUSER_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8047

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8050

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8053

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8056

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8059

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8062

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8065

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8068

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8071

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8074

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8077

WREG32(reg_base + reg_offset, reg_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8109

WREG32(mmPDMA0_QM_AXUSER_NONSECURED_HB_ASID, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8110

WREG32(mmPDMA0_QM_AXUSER_NONSECURED_HB_MMU_BP, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8111

WREG32(mmPDMA0_CORE_CTX_AXUSER_HB_ASID, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8112

WREG32(mmPDMA0_CORE_CTX_AXUSER_HB_MMU_BP, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8114

WREG32(mmPDMA1_QM_AXUSER_NONSECURED_HB_ASID, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8115

WREG32(mmPDMA1_QM_AXUSER_NONSECURED_HB_MMU_BP, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8116

WREG32(mmPDMA1_CORE_CTX_AXUSER_HB_ASID, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8117

WREG32(mmPDMA1_CORE_CTX_AXUSER_HB_MMU_BP, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8122

WREG32(mmROT0_QM_AXUSER_NONSECURED_HB_ASID + offset, rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8123

WREG32(mmROT0_QM_AXUSER_NONSECURED_HB_MMU_BP + offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8152

WREG32(mmDCORE0_TPC0_CFG_AXUSER_HB_MMU_BP + offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8153

WREG32(mmDCORE0_TPC0_CFG_AXUSER_HB_ASID + offset, mmu_data->rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8154

WREG32(mmDCORE0_TPC0_QM_AXUSER_NONSECURED_HB_MMU_BP + offset, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8155

WREG32(mmDCORE0_TPC0_QM_AXUSER_NONSECURED_HB_ASID + offset, mmu_data->rw_asid);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8596

WREG32(hbw_rtr_mstr_if_base_addr + RR_SHRD_HBW_AW_RAZWI_HAPPENED, hbw_shrd_aw);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8604

WREG32(hbw_rtr_mstr_if_base_addr + RR_SHRD_HBW_AR_RAZWI_HAPPENED, hbw_shrd_ar);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8612

WREG32(lbw_rtr_mstr_if_base_addr + RR_SHRD_LBW_AW_RAZWI_HAPPENED, lbw_shrd_aw);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8620

WREG32(lbw_rtr_mstr_if_base_addr + RR_SHRD_LBW_AR_RAZWI_HAPPENED, lbw_shrd_ar);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8812

WREG32(mmPSOC_GLOBAL_CONF_RAZWI_INTERRUPT, razwi_intr);

drivers/accel/habanalabs/gaudi2/gaudi2.c

8832

WREG32(qman_base + QM_SEI_STATUS_OFFSET, sts_clr_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9039

WREG32(mmARC_FARM_ARC0_AUX_ARC_SEI_INTR_CLR + (arc_farm * ARC_FARM_OFFSET),

drivers/accel/habanalabs/gaudi2/gaudi2.c

9066

WREG32(mmCPU_IF_CPU_SEI_INTR_CLR, sts_clr_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9147

WREG32(sts_addr, sts_clr_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9178

WREG32(sts_clr_addr, sts_clr_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9220

WREG32(sts_clr_addr, sts_clr_val);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9273

WREG32(razwi_happened_addr, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9280

WREG32(razwi_happened_addr, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9287

WREG32(razwi_happened_addr, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9294

WREG32(razwi_happened_addr, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9386

WREG32(mmu_base + MMU_OFFSET(mmDCORE0_HMMU0_MMU_ACCESS_PAGE_ERROR_VALID), 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9409

WREG32(mmu_base + MMU_OFFSET(mmDCORE0_HMMU0_MMU_ACCESS_PAGE_ERROR_VALID), 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9441

WREG32(mmu_base + MMU_INTERRUPT_CLR_OFFSET, interrupt_clr);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9479

WREG32(sei_cause_addr, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9493

WREG32(cq_intr_addr, 0);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9889

WREG32(mmPCIE_WRAP_P2P_INTR, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9898

WREG32(mmPCIE_WRAP_MSIX_GW_INTR, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

1959

WREG32(base_reg + mmCORESIGHT_UNLOCK_REGISTER_OFFSET, CORESIGHT_UNLOCK);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2011

WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 0x80004);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2016

WREG32(base_reg + mmSTM_STMHEMCR_OFFSET, 7);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2017

WREG32(base_reg + mmSTM_STMHEBSR_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2018

WREG32(base_reg + mmSTM_STMHEER_OFFSET, lower_32_bits(input->he_mask));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2019

WREG32(base_reg + mmSTM_STMHEBSR_OFFSET, 1);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2020

WREG32(base_reg + mmSTM_STMHEER_OFFSET, upper_32_bits(input->he_mask));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2021

WREG32(base_reg + mmSTM_STMSPTRIGCSR_OFFSET, 0x10);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2022

WREG32(base_reg + mmSTM_STMSPSCR_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2023

WREG32(base_reg + mmSTM_STMSPER_OFFSET, lower_32_bits(input->sp_mask));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2024

WREG32(base_reg + mmSTM_STMITATBID_OFFSET, input->id);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2025

WREG32(base_reg + mmSTM_STMHEMASTR_OFFSET, 0x80);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2029

WREG32(base_reg + mmSTM_STMTSFREQR_OFFSET, frequency);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2030

WREG32(base_reg + mmSTM_STMSYNCR_OFFSET, 0x7FF);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2031

WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 0x27 | (input->id << 16));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2033

WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 4);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2034

WREG32(base_reg + mmSTM_STMHEMCR_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2035

WREG32(base_reg + mmSTM_STMHEBSR_OFFSET, 1);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2036

WREG32(base_reg + mmSTM_STMHEER_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2037

WREG32(base_reg + mmSTM_STMHETER_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2038

WREG32(base_reg + mmSTM_STMHEBSR_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2039

WREG32(base_reg + mmSTM_STMSPTER_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2040

WREG32(base_reg + mmSTM_STMSPER_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2041

WREG32(base_reg + mmSTM_STMHEMASTR_OFFSET, 0x80);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2042

WREG32(base_reg + mmSTM_STMSPTRIGCSR_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2043

WREG32(base_reg + mmSTM_STMSPSCR_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2044

WREG32(base_reg + mmSTM_STMSPMSCR_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2045

WREG32(base_reg + mmSTM_STMTSFREQR_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2053

WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 4);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2102

WREG32(base_reg + mmETF_FFCR_OFFSET, val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2104

WREG32(base_reg + mmETF_FFCR_OFFSET, val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2120

WREG32(base_reg + mmETF_CTL_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2131

WREG32(base_reg + mmETF_PSCR_OFFSET, val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2133

WREG32(base_reg + mmETF_PSCR_OFFSET, 0x10);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2136

WREG32(base_reg + mmETF_BUFWM_OFFSET, 0x3FFC);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2137

WREG32(base_reg + mmETF_MODE_OFFSET, input->sink_mode);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2138

WREG32(base_reg + mmETF_FFCR_OFFSET, 0x4001);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2139

WREG32(base_reg + mmETF_CTL_OFFSET, 1);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2141

WREG32(base_reg + mmETF_BUFWM_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2142

WREG32(base_reg + mmETF_MODE_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2143

WREG32(base_reg + mmETF_FFCR_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2211

WREG32(mmPSOC_ETR_FFCR, val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2213

WREG32(mmPSOC_ETR_FFCR, val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2229

WREG32(mmPSOC_ETR_CTL, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2251

WREG32(mmPSOC_GLOBAL_CONF_TRACE_ADDR, msb);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2253

WREG32(mmPSOC_ETR_BUFWM, 0x3FFC);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2254

WREG32(mmPSOC_ETR_RSZ, input->buffer_size);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2255

WREG32(mmPSOC_ETR_MODE, input->sink_mode);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2264

WREG32(mmPSOC_ETR_AXICTL, val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2266

WREG32(mmPSOC_ETR_DBALO, lower_32_bits(input->buffer_address));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2267

WREG32(mmPSOC_ETR_DBAHI, upper_32_bits(input->buffer_address));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2268

WREG32(mmPSOC_ETR_FFCR, 3);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2269

WREG32(mmPSOC_ETR_PSCR, 0x10);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2270

WREG32(mmPSOC_ETR_CTL, 1);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2272

WREG32(mmPSOC_ETR_BUFWM, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2273

WREG32(mmPSOC_ETR_RSZ, 0x400);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2274

WREG32(mmPSOC_ETR_DBALO, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2275

WREG32(mmPSOC_ETR_DBAHI, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2276

WREG32(mmPSOC_ETR_PSCR, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2277

WREG32(mmPSOC_ETR_MODE, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2278

WREG32(mmPSOC_ETR_FFCR, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2334

WREG32(base_reg, val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2369

WREG32(base_reg + mmBMON_ATTREN_OFFSET, 1);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2376

WREG32(base_reg + mmBMON_RESET_OFFSET, 0x1);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2384

WREG32(base_reg + mmBMON_ADDRL_S0_OFFSET, lower_32_bits(input->start_addr0));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2385

WREG32(base_reg + mmBMON_ADDRH_S0_OFFSET, upper_32_bits(input->start_addr0));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2386

WREG32(base_reg + mmBMON_ADDRL_E0_OFFSET, lower_32_bits(input->addr_mask0));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2387

WREG32(base_reg + mmBMON_ADDRH_E0_OFFSET, upper_32_bits(input->addr_mask0));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2388

WREG32(base_reg + mmBMON_ADDRL_S1_OFFSET, lower_32_bits(input->start_addr1));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2389

WREG32(base_reg + mmBMON_ADDRH_S1_OFFSET, upper_32_bits(input->start_addr1));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2390

WREG32(base_reg + mmBMON_ADDRL_E1_OFFSET, lower_32_bits(input->addr_mask1));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2391

WREG32(base_reg + mmBMON_ADDRH_E1_OFFSET, upper_32_bits(input->addr_mask1));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2392

WREG32(base_reg + mmBMON_ADDRL_S2_OFFSET, lower_32_bits(input->start_addr2));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2393

WREG32(base_reg + mmBMON_ADDRH_S2_OFFSET, upper_32_bits(input->start_addr2));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2394

WREG32(base_reg + mmBMON_ADDRL_E2_OFFSET, lower_32_bits(input->end_addr2));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2395

WREG32(base_reg + mmBMON_ADDRH_E2_OFFSET, upper_32_bits(input->end_addr2));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2396

WREG32(base_reg + mmBMON_ADDRL_S3_OFFSET, lower_32_bits(input->start_addr3));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2397

WREG32(base_reg + mmBMON_ADDRH_S3_OFFSET, upper_32_bits(input->start_addr3));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2398

WREG32(base_reg + mmBMON_ADDRL_E3_OFFSET, lower_32_bits(input->end_addr3));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2399

WREG32(base_reg + mmBMON_ADDRH_E3_OFFSET, upper_32_bits(input->end_addr3));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2401

WREG32(base_reg + mmBMON_IDL_OFFSET, 0x0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2402

WREG32(base_reg + mmBMON_IDH_OFFSET, 0x0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2404

WREG32(base_reg + mmBMON_ATTREN_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2405

WREG32(base_reg + mmBMON_BW_WIN_OFFSET, input->bw_win);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2406

WREG32(base_reg + mmBMON_WIN_CAPTURE_OFFSET, input->win_capture);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2407

WREG32(base_reg + mmBMON_REDUCTION_OFFSET, 0x1 | (13 << 8));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2408

WREG32(base_reg + mmBMON_STM_TRC_OFFSET, 0x7 | (input->id << 8));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2409

WREG32(base_reg + mmBMON_CR_OFFSET, input->control);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2411

WREG32(base_reg + mmBMON_ADDRL_S0_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2412

WREG32(base_reg + mmBMON_ADDRH_S0_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2413

WREG32(base_reg + mmBMON_ADDRL_E0_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2414

WREG32(base_reg + mmBMON_ADDRH_E0_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2415

WREG32(base_reg + mmBMON_ADDRL_S1_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2416

WREG32(base_reg + mmBMON_ADDRH_S1_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2417

WREG32(base_reg + mmBMON_ADDRL_E1_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2418

WREG32(base_reg + mmBMON_ADDRH_E1_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2419

WREG32(base_reg + mmBMON_ADDRL_S2_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2420

WREG32(base_reg + mmBMON_ADDRH_S2_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2421

WREG32(base_reg + mmBMON_ADDRL_E2_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2422

WREG32(base_reg + mmBMON_ADDRH_E2_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2423

WREG32(base_reg + mmBMON_ADDRL_S3_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2424

WREG32(base_reg + mmBMON_ADDRH_S3_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2425

WREG32(base_reg + mmBMON_ADDRL_E3_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2426

WREG32(base_reg + mmBMON_ADDRH_E3_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2427

WREG32(base_reg + mmBMON_REDUCTION_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2428

WREG32(base_reg + mmBMON_STM_TRC_OFFSET, 0x7 | (0xA << 8));

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2429

WREG32(base_reg + mmBMON_CR_OFFSET, 0x41);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2482

WREG32(base_reg + mmSPMU_PMCR_EL0_OFFSET, 0x41013046);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2483

WREG32(base_reg + mmSPMU_PMCR_EL0_OFFSET, 0x41013040);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2490

WREG32(base_reg + mmSPMU_PMEVTYPER0_EL0_OFFSET + i * 4,

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2493

WREG32(base_reg + mmSPMU_PMTRC_OFFSET, input->pmtrc_val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2494

WREG32(base_reg + mmSPMU_TRC_CTRL_HOST_OFFSET, input->trc_ctrl_host_val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2495

WREG32(base_reg + mmSPMU_TRC_EN_HOST_OFFSET, input->trc_en_host_val);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2497

WREG32(base_reg + mmSPMU_PMCR_EL0_OFFSET, 0x41013041);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2506

WREG32(base_reg + mmSPMU_PMCNTENSET_EL0_OFFSET, event_mask);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2514

WREG32(base_reg + mmSPMU_PMCR_EL0_OFFSET, 0x41013040);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2536

WREG32(base_reg + mmSPMU_PMOVSSET_EL0_OFFSET, 0);

drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c

2539

WREG32(base_reg + mmSPMU_PMTRC_OFFSET, 0x100400);

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

2758

WREG32(sec_entry, sec_array[i]);

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

2767

WREG32(sec_entry, sec_array[j]);

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

2824

WREG32(base + reg_min_offset, write_min);

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

2825

WREG32(base + reg_max_offset, write_max);

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

3050

WREG32(base + min_lo_reg_offset, lower_32_bits(val_min));

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

3051

WREG32(base + min_hi_reg_offset, upper_32_bits(val_min));

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

3052

WREG32(base + max_lo_reg_offset, lower_32_bits(val_max));

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

3053

WREG32(base + max_hi_reg_offset, upper_32_bits(val_max));

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

3164

WREG32(base + min_lo_reg_offset, lower_32_bits(rr_cfg->min));

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

3165

WREG32(base + min_hi_reg_offset, upper_32_bits(rr_cfg->min));

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

3166

WREG32(base + max_lo_reg_offset, lower_32_bits(rr_cfg->max));

drivers/accel/habanalabs/gaudi2/gaudi2_security.c

3167

WREG32(base + max_hi_reg_offset, upper_32_bits(rr_cfg->max));

drivers/accel/habanalabs/goya/goya.c

1100

WREG32(mmDMA_QM_0_PQ_BASE_LO + reg_off, lower_32_bits(bus_address));

drivers/accel/habanalabs/goya/goya.c

1101

WREG32(mmDMA_QM_0_PQ_BASE_HI + reg_off, upper_32_bits(bus_address));

drivers/accel/habanalabs/goya/goya.c

1103

WREG32(mmDMA_QM_0_PQ_SIZE + reg_off, ilog2(HL_QUEUE_LENGTH));

drivers/accel/habanalabs/goya/goya.c

1104

WREG32(mmDMA_QM_0_PQ_PI + reg_off, 0);

drivers/accel/habanalabs/goya/goya.c

1105

WREG32(mmDMA_QM_0_PQ_CI + reg_off, 0);

drivers/accel/habanalabs/goya/goya.c

1107

WREG32(mmDMA_QM_0_CP_MSG_BASE0_ADDR_LO + reg_off, mtr_base_lo);

drivers/accel/habanalabs/goya/goya.c

1108

WREG32(mmDMA_QM_0_CP_MSG_BASE0_ADDR_HI + reg_off, mtr_base_hi);

drivers/accel/habanalabs/goya/goya.c

1109

WREG32(mmDMA_QM_0_CP_MSG_BASE1_ADDR_LO + reg_off, so_base_lo);

drivers/accel/habanalabs/goya/goya.c

1110

WREG32(mmDMA_QM_0_CP_MSG_BASE1_ADDR_HI + reg_off, so_base_hi);

drivers/accel/habanalabs/goya/goya.c

1111

WREG32(mmDMA_QM_0_GLBL_ERR_ADDR_LO + reg_off, gic_base_lo);

drivers/accel/habanalabs/goya/goya.c

1112

WREG32(mmDMA_QM_0_GLBL_ERR_ADDR_HI + reg_off, gic_base_hi);

drivers/accel/habanalabs/goya/goya.c

1113

WREG32(mmDMA_QM_0_GLBL_ERR_WDATA + reg_off,

drivers/accel/habanalabs/goya/goya.c

1117

WREG32(mmDMA_QM_0_PQ_CFG1 + reg_off, 0x00020002);

drivers/accel/habanalabs/goya/goya.c

1118

WREG32(mmDMA_QM_0_CQ_CFG1 + reg_off, 0x00080008);

drivers/accel/habanalabs/goya/goya.c

1121

WREG32(mmDMA_QM_0_GLBL_PROT + reg_off, QMAN_DMA_PARTLY_TRUSTED);

drivers/accel/habanalabs/goya/goya.c

1123

WREG32(mmDMA_QM_0_GLBL_PROT + reg_off, QMAN_DMA_FULLY_TRUSTED);

drivers/accel/habanalabs/goya/goya.c

1128

WREG32(mmDMA_QM_0_GLBL_ERR_CFG + reg_off, dma_err_cfg);

drivers/accel/habanalabs/goya/goya.c

1129

WREG32(mmDMA_QM_0_GLBL_CFG0 + reg_off, QMAN_DMA_ENABLE);

drivers/accel/habanalabs/goya/goya.c

1143

WREG32(mmDMA_CH_0_ERRMSG_ADDR_LO + reg_off, gic_base_lo);

drivers/accel/habanalabs/goya/goya.c

1144

WREG32(mmDMA_CH_0_ERRMSG_ADDR_HI + reg_off, gic_base_hi);

drivers/accel/habanalabs/goya/goya.c

1145

WREG32(mmDMA_CH_0_ERRMSG_WDATA + reg_off,

drivers/accel/habanalabs/goya/goya.c

1154

WREG32(mmDMA_CH_0_WR_COMP_ADDR_HI + reg_off, upper_32_bits(sob_addr));

drivers/accel/habanalabs/goya/goya.c

1155

WREG32(mmDMA_CH_0_WR_COMP_WDATA + reg_off, 0x80000001);

drivers/accel/habanalabs/goya/goya.c

1199

WREG32(mmDMA_QM_0_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

1200

WREG32(mmDMA_QM_1_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

1201

WREG32(mmDMA_QM_2_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

1202

WREG32(mmDMA_QM_3_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

1203

WREG32(mmDMA_QM_4_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

1214

WREG32(cfg_reg, 1 << TPC0_QM_GLBL_CFG1_CP_STOP_SHIFT);

drivers/accel/habanalabs/goya/goya.c

1343

WREG32(mmCPU_PQ_BASE_ADDR_LOW, lower_32_bits(cpu_pq->bus_address));

drivers/accel/habanalabs/goya/goya.c

1344

WREG32(mmCPU_PQ_BASE_ADDR_HIGH, upper_32_bits(cpu_pq->bus_address));

drivers/accel/habanalabs/goya/goya.c

1346

WREG32(mmCPU_EQ_BASE_ADDR_LOW, lower_32_bits(eq->bus_address));

drivers/accel/habanalabs/goya/goya.c

1347

WREG32(mmCPU_EQ_BASE_ADDR_HIGH, upper_32_bits(eq->bus_address));

drivers/accel/habanalabs/goya/goya.c

1349

WREG32(mmCPU_CQ_BASE_ADDR_LOW,

drivers/accel/habanalabs/goya/goya.c

1351

WREG32(mmCPU_CQ_BASE_ADDR_HIGH,

drivers/accel/habanalabs/goya/goya.c

1354

WREG32(mmCPU_PQ_LENGTH, HL_QUEUE_SIZE_IN_BYTES);

drivers/accel/habanalabs/goya/goya.c

1355

WREG32(mmCPU_EQ_LENGTH, HL_EQ_SIZE_IN_BYTES);

drivers/accel/habanalabs/goya/goya.c

1356

WREG32(mmCPU_CQ_LENGTH, HL_CPU_ACCESSIBLE_MEM_SIZE);

drivers/accel/habanalabs/goya/goya.c

1359

WREG32(mmCPU_EQ_CI, 0);

drivers/accel/habanalabs/goya/goya.c

1361

WREG32(mmCPU_IF_PF_PQ_PI, 0);

drivers/accel/habanalabs/goya/goya.c

1363

WREG32(mmCPU_PQ_INIT_STATUS, PQ_INIT_STATUS_READY_FOR_CP);

drivers/accel/habanalabs/goya/goya.c

1365

WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,

drivers/accel/habanalabs/goya/goya.c

1395

WREG32(mmCPU_PLL_DIV_SEL_0, 0x0);

drivers/accel/habanalabs/goya/goya.c

1396

WREG32(mmCPU_PLL_DIV_SEL_1, 0x0);

drivers/accel/habanalabs/goya/goya.c

1397

WREG32(mmCPU_PLL_DIV_SEL_2, 0x0);

drivers/accel/habanalabs/goya/goya.c

1398

WREG32(mmCPU_PLL_DIV_SEL_3, 0x0);

drivers/accel/habanalabs/goya/goya.c

1400

WREG32(mmIC_PLL_DIV_SEL_0, 0x0);

drivers/accel/habanalabs/goya/goya.c

1401

WREG32(mmIC_PLL_DIV_SEL_1, 0x0);

drivers/accel/habanalabs/goya/goya.c

1402

WREG32(mmIC_PLL_DIV_SEL_2, 0x0);

drivers/accel/habanalabs/goya/goya.c

1403

WREG32(mmIC_PLL_DIV_SEL_3, 0x0);

drivers/accel/habanalabs/goya/goya.c

1405

WREG32(mmMC_PLL_DIV_SEL_0, 0x0);

drivers/accel/habanalabs/goya/goya.c

1406

WREG32(mmMC_PLL_DIV_SEL_1, 0x0);

drivers/accel/habanalabs/goya/goya.c

1407

WREG32(mmMC_PLL_DIV_SEL_2, 0x0);

drivers/accel/habanalabs/goya/goya.c

1408

WREG32(mmMC_PLL_DIV_SEL_3, 0x0);

drivers/accel/habanalabs/goya/goya.c

1410

WREG32(mmPSOC_MME_PLL_DIV_SEL_0, 0x0);

drivers/accel/habanalabs/goya/goya.c

1411

WREG32(mmPSOC_MME_PLL_DIV_SEL_1, 0x0);

drivers/accel/habanalabs/goya/goya.c

1412

WREG32(mmPSOC_MME_PLL_DIV_SEL_2, 0x0);

drivers/accel/habanalabs/goya/goya.c

1413

WREG32(mmPSOC_MME_PLL_DIV_SEL_3, 0x0);

drivers/accel/habanalabs/goya/goya.c

1415

WREG32(mmPSOC_PCI_PLL_DIV_SEL_0, 0x0);

drivers/accel/habanalabs/goya/goya.c

1416

WREG32(mmPSOC_PCI_PLL_DIV_SEL_1, 0x0);

drivers/accel/habanalabs/goya/goya.c

1417

WREG32(mmPSOC_PCI_PLL_DIV_SEL_2, 0x0);

drivers/accel/habanalabs/goya/goya.c

1418

WREG32(mmPSOC_PCI_PLL_DIV_SEL_3, 0x0);

drivers/accel/habanalabs/goya/goya.c

1420

WREG32(mmPSOC_EMMC_PLL_DIV_SEL_0, 0x0);

drivers/accel/habanalabs/goya/goya.c

1421

WREG32(mmPSOC_EMMC_PLL_DIV_SEL_1, 0x0);

drivers/accel/habanalabs/goya/goya.c

1422

WREG32(mmPSOC_EMMC_PLL_DIV_SEL_2, 0x0);

drivers/accel/habanalabs/goya/goya.c

1423

WREG32(mmPSOC_EMMC_PLL_DIV_SEL_3, 0x0);

drivers/accel/habanalabs/goya/goya.c

1425

WREG32(mmTPC_PLL_DIV_SEL_0, 0x0);

drivers/accel/habanalabs/goya/goya.c

1426

WREG32(mmTPC_PLL_DIV_SEL_1, 0x0);

drivers/accel/habanalabs/goya/goya.c

1427

WREG32(mmTPC_PLL_DIV_SEL_2, 0x0);

drivers/accel/habanalabs/goya/goya.c

1428

WREG32(mmTPC_PLL_DIV_SEL_3, 0x0);

drivers/accel/habanalabs/goya/goya.c

1433

WREG32(mmPSOC_MME_PLL_CLK_RLX_0, 0x100010);

drivers/accel/habanalabs/goya/goya.c

1434

WREG32(mmIC_PLL_CLK_RLX_0, 0x100010);

drivers/accel/habanalabs/goya/goya.c

1458

WREG32(mmTPC0_CFG_FUNC_MBIST_PAT + tpc_offset, val & 0xFFFFF000);

drivers/accel/habanalabs/goya/goya.c

1460

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_0 + tpc_offset, 0x37FF);

drivers/accel/habanalabs/goya/goya.c

1461

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_1 + tpc_offset, 0x303F);

drivers/accel/habanalabs/goya/goya.c

1462

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_2 + tpc_offset, 0x71FF);

drivers/accel/habanalabs/goya/goya.c

1463

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_3 + tpc_offset, 0x71FF);

drivers/accel/habanalabs/goya/goya.c

1464

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_4 + tpc_offset, 0x70FF);

drivers/accel/habanalabs/goya/goya.c

1465

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_5 + tpc_offset, 0x70FF);

drivers/accel/habanalabs/goya/goya.c

1466

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_6 + tpc_offset, 0x70FF);

drivers/accel/habanalabs/goya/goya.c

1467

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_7 + tpc_offset, 0x70FF);

drivers/accel/habanalabs/goya/goya.c

1468

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_8 + tpc_offset, 0x70FF);

drivers/accel/habanalabs/goya/goya.c

1469

WREG32(mmTPC0_CFG_FUNC_MBIST_MEM_9 + tpc_offset, 0x70FF);

drivers/accel/habanalabs/goya/goya.c

1497

WREG32(tpc_slm_offset + (slm_index << 2), 0);

drivers/accel/habanalabs/goya/goya.c

1553

WREG32(mmSRAM_Y0_X0_RTR_HBW_RD_RQ_L_ARB + offset, 0x302);

drivers/accel/habanalabs/goya/goya.c

1554

WREG32(mmSRAM_Y0_X1_RTR_HBW_RD_RQ_L_ARB + offset, 0x302);

drivers/accel/habanalabs/goya/goya.c

1555

WREG32(mmSRAM_Y0_X2_RTR_HBW_RD_RQ_L_ARB + offset, 0x302);

drivers/accel/habanalabs/goya/goya.c

1556

WREG32(mmSRAM_Y0_X3_RTR_HBW_RD_RQ_L_ARB + offset, 0x302);

drivers/accel/habanalabs/goya/goya.c

1557

WREG32(mmSRAM_Y0_X4_RTR_HBW_RD_RQ_L_ARB + offset, 0x302);

drivers/accel/habanalabs/goya/goya.c

1559

WREG32(mmSRAM_Y0_X0_RTR_HBW_DATA_L_ARB + offset, 0x204);

drivers/accel/habanalabs/goya/goya.c

1560

WREG32(mmSRAM_Y0_X1_RTR_HBW_DATA_L_ARB + offset, 0x204);

drivers/accel/habanalabs/goya/goya.c

1561

WREG32(mmSRAM_Y0_X2_RTR_HBW_DATA_L_ARB + offset, 0x204);

drivers/accel/habanalabs/goya/goya.c

1562

WREG32(mmSRAM_Y0_X3_RTR_HBW_DATA_L_ARB + offset, 0x204);

drivers/accel/habanalabs/goya/goya.c

1563

WREG32(mmSRAM_Y0_X4_RTR_HBW_DATA_L_ARB + offset, 0x204);

drivers/accel/habanalabs/goya/goya.c

1566

WREG32(mmSRAM_Y0_X0_RTR_HBW_DATA_E_ARB + offset, 0x206);

drivers/accel/habanalabs/goya/goya.c

1567

WREG32(mmSRAM_Y0_X1_RTR_HBW_DATA_E_ARB + offset, 0x206);

drivers/accel/habanalabs/goya/goya.c

1568

WREG32(mmSRAM_Y0_X2_RTR_HBW_DATA_E_ARB + offset, 0x206);

drivers/accel/habanalabs/goya/goya.c

1569

WREG32(mmSRAM_Y0_X3_RTR_HBW_DATA_E_ARB + offset, 0x207);

drivers/accel/habanalabs/goya/goya.c

1570

WREG32(mmSRAM_Y0_X4_RTR_HBW_DATA_E_ARB + offset, 0x207);

drivers/accel/habanalabs/goya/goya.c

1572

WREG32(mmSRAM_Y0_X0_RTR_HBW_DATA_W_ARB + offset, 0x207);

drivers/accel/habanalabs/goya/goya.c

1573

WREG32(mmSRAM_Y0_X1_RTR_HBW_DATA_W_ARB + offset, 0x207);

drivers/accel/habanalabs/goya/goya.c

1574

WREG32(mmSRAM_Y0_X2_RTR_HBW_DATA_W_ARB + offset, 0x206);

drivers/accel/habanalabs/goya/goya.c

1575

WREG32(mmSRAM_Y0_X3_RTR_HBW_DATA_W_ARB + offset, 0x206);

drivers/accel/habanalabs/goya/goya.c

1576

WREG32(mmSRAM_Y0_X4_RTR_HBW_DATA_W_ARB + offset, 0x206);

drivers/accel/habanalabs/goya/goya.c

1578

WREG32(mmSRAM_Y0_X0_RTR_HBW_WR_RS_E_ARB + offset, 0x101);

drivers/accel/habanalabs/goya/goya.c

1579

WREG32(mmSRAM_Y0_X1_RTR_HBW_WR_RS_E_ARB + offset, 0x102);

drivers/accel/habanalabs/goya/goya.c

1580

WREG32(mmSRAM_Y0_X2_RTR_HBW_WR_RS_E_ARB + offset, 0x103);

drivers/accel/habanalabs/goya/goya.c

1581

WREG32(mmSRAM_Y0_X3_RTR_HBW_WR_RS_E_ARB + offset, 0x104);

drivers/accel/habanalabs/goya/goya.c

1582

WREG32(mmSRAM_Y0_X4_RTR_HBW_WR_RS_E_ARB + offset, 0x105);

drivers/accel/habanalabs/goya/goya.c

1584

WREG32(mmSRAM_Y0_X0_RTR_HBW_WR_RS_W_ARB + offset, 0x105);

drivers/accel/habanalabs/goya/goya.c

1585

WREG32(mmSRAM_Y0_X1_RTR_HBW_WR_RS_W_ARB + offset, 0x104);

drivers/accel/habanalabs/goya/goya.c

1586

WREG32(mmSRAM_Y0_X2_RTR_HBW_WR_RS_W_ARB + offset, 0x103);

drivers/accel/habanalabs/goya/goya.c

1587

WREG32(mmSRAM_Y0_X3_RTR_HBW_WR_RS_W_ARB + offset, 0x102);

drivers/accel/habanalabs/goya/goya.c

1588

WREG32(mmSRAM_Y0_X4_RTR_HBW_WR_RS_W_ARB + offset, 0x101);

drivers/accel/habanalabs/goya/goya.c

1591

WREG32(mmMME_STORE_MAX_CREDIT, 0x21);

drivers/accel/habanalabs/goya/goya.c

1592

WREG32(mmMME_AGU, 0x0f0f0f10);

drivers/accel/habanalabs/goya/goya.c

1593

WREG32(mmMME_SEI_MASK, ~0x0);

drivers/accel/habanalabs/goya/goya.c

1595

WREG32(mmMME6_RTR_HBW_RD_RQ_N_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1596

WREG32(mmMME5_RTR_HBW_RD_RQ_N_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1597

WREG32(mmMME4_RTR_HBW_RD_RQ_N_ARB, 0x01030101);

drivers/accel/habanalabs/goya/goya.c

1598

WREG32(mmMME3_RTR_HBW_RD_RQ_N_ARB, 0x01020101);

drivers/accel/habanalabs/goya/goya.c

1599

WREG32(mmMME2_RTR_HBW_RD_RQ_N_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1600

WREG32(mmMME1_RTR_HBW_RD_RQ_N_ARB, 0x07010701);

drivers/accel/habanalabs/goya/goya.c

1601

WREG32(mmMME6_RTR_HBW_RD_RQ_S_ARB, 0x04010401);

drivers/accel/habanalabs/goya/goya.c

1602

WREG32(mmMME5_RTR_HBW_RD_RQ_S_ARB, 0x04050401);

drivers/accel/habanalabs/goya/goya.c

1603

WREG32(mmMME4_RTR_HBW_RD_RQ_S_ARB, 0x03070301);

drivers/accel/habanalabs/goya/goya.c

1604

WREG32(mmMME3_RTR_HBW_RD_RQ_S_ARB, 0x01030101);

drivers/accel/habanalabs/goya/goya.c

1605

WREG32(mmMME2_RTR_HBW_RD_RQ_S_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1606

WREG32(mmMME1_RTR_HBW_RD_RQ_S_ARB, 0x01050105);

drivers/accel/habanalabs/goya/goya.c

1607

WREG32(mmMME6_RTR_HBW_RD_RQ_W_ARB, 0x01010501);

drivers/accel/habanalabs/goya/goya.c

1608

WREG32(mmMME5_RTR_HBW_RD_RQ_W_ARB, 0x01010501);

drivers/accel/habanalabs/goya/goya.c

1609

WREG32(mmMME4_RTR_HBW_RD_RQ_W_ARB, 0x01040301);

drivers/accel/habanalabs/goya/goya.c

1610

WREG32(mmMME3_RTR_HBW_RD_RQ_W_ARB, 0x01030401);

drivers/accel/habanalabs/goya/goya.c

1611

WREG32(mmMME2_RTR_HBW_RD_RQ_W_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1612

WREG32(mmMME1_RTR_HBW_RD_RQ_W_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1613

WREG32(mmMME6_RTR_HBW_WR_RQ_N_ARB, 0x02020202);

drivers/accel/habanalabs/goya/goya.c

1614

WREG32(mmMME5_RTR_HBW_WR_RQ_N_ARB, 0x01070101);

drivers/accel/habanalabs/goya/goya.c

1615

WREG32(mmMME4_RTR_HBW_WR_RQ_N_ARB, 0x02020201);

drivers/accel/habanalabs/goya/goya.c

1616

WREG32(mmMME3_RTR_HBW_WR_RQ_N_ARB, 0x07020701);

drivers/accel/habanalabs/goya/goya.c

1617

WREG32(mmMME2_RTR_HBW_WR_RQ_N_ARB, 0x01020101);

drivers/accel/habanalabs/goya/goya.c

1618

WREG32(mmMME1_RTR_HBW_WR_RQ_S_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1619

WREG32(mmMME6_RTR_HBW_WR_RQ_S_ARB, 0x01070101);

drivers/accel/habanalabs/goya/goya.c

1620

WREG32(mmMME5_RTR_HBW_WR_RQ_S_ARB, 0x01070101);

drivers/accel/habanalabs/goya/goya.c

1621

WREG32(mmMME4_RTR_HBW_WR_RQ_S_ARB, 0x07020701);

drivers/accel/habanalabs/goya/goya.c

1622

WREG32(mmMME3_RTR_HBW_WR_RQ_S_ARB, 0x02020201);

drivers/accel/habanalabs/goya/goya.c

1623

WREG32(mmMME2_RTR_HBW_WR_RQ_S_ARB, 0x01070101);

drivers/accel/habanalabs/goya/goya.c

1624

WREG32(mmMME1_RTR_HBW_WR_RQ_S_ARB, 0x01020102);

drivers/accel/habanalabs/goya/goya.c

1625

WREG32(mmMME6_RTR_HBW_WR_RQ_W_ARB, 0x01020701);

drivers/accel/habanalabs/goya/goya.c

1626

WREG32(mmMME5_RTR_HBW_WR_RQ_W_ARB, 0x01020701);

drivers/accel/habanalabs/goya/goya.c

1627

WREG32(mmMME4_RTR_HBW_WR_RQ_W_ARB, 0x07020707);

drivers/accel/habanalabs/goya/goya.c

1628

WREG32(mmMME3_RTR_HBW_WR_RQ_W_ARB, 0x01020201);

drivers/accel/habanalabs/goya/goya.c

1629

WREG32(mmMME2_RTR_HBW_WR_RQ_W_ARB, 0x01070201);

drivers/accel/habanalabs/goya/goya.c

1630

WREG32(mmMME1_RTR_HBW_WR_RQ_W_ARB, 0x01070201);

drivers/accel/habanalabs/goya/goya.c

1631

WREG32(mmMME6_RTR_HBW_RD_RS_N_ARB, 0x01070102);

drivers/accel/habanalabs/goya/goya.c

1632

WREG32(mmMME5_RTR_HBW_RD_RS_N_ARB, 0x01070102);

drivers/accel/habanalabs/goya/goya.c

1633

WREG32(mmMME4_RTR_HBW_RD_RS_N_ARB, 0x01060102);

drivers/accel/habanalabs/goya/goya.c

1634

WREG32(mmMME3_RTR_HBW_RD_RS_N_ARB, 0x01040102);

drivers/accel/habanalabs/goya/goya.c

1635

WREG32(mmMME2_RTR_HBW_RD_RS_N_ARB, 0x01020102);

drivers/accel/habanalabs/goya/goya.c

1636

WREG32(mmMME1_RTR_HBW_RD_RS_N_ARB, 0x01020107);

drivers/accel/habanalabs/goya/goya.c

1637

WREG32(mmMME6_RTR_HBW_RD_RS_S_ARB, 0x01020106);

drivers/accel/habanalabs/goya/goya.c

1638

WREG32(mmMME5_RTR_HBW_RD_RS_S_ARB, 0x01020102);

drivers/accel/habanalabs/goya/goya.c

1639

WREG32(mmMME4_RTR_HBW_RD_RS_S_ARB, 0x01040102);

drivers/accel/habanalabs/goya/goya.c

1640

WREG32(mmMME3_RTR_HBW_RD_RS_S_ARB, 0x01060102);

drivers/accel/habanalabs/goya/goya.c

1641

WREG32(mmMME2_RTR_HBW_RD_RS_S_ARB, 0x01070102);

drivers/accel/habanalabs/goya/goya.c

1642

WREG32(mmMME1_RTR_HBW_RD_RS_S_ARB, 0x01070102);

drivers/accel/habanalabs/goya/goya.c

1643

WREG32(mmMME6_RTR_HBW_RD_RS_E_ARB, 0x01020702);

drivers/accel/habanalabs/goya/goya.c

1644

WREG32(mmMME5_RTR_HBW_RD_RS_E_ARB, 0x01020702);

drivers/accel/habanalabs/goya/goya.c

1645

WREG32(mmMME4_RTR_HBW_RD_RS_E_ARB, 0x01040602);

drivers/accel/habanalabs/goya/goya.c

1646

WREG32(mmMME3_RTR_HBW_RD_RS_E_ARB, 0x01060402);

drivers/accel/habanalabs/goya/goya.c

1647

WREG32(mmMME2_RTR_HBW_RD_RS_E_ARB, 0x01070202);

drivers/accel/habanalabs/goya/goya.c

1648

WREG32(mmMME1_RTR_HBW_RD_RS_E_ARB, 0x01070102);

drivers/accel/habanalabs/goya/goya.c

1649

WREG32(mmMME6_RTR_HBW_RD_RS_W_ARB, 0x01060401);

drivers/accel/habanalabs/goya/goya.c

1650

WREG32(mmMME5_RTR_HBW_RD_RS_W_ARB, 0x01060401);

drivers/accel/habanalabs/goya/goya.c

1651

WREG32(mmMME4_RTR_HBW_RD_RS_W_ARB, 0x01060401);

drivers/accel/habanalabs/goya/goya.c

1652

WREG32(mmMME3_RTR_HBW_RD_RS_W_ARB, 0x01060401);

drivers/accel/habanalabs/goya/goya.c

1653

WREG32(mmMME2_RTR_HBW_RD_RS_W_ARB, 0x01060401);

drivers/accel/habanalabs/goya/goya.c

1654

WREG32(mmMME1_RTR_HBW_RD_RS_W_ARB, 0x01060401);

drivers/accel/habanalabs/goya/goya.c

1655

WREG32(mmMME6_RTR_HBW_WR_RS_N_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1656

WREG32(mmMME5_RTR_HBW_WR_RS_N_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1657

WREG32(mmMME4_RTR_HBW_WR_RS_N_ARB, 0x01030101);

drivers/accel/habanalabs/goya/goya.c

1658

WREG32(mmMME3_RTR_HBW_WR_RS_N_ARB, 0x01020101);

drivers/accel/habanalabs/goya/goya.c

1659

WREG32(mmMME2_RTR_HBW_WR_RS_N_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1660

WREG32(mmMME1_RTR_HBW_WR_RS_N_ARB, 0x01010107);

drivers/accel/habanalabs/goya/goya.c

1661

WREG32(mmMME6_RTR_HBW_WR_RS_S_ARB, 0x01010107);

drivers/accel/habanalabs/goya/goya.c

1662

WREG32(mmMME5_RTR_HBW_WR_RS_S_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1663

WREG32(mmMME4_RTR_HBW_WR_RS_S_ARB, 0x01020101);

drivers/accel/habanalabs/goya/goya.c

1664

WREG32(mmMME3_RTR_HBW_WR_RS_S_ARB, 0x01030101);

drivers/accel/habanalabs/goya/goya.c

1665

WREG32(mmMME2_RTR_HBW_WR_RS_S_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1666

WREG32(mmMME1_RTR_HBW_WR_RS_S_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1667

WREG32(mmMME6_RTR_HBW_WR_RS_E_ARB, 0x01010501);

drivers/accel/habanalabs/goya/goya.c

1668

WREG32(mmMME5_RTR_HBW_WR_RS_E_ARB, 0x01010501);

drivers/accel/habanalabs/goya/goya.c

1669

WREG32(mmMME4_RTR_HBW_WR_RS_E_ARB, 0x01040301);

drivers/accel/habanalabs/goya/goya.c

1670

WREG32(mmMME3_RTR_HBW_WR_RS_E_ARB, 0x01030401);

drivers/accel/habanalabs/goya/goya.c

1671

WREG32(mmMME2_RTR_HBW_WR_RS_E_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1672

WREG32(mmMME1_RTR_HBW_WR_RS_E_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1673

WREG32(mmMME6_RTR_HBW_WR_RS_W_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1674

WREG32(mmMME5_RTR_HBW_WR_RS_W_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1675

WREG32(mmMME4_RTR_HBW_WR_RS_W_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1676

WREG32(mmMME3_RTR_HBW_WR_RS_W_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1677

WREG32(mmMME2_RTR_HBW_WR_RS_W_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1678

WREG32(mmMME1_RTR_HBW_WR_RS_W_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1680

WREG32(mmTPC1_RTR_HBW_RD_RQ_N_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1681

WREG32(mmTPC1_RTR_HBW_RD_RQ_S_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1682

WREG32(mmTPC1_RTR_HBW_RD_RQ_E_ARB, 0x01060101);

drivers/accel/habanalabs/goya/goya.c

1683

WREG32(mmTPC1_RTR_HBW_WR_RQ_N_ARB, 0x02020102);

drivers/accel/habanalabs/goya/goya.c

1684

WREG32(mmTPC1_RTR_HBW_WR_RQ_S_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1685

WREG32(mmTPC1_RTR_HBW_WR_RQ_E_ARB, 0x02070202);

drivers/accel/habanalabs/goya/goya.c

1686

WREG32(mmTPC1_RTR_HBW_RD_RS_N_ARB, 0x01020201);

drivers/accel/habanalabs/goya/goya.c

1687

WREG32(mmTPC1_RTR_HBW_RD_RS_S_ARB, 0x01070201);

drivers/accel/habanalabs/goya/goya.c

1688

WREG32(mmTPC1_RTR_HBW_RD_RS_W_ARB, 0x01070202);

drivers/accel/habanalabs/goya/goya.c

1689

WREG32(mmTPC1_RTR_HBW_WR_RS_N_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1690

WREG32(mmTPC1_RTR_HBW_WR_RS_S_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1691

WREG32(mmTPC1_RTR_HBW_WR_RS_W_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1693

WREG32(mmTPC2_RTR_HBW_RD_RQ_N_ARB, 0x01020101);

drivers/accel/habanalabs/goya/goya.c

1694

WREG32(mmTPC2_RTR_HBW_RD_RQ_S_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1695

WREG32(mmTPC2_RTR_HBW_RD_RQ_E_ARB, 0x01010201);

drivers/accel/habanalabs/goya/goya.c

1696

WREG32(mmTPC2_RTR_HBW_WR_RQ_N_ARB, 0x02040102);

drivers/accel/habanalabs/goya/goya.c

1697

WREG32(mmTPC2_RTR_HBW_WR_RQ_S_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1698

WREG32(mmTPC2_RTR_HBW_WR_RQ_E_ARB, 0x02060202);

drivers/accel/habanalabs/goya/goya.c

1699

WREG32(mmTPC2_RTR_HBW_RD_RS_N_ARB, 0x01020201);

drivers/accel/habanalabs/goya/goya.c

1700

WREG32(mmTPC2_RTR_HBW_RD_RS_S_ARB, 0x01070201);

drivers/accel/habanalabs/goya/goya.c

1701

WREG32(mmTPC2_RTR_HBW_RD_RS_W_ARB, 0x01070202);

drivers/accel/habanalabs/goya/goya.c

1702

WREG32(mmTPC2_RTR_HBW_WR_RS_N_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1703

WREG32(mmTPC2_RTR_HBW_WR_RS_S_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1704

WREG32(mmTPC2_RTR_HBW_WR_RS_W_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1706

WREG32(mmTPC3_RTR_HBW_RD_RQ_N_ARB, 0x01030101);

drivers/accel/habanalabs/goya/goya.c

1707

WREG32(mmTPC3_RTR_HBW_RD_RQ_S_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1708

WREG32(mmTPC3_RTR_HBW_RD_RQ_E_ARB, 0x01040301);

drivers/accel/habanalabs/goya/goya.c

1709

WREG32(mmTPC3_RTR_HBW_WR_RQ_N_ARB, 0x02060102);

drivers/accel/habanalabs/goya/goya.c

1710

WREG32(mmTPC3_RTR_HBW_WR_RQ_S_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1711

WREG32(mmTPC3_RTR_HBW_WR_RQ_E_ARB, 0x01040301);

drivers/accel/habanalabs/goya/goya.c

1712

WREG32(mmTPC3_RTR_HBW_RD_RS_N_ARB, 0x01040201);

drivers/accel/habanalabs/goya/goya.c

1713

WREG32(mmTPC3_RTR_HBW_RD_RS_S_ARB, 0x01060201);

drivers/accel/habanalabs/goya/goya.c

1714

WREG32(mmTPC3_RTR_HBW_RD_RS_W_ARB, 0x01060402);

drivers/accel/habanalabs/goya/goya.c

1715

WREG32(mmTPC3_RTR_HBW_WR_RS_N_ARB, 0x01020101);

drivers/accel/habanalabs/goya/goya.c

1716

WREG32(mmTPC3_RTR_HBW_WR_RS_S_ARB, 0x01030101);

drivers/accel/habanalabs/goya/goya.c

1717

WREG32(mmTPC3_RTR_HBW_WR_RS_W_ARB, 0x01030401);

drivers/accel/habanalabs/goya/goya.c

1719

WREG32(mmTPC4_RTR_HBW_RD_RQ_N_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1720

WREG32(mmTPC4_RTR_HBW_RD_RQ_S_ARB, 0x01030101);

drivers/accel/habanalabs/goya/goya.c

1721

WREG32(mmTPC4_RTR_HBW_RD_RQ_E_ARB, 0x01030401);

drivers/accel/habanalabs/goya/goya.c

1722

WREG32(mmTPC4_RTR_HBW_WR_RQ_N_ARB, 0x02070102);

drivers/accel/habanalabs/goya/goya.c

1723

WREG32(mmTPC4_RTR_HBW_WR_RQ_S_ARB, 0x01030101);

drivers/accel/habanalabs/goya/goya.c

1724

WREG32(mmTPC4_RTR_HBW_WR_RQ_E_ARB, 0x02060702);

drivers/accel/habanalabs/goya/goya.c

1725

WREG32(mmTPC4_RTR_HBW_RD_RS_N_ARB, 0x01060201);

drivers/accel/habanalabs/goya/goya.c

1726

WREG32(mmTPC4_RTR_HBW_RD_RS_S_ARB, 0x01040201);

drivers/accel/habanalabs/goya/goya.c

1727

WREG32(mmTPC4_RTR_HBW_RD_RS_W_ARB, 0x01040602);

drivers/accel/habanalabs/goya/goya.c

1728

WREG32(mmTPC4_RTR_HBW_WR_RS_N_ARB, 0x01030101);

drivers/accel/habanalabs/goya/goya.c

1729

WREG32(mmTPC4_RTR_HBW_WR_RS_S_ARB, 0x01020101);

drivers/accel/habanalabs/goya/goya.c

1730

WREG32(mmTPC4_RTR_HBW_WR_RS_W_ARB, 0x01040301);

drivers/accel/habanalabs/goya/goya.c

1732

WREG32(mmTPC5_RTR_HBW_RD_RQ_N_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1733

WREG32(mmTPC5_RTR_HBW_RD_RQ_S_ARB, 0x01020101);

drivers/accel/habanalabs/goya/goya.c

1734

WREG32(mmTPC5_RTR_HBW_RD_RQ_E_ARB, 0x01200501);

drivers/accel/habanalabs/goya/goya.c

1735

WREG32(mmTPC5_RTR_HBW_WR_RQ_N_ARB, 0x02070102);

drivers/accel/habanalabs/goya/goya.c

1736

WREG32(mmTPC5_RTR_HBW_WR_RQ_S_ARB, 0x01020101);

drivers/accel/habanalabs/goya/goya.c

1737

WREG32(mmTPC5_RTR_HBW_WR_RQ_E_ARB, 0x02020602);

drivers/accel/habanalabs/goya/goya.c

1738

WREG32(mmTPC5_RTR_HBW_RD_RS_N_ARB, 0x01070201);

drivers/accel/habanalabs/goya/goya.c

1739

WREG32(mmTPC5_RTR_HBW_RD_RS_S_ARB, 0x01020201);

drivers/accel/habanalabs/goya/goya.c

1740

WREG32(mmTPC5_RTR_HBW_RD_RS_W_ARB, 0x01020702);

drivers/accel/habanalabs/goya/goya.c

1741

WREG32(mmTPC5_RTR_HBW_WR_RS_N_ARB, 0x01040101);

drivers/accel/habanalabs/goya/goya.c

1742

WREG32(mmTPC5_RTR_HBW_WR_RS_S_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1743

WREG32(mmTPC5_RTR_HBW_WR_RS_W_ARB, 0x01010501);

drivers/accel/habanalabs/goya/goya.c

1745

WREG32(mmTPC6_RTR_HBW_RD_RQ_N_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1746

WREG32(mmTPC6_RTR_HBW_RD_RQ_S_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1747

WREG32(mmTPC6_RTR_HBW_RD_RQ_E_ARB, 0x01010601);

drivers/accel/habanalabs/goya/goya.c

1748

WREG32(mmTPC6_RTR_HBW_WR_RQ_N_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1749

WREG32(mmTPC6_RTR_HBW_WR_RQ_S_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1750

WREG32(mmTPC6_RTR_HBW_WR_RQ_E_ARB, 0x02020702);

drivers/accel/habanalabs/goya/goya.c

1751

WREG32(mmTPC6_RTR_HBW_RD_RS_N_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1752

WREG32(mmTPC6_RTR_HBW_RD_RS_S_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1753

WREG32(mmTPC6_RTR_HBW_RD_RS_W_ARB, 0x01020702);

drivers/accel/habanalabs/goya/goya.c

1754

WREG32(mmTPC6_RTR_HBW_WR_RS_N_ARB, 0x01050101);

drivers/accel/habanalabs/goya/goya.c

1755

WREG32(mmTPC6_RTR_HBW_WR_RS_S_ARB, 0x01010101);

drivers/accel/habanalabs/goya/goya.c

1756

WREG32(mmTPC6_RTR_HBW_WR_RS_W_ARB, 0x01010501);

drivers/accel/habanalabs/goya/goya.c

1759

WREG32(mmMME1_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1760

WREG32(mmMME2_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1761

WREG32(mmMME3_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1762

WREG32(mmMME4_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1763

WREG32(mmMME5_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1764

WREG32(mmMME6_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1766

WREG32(mmTPC0_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1767

WREG32(mmTPC1_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1768

WREG32(mmTPC2_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1769

WREG32(mmTPC3_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1770

WREG32(mmTPC4_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1771

WREG32(mmTPC5_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1772

WREG32(mmTPC6_RTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1773

WREG32(mmTPC7_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1775

WREG32(mmPCI_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1776

WREG32(mmDMA_NRTR_SPLIT_COEF_0 + offset, polynom[i] >> 7);

drivers/accel/habanalabs/goya/goya.c

1780

WREG32(mmMME1_RTR_SCRAMB_EN + offset,

drivers/accel/habanalabs/goya/goya.c

1782

WREG32(mmMME1_RTR_NON_LIN_SCRAMB + offset,

drivers/accel/habanalabs/goya/goya.c

1791

WREG32(mmTPC0_CFG_TPC_INTR_MASK + offset, tpc_intr_mask);

drivers/accel/habanalabs/goya/goya.c

1793

WREG32(mmTPC0_NRTR_SCRAMB_EN + offset,

drivers/accel/habanalabs/goya/goya.c

1795

WREG32(mmTPC0_NRTR_NON_LIN_SCRAMB + offset,

drivers/accel/habanalabs/goya/goya.c

1802

WREG32(mmDMA_NRTR_SCRAMB_EN, 1 << DMA_NRTR_SCRAMB_EN_VAL_SHIFT);

drivers/accel/habanalabs/goya/goya.c

1803

WREG32(mmDMA_NRTR_NON_LIN_SCRAMB,

drivers/accel/habanalabs/goya/goya.c

1806

WREG32(mmPCI_NRTR_SCRAMB_EN, 1 << PCI_NRTR_SCRAMB_EN_VAL_SHIFT);

drivers/accel/habanalabs/goya/goya.c

1807

WREG32(mmPCI_NRTR_NON_LIN_SCRAMB,

drivers/accel/habanalabs/goya/goya.c

1817

WREG32(mmDMA_CH_1_CFG0, 0x0fff00F0);

drivers/accel/habanalabs/goya/goya.c

1819

WREG32(mmTPC_PLL_CLK_RLX_0, 0x200020);

drivers/accel/habanalabs/goya/goya.c

1844

WREG32(mmMME_QM_PQ_BASE_LO, lower_32_bits(qman_base_addr));

drivers/accel/habanalabs/goya/goya.c

1845

WREG32(mmMME_QM_PQ_BASE_HI, upper_32_bits(qman_base_addr));

drivers/accel/habanalabs/goya/goya.c

1846

WREG32(mmMME_QM_PQ_SIZE, ilog2(MME_QMAN_LENGTH));

drivers/accel/habanalabs/goya/goya.c

1847

WREG32(mmMME_QM_PQ_PI, 0);

drivers/accel/habanalabs/goya/goya.c

1848

WREG32(mmMME_QM_PQ_CI, 0);

drivers/accel/habanalabs/goya/goya.c

1849

WREG32(mmMME_QM_CP_LDMA_SRC_BASE_LO_OFFSET, 0x10C0);

drivers/accel/habanalabs/goya/goya.c

1850

WREG32(mmMME_QM_CP_LDMA_SRC_BASE_HI_OFFSET, 0x10C4);

drivers/accel/habanalabs/goya/goya.c

1851

WREG32(mmMME_QM_CP_LDMA_TSIZE_OFFSET, 0x10C8);

drivers/accel/habanalabs/goya/goya.c

1852

WREG32(mmMME_QM_CP_LDMA_COMMIT_OFFSET, 0x10CC);

drivers/accel/habanalabs/goya/goya.c

1854

WREG32(mmMME_QM_CP_MSG_BASE0_ADDR_LO, mtr_base_lo);

drivers/accel/habanalabs/goya/goya.c

1855

WREG32(mmMME_QM_CP_MSG_BASE0_ADDR_HI, mtr_base_hi);

drivers/accel/habanalabs/goya/goya.c

1856

WREG32(mmMME_QM_CP_MSG_BASE1_ADDR_LO, so_base_lo);

drivers/accel/habanalabs/goya/goya.c

1857

WREG32(mmMME_QM_CP_MSG_BASE1_ADDR_HI, so_base_hi);

drivers/accel/habanalabs/goya/goya.c

1860

WREG32(mmMME_QM_CQ_CFG1, 0x00080008);

drivers/accel/habanalabs/goya/goya.c

1862

WREG32(mmMME_QM_GLBL_ERR_ADDR_LO, gic_base_lo);

drivers/accel/habanalabs/goya/goya.c

1863

WREG32(mmMME_QM_GLBL_ERR_ADDR_HI, gic_base_hi);

drivers/accel/habanalabs/goya/goya.c

1865

WREG32(mmMME_QM_GLBL_ERR_WDATA, GOYA_ASYNC_EVENT_ID_MME_QM);

drivers/accel/habanalabs/goya/goya.c

1867

WREG32(mmMME_QM_GLBL_ERR_CFG, QMAN_MME_ERR_MSG_EN);

drivers/accel/habanalabs/goya/goya.c

1869

WREG32(mmMME_QM_GLBL_PROT, QMAN_MME_ERR_PROT);

drivers/accel/habanalabs/goya/goya.c

1871

WREG32(mmMME_QM_GLBL_CFG0, QMAN_MME_ENABLE);

drivers/accel/habanalabs/goya/goya.c

1890

WREG32(mmMME_CMDQ_CP_MSG_BASE0_ADDR_LO, mtr_base_lo);

drivers/accel/habanalabs/goya/goya.c

1891

WREG32(mmMME_CMDQ_CP_MSG_BASE0_ADDR_HI, mtr_base_hi);

drivers/accel/habanalabs/goya/goya.c

1892

WREG32(mmMME_CMDQ_CP_MSG_BASE1_ADDR_LO, so_base_lo);

drivers/accel/habanalabs/goya/goya.c

1893

WREG32(mmMME_CMDQ_CP_MSG_BASE1_ADDR_HI, so_base_hi);

drivers/accel/habanalabs/goya/goya.c

1896

WREG32(mmMME_CMDQ_CQ_CFG1, 0x00140014);

drivers/accel/habanalabs/goya/goya.c

1898

WREG32(mmMME_CMDQ_GLBL_ERR_ADDR_LO, gic_base_lo);

drivers/accel/habanalabs/goya/goya.c

1899

WREG32(mmMME_CMDQ_GLBL_ERR_ADDR_HI, gic_base_hi);

drivers/accel/habanalabs/goya/goya.c

1901

WREG32(mmMME_CMDQ_GLBL_ERR_WDATA, GOYA_ASYNC_EVENT_ID_MME_CMDQ);

drivers/accel/habanalabs/goya/goya.c

1903

WREG32(mmMME_CMDQ_GLBL_ERR_CFG, CMDQ_MME_ERR_MSG_EN);

drivers/accel/habanalabs/goya/goya.c

1905

WREG32(mmMME_CMDQ_GLBL_PROT, CMDQ_MME_ERR_PROT);

drivers/accel/habanalabs/goya/goya.c

1907

WREG32(mmMME_CMDQ_GLBL_CFG0, CMDQ_MME_ENABLE);

drivers/accel/habanalabs/goya/goya.c

1921

WREG32(mmMME_SM_BASE_ADDRESS_LOW, so_base_lo);

drivers/accel/habanalabs/goya/goya.c

1922

WREG32(mmMME_SM_BASE_ADDRESS_HIGH, so_base_hi);

drivers/accel/habanalabs/goya/goya.c

1950

WREG32(mmTPC0_QM_PQ_BASE_LO + reg_off, lower_32_bits(qman_base_addr));

drivers/accel/habanalabs/goya/goya.c

1951

WREG32(mmTPC0_QM_PQ_BASE_HI + reg_off, upper_32_bits(qman_base_addr));

drivers/accel/habanalabs/goya/goya.c

1952

WREG32(mmTPC0_QM_PQ_SIZE + reg_off, ilog2(TPC_QMAN_LENGTH));

drivers/accel/habanalabs/goya/goya.c

1953

WREG32(mmTPC0_QM_PQ_PI + reg_off, 0);

drivers/accel/habanalabs/goya/goya.c

1954

WREG32(mmTPC0_QM_PQ_CI + reg_off, 0);

drivers/accel/habanalabs/goya/goya.c

1955

WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_LO_OFFSET + reg_off, 0x10C0);

drivers/accel/habanalabs/goya/goya.c

1956

WREG32(mmTPC0_QM_CP_LDMA_SRC_BASE_HI_OFFSET + reg_off, 0x10C4);

drivers/accel/habanalabs/goya/goya.c

1957

WREG32(mmTPC0_QM_CP_LDMA_TSIZE_OFFSET + reg_off, 0x10C8);

drivers/accel/habanalabs/goya/goya.c

1958

WREG32(mmTPC0_QM_CP_LDMA_COMMIT_OFFSET + reg_off, 0x10CC);

drivers/accel/habanalabs/goya/goya.c

1960

WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_LO + reg_off, mtr_base_lo);

drivers/accel/habanalabs/goya/goya.c

1961

WREG32(mmTPC0_QM_CP_MSG_BASE0_ADDR_HI + reg_off, mtr_base_hi);

drivers/accel/habanalabs/goya/goya.c

1962

WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_LO + reg_off, so_base_lo);

drivers/accel/habanalabs/goya/goya.c

1963

WREG32(mmTPC0_QM_CP_MSG_BASE1_ADDR_HI + reg_off, so_base_hi);

drivers/accel/habanalabs/goya/goya.c

1965

WREG32(mmTPC0_QM_CQ_CFG1 + reg_off, 0x00080008);

drivers/accel/habanalabs/goya/goya.c

1967

WREG32(mmTPC0_QM_GLBL_ERR_ADDR_LO + reg_off, gic_base_lo);

drivers/accel/habanalabs/goya/goya.c

1968

WREG32(mmTPC0_QM_GLBL_ERR_ADDR_HI + reg_off, gic_base_hi);

drivers/accel/habanalabs/goya/goya.c

1970

WREG32(mmTPC0_QM_GLBL_ERR_WDATA + reg_off,

drivers/accel/habanalabs/goya/goya.c

1973

WREG32(mmTPC0_QM_GLBL_ERR_CFG + reg_off, QMAN_TPC_ERR_MSG_EN);

drivers/accel/habanalabs/goya/goya.c

1975

WREG32(mmTPC0_QM_GLBL_PROT + reg_off, QMAN_TPC_ERR_PROT);

drivers/accel/habanalabs/goya/goya.c

1977

WREG32(mmTPC0_QM_GLBL_CFG0 + reg_off, QMAN_TPC_ENABLE);

drivers/accel/habanalabs/goya/goya.c

1997

WREG32(mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_LO + reg_off, mtr_base_lo);

drivers/accel/habanalabs/goya/goya.c

1998

WREG32(mmTPC0_CMDQ_CP_MSG_BASE0_ADDR_HI + reg_off, mtr_base_hi);

drivers/accel/habanalabs/goya/goya.c

1999

WREG32(mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_LO + reg_off, so_base_lo);

drivers/accel/habanalabs/goya/goya.c

2000

WREG32(mmTPC0_CMDQ_CP_MSG_BASE1_ADDR_HI + reg_off, so_base_hi);

drivers/accel/habanalabs/goya/goya.c

2002

WREG32(mmTPC0_CMDQ_CQ_CFG1 + reg_off, 0x00140014);

drivers/accel/habanalabs/goya/goya.c

2004

WREG32(mmTPC0_CMDQ_GLBL_ERR_ADDR_LO + reg_off, gic_base_lo);

drivers/accel/habanalabs/goya/goya.c

2005

WREG32(mmTPC0_CMDQ_GLBL_ERR_ADDR_HI + reg_off, gic_base_hi);

drivers/accel/habanalabs/goya/goya.c

2007

WREG32(mmTPC0_CMDQ_GLBL_ERR_WDATA + reg_off,

drivers/accel/habanalabs/goya/goya.c

2010

WREG32(mmTPC0_CMDQ_GLBL_ERR_CFG + reg_off, CMDQ_TPC_ERR_MSG_EN);

drivers/accel/habanalabs/goya/goya.c

2012

WREG32(mmTPC0_CMDQ_GLBL_PROT + reg_off, CMDQ_TPC_ERR_PROT);

drivers/accel/habanalabs/goya/goya.c

2014

WREG32(mmTPC0_CMDQ_GLBL_CFG0 + reg_off, CMDQ_TPC_ENABLE);

drivers/accel/habanalabs/goya/goya.c

2032

WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_LOW + i * cfg_off,

drivers/accel/habanalabs/goya/goya.c

2034

WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_HIGH + i * cfg_off,

drivers/accel/habanalabs/goya/goya.c

2066

WREG32(mmMME_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2067

WREG32(mmMME_CMDQ_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2073

WREG32(mmTPC0_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2074

WREG32(mmTPC0_CMDQ_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2076

WREG32(mmTPC1_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2077

WREG32(mmTPC1_CMDQ_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2079

WREG32(mmTPC2_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2080

WREG32(mmTPC2_CMDQ_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2082

WREG32(mmTPC3_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2083

WREG32(mmTPC3_CMDQ_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2085

WREG32(mmTPC4_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2086

WREG32(mmTPC4_CMDQ_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2088

WREG32(mmTPC5_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2089

WREG32(mmTPC5_CMDQ_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2091

WREG32(mmTPC6_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2092

WREG32(mmTPC6_CMDQ_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2094

WREG32(mmTPC7_QM_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2095

WREG32(mmTPC7_CMDQ_GLBL_CFG0, 0);

drivers/accel/habanalabs/goya/goya.c

2314

WREG32(mmDMA_QM_0_GLBL_CFG1, 1 << DMA_QM_0_GLBL_CFG1_DMA_STOP_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2315

WREG32(mmDMA_QM_1_GLBL_CFG1, 1 << DMA_QM_1_GLBL_CFG1_DMA_STOP_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2316

WREG32(mmDMA_QM_2_GLBL_CFG1, 1 << DMA_QM_2_GLBL_CFG1_DMA_STOP_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2317

WREG32(mmDMA_QM_3_GLBL_CFG1, 1 << DMA_QM_3_GLBL_CFG1_DMA_STOP_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2318

WREG32(mmDMA_QM_4_GLBL_CFG1, 1 << DMA_QM_4_GLBL_CFG1_DMA_STOP_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2328

WREG32(mmTPC0_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2329

WREG32(mmTPC1_CFG_TPC_STALL, 1 << TPC1_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2330

WREG32(mmTPC2_CFG_TPC_STALL, 1 << TPC2_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2331

WREG32(mmTPC3_CFG_TPC_STALL, 1 << TPC3_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2332

WREG32(mmTPC4_CFG_TPC_STALL, 1 << TPC4_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2333

WREG32(mmTPC5_CFG_TPC_STALL, 1 << TPC5_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2334

WREG32(mmTPC6_CFG_TPC_STALL, 1 << TPC6_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2335

WREG32(mmTPC7_CFG_TPC_STALL, 1 << TPC7_CFG_TPC_STALL_V_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2345

WREG32(mmMME_STALL, 0xFFFFFFFF);

drivers/accel/habanalabs/goya/goya.c

2439

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);

drivers/accel/habanalabs/goya/goya.c

2442

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);

drivers/accel/habanalabs/goya/goya.c

2443

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);

drivers/accel/habanalabs/goya/goya.c

2446

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);

drivers/accel/habanalabs/goya/goya.c

2452

WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);

drivers/accel/habanalabs/goya/goya.c

2640

WREG32(MMU_HOP0_PA43_12, phys_addr >> MMU_HOP0_PA43_12_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2641

WREG32(MMU_HOP0_PA49_44, phys_addr >> MMU_HOP0_PA49_44_SHIFT);

drivers/accel/habanalabs/goya/goya.c

2642

WREG32(MMU_ASID_BUSY, 0x80000000 | asid);

drivers/accel/habanalabs/goya/goya.c

2688

WREG32(mmSTLB_CACHE_INV_BASE_39_8,

drivers/accel/habanalabs/goya/goya.c

2690

WREG32(mmSTLB_CACHE_INV_BASE_49_40, MMU_CACHE_MNG_ADDR >> 40);

drivers/accel/habanalabs/goya/goya.c

2698

WREG32(mmMMU_MMU_ENABLE, 1);

drivers/accel/habanalabs/goya/goya.c

2699

WREG32(mmMMU_SPI_MASK, 0xF);

drivers/accel/habanalabs/goya/goya.c

2729

WREG32(mmHW_STATE, HL_DEVICE_HW_STATE_DIRTY);

drivers/accel/habanalabs/goya/goya.c

2800

WREG32(mmPSOC_GLOBAL_CONF_UBOOT_MAGIC, KMD_MSG_GOTO_WFE);

drivers/accel/habanalabs/goya/goya.c

2801

WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,

drivers/accel/habanalabs/goya/goya.c

2810

WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, RESET_ALL);

drivers/accel/habanalabs/goya/goya.c

2815

WREG32(mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG, DMA_MME_TPC_RESET);

drivers/accel/habanalabs/goya/goya.c

2837

WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,

drivers/accel/habanalabs/goya/goya.c

2843

WREG32(mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START,

drivers/accel/habanalabs/goya/goya.c

2846

WREG32(mmPSOC_GLOBAL_CONF_SW_BTM_FSM,

drivers/accel/habanalabs/goya/goya.c

2962

WREG32(db_reg_offset, db_value);

drivers/accel/habanalabs/goya/goya.c

2967

WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,

drivers/accel/habanalabs/goya/goya.c

4167

WREG32(mmCPU_EQ_CI, val);

drivers/accel/habanalabs/goya/goya.c

4186

WREG32(mmSYNC_MNGR_SOB_OBJ_0 + i, 0);

drivers/accel/habanalabs/goya/goya.c

4189

WREG32(mmSYNC_MNGR_MON_STATUS_0 + i, 0);

drivers/accel/habanalabs/goya/goya.c

4425

WREG32(mmDMA_MACRO_RAZWI_LBW_WT_VLD, 0);

drivers/accel/habanalabs/goya/goya.c

4430

WREG32(mmDMA_MACRO_RAZWI_LBW_RD_VLD, 0);

drivers/accel/habanalabs/goya/goya.c

4435

WREG32(mmDMA_MACRO_RAZWI_HBW_WT_VLD, 0);

drivers/accel/habanalabs/goya/goya.c

4440

WREG32(mmDMA_MACRO_RAZWI_HBW_RD_VLD, 0);

drivers/accel/habanalabs/goya/goya.c

4462

WREG32(mmMMU_PAGE_ERROR_CAPTURE, 0);

drivers/accel/habanalabs/goya/goya.c

4843

WREG32(mmDMA_CH_0_WR_COMP_ADDR_LO, lower_32_bits(sob_addr));

drivers/accel/habanalabs/goya/goya.c

4848

WREG32(mmDMA_CH_0_WR_COMP_ADDR_LO + channel_off * dma_id,

drivers/accel/habanalabs/goya/goya.c

4852

WREG32(mmTPC_PLL_CLK_RLX_0, 0x200020);

drivers/accel/habanalabs/goya/goya.c

4937

WREG32(mmCPU_IF_ARUSER_OVR_EN, 0x7FF);

drivers/accel/habanalabs/goya/goya.c

4938

WREG32(mmCPU_IF_AWUSER_OVR_EN, 0x7FF);

drivers/accel/habanalabs/goya/goya.c

4979

WREG32(mmCPU_IF_ARUSER_OVR_EN, 0);

drivers/accel/habanalabs/goya/goya.c

4980

WREG32(mmCPU_IF_AWUSER_OVR_EN, 0);

drivers/accel/habanalabs/goya/goya.c

5049

WREG32(mmSTLB_INV_ALL_START, 1);

drivers/accel/habanalabs/goya/goya.c

5323

WREG32(mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR,

drivers/accel/habanalabs/goya/goya.c

731

WREG32(mmDMA_QM_0_GLBL_PROT, QMAN_DMA_FULLY_TRUSTED);

drivers/accel/habanalabs/goya/goya.c

733

WREG32(mmDMA_QM_0_GLBL_PROT, QMAN_DMA_PARTLY_TRUSTED);

drivers/accel/habanalabs/goya/goya.c

892

WREG32(mmMMU_LOG2_DDR_SIZE, ilog2(prop->dram_size));

drivers/accel/habanalabs/goya/goya_coresight.c

243

WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);

drivers/accel/habanalabs/goya/goya_coresight.c

251

WREG32(base_reg + 0xE80, 0x80004);

drivers/accel/habanalabs/goya/goya_coresight.c

252

WREG32(base_reg + 0xD64, 7);

drivers/accel/habanalabs/goya/goya_coresight.c

253

WREG32(base_reg + 0xD60, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

254

WREG32(base_reg + 0xD00, lower_32_bits(input->he_mask));

drivers/accel/habanalabs/goya/goya_coresight.c

255

WREG32(base_reg + 0xD20, lower_32_bits(input->sp_mask));

drivers/accel/habanalabs/goya/goya_coresight.c

256

WREG32(base_reg + 0xD60, 1);

drivers/accel/habanalabs/goya/goya_coresight.c

257

WREG32(base_reg + 0xD00, upper_32_bits(input->he_mask));

drivers/accel/habanalabs/goya/goya_coresight.c

258

WREG32(base_reg + 0xD20, upper_32_bits(input->sp_mask));

drivers/accel/habanalabs/goya/goya_coresight.c

259

WREG32(base_reg + 0xE70, 0x10);

drivers/accel/habanalabs/goya/goya_coresight.c

260

WREG32(base_reg + 0xE60, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

261

WREG32(base_reg + 0xE64, 0x420000);

drivers/accel/habanalabs/goya/goya_coresight.c

262

WREG32(base_reg + 0xE00, 0xFFFFFFFF);

drivers/accel/habanalabs/goya/goya_coresight.c

263

WREG32(base_reg + 0xE20, 0xFFFFFFFF);

drivers/accel/habanalabs/goya/goya_coresight.c

264

WREG32(base_reg + 0xEF4, input->id);

drivers/accel/habanalabs/goya/goya_coresight.c

265

WREG32(base_reg + 0xDF4, 0x80);

drivers/accel/habanalabs/goya/goya_coresight.c

269

WREG32(base_reg + 0xE8C, frequency);

drivers/accel/habanalabs/goya/goya_coresight.c

270

WREG32(base_reg + 0xE90, 0x7FF);

drivers/accel/habanalabs/goya/goya_coresight.c

271

WREG32(base_reg + 0xE80, 0x27 | (input->id << 16));

drivers/accel/habanalabs/goya/goya_coresight.c

273

WREG32(base_reg + 0xE80, 4);

drivers/accel/habanalabs/goya/goya_coresight.c

274

WREG32(base_reg + 0xD64, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

275

WREG32(base_reg + 0xD60, 1);

drivers/accel/habanalabs/goya/goya_coresight.c

276

WREG32(base_reg + 0xD00, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

277

WREG32(base_reg + 0xD20, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

278

WREG32(base_reg + 0xD60, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

279

WREG32(base_reg + 0xE20, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

280

WREG32(base_reg + 0xE00, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

281

WREG32(base_reg + 0xDF4, 0x80);

drivers/accel/habanalabs/goya/goya_coresight.c

282

WREG32(base_reg + 0xE70, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

283

WREG32(base_reg + 0xE60, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

284

WREG32(base_reg + 0xE64, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

285

WREG32(base_reg + 0xE8C, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

295

WREG32(base_reg + 0xE80, 4);

drivers/accel/habanalabs/goya/goya_coresight.c

316

WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);

drivers/accel/habanalabs/goya/goya_coresight.c

325

WREG32(base_reg + 0x304, val);

drivers/accel/habanalabs/goya/goya_coresight.c

327

WREG32(base_reg + 0x304, val);

drivers/accel/habanalabs/goya/goya_coresight.c

345

WREG32(base_reg + 0x20, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

353

WREG32(base_reg + 0x34, 0x3FFC);

drivers/accel/habanalabs/goya/goya_coresight.c

354

WREG32(base_reg + 0x28, input->sink_mode);

drivers/accel/habanalabs/goya/goya_coresight.c

355

WREG32(base_reg + 0x304, 0x4001);

drivers/accel/habanalabs/goya/goya_coresight.c

356

WREG32(base_reg + 0x308, 0xA);

drivers/accel/habanalabs/goya/goya_coresight.c

357

WREG32(base_reg + 0x20, 1);

drivers/accel/habanalabs/goya/goya_coresight.c

359

WREG32(base_reg + 0x34, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

360

WREG32(base_reg + 0x28, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

361

WREG32(base_reg + 0x304, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

392

WREG32(mmPSOC_ETR_LAR, CORESIGHT_UNLOCK);

drivers/accel/habanalabs/goya/goya_coresight.c

401

WREG32(mmPSOC_ETR_FFCR, val);

drivers/accel/habanalabs/goya/goya_coresight.c

403

WREG32(mmPSOC_ETR_FFCR, val);

drivers/accel/habanalabs/goya/goya_coresight.c

419

WREG32(mmPSOC_ETR_CTL, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

439

WREG32(mmPSOC_ETR_BUFWM, 0x3FFC);

drivers/accel/habanalabs/goya/goya_coresight.c

440

WREG32(mmPSOC_ETR_RSZ, input->buffer_size);

drivers/accel/habanalabs/goya/goya_coresight.c

441

WREG32(mmPSOC_ETR_MODE, input->sink_mode);

drivers/accel/habanalabs/goya/goya_coresight.c

449

WREG32(mmPSOC_ETR_AXICTL, val);

drivers/accel/habanalabs/goya/goya_coresight.c

451

WREG32(mmPSOC_ETR_DBALO,

drivers/accel/habanalabs/goya/goya_coresight.c

453

WREG32(mmPSOC_ETR_DBAHI,

drivers/accel/habanalabs/goya/goya_coresight.c

455

WREG32(mmPSOC_ETR_FFCR, 3);

drivers/accel/habanalabs/goya/goya_coresight.c

456

WREG32(mmPSOC_ETR_PSCR, 0xA);

drivers/accel/habanalabs/goya/goya_coresight.c

457

WREG32(mmPSOC_ETR_CTL, 1);

drivers/accel/habanalabs/goya/goya_coresight.c

459

WREG32(mmPSOC_ETR_BUFWM, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

460

WREG32(mmPSOC_ETR_RSZ, 0x400);

drivers/accel/habanalabs/goya/goya_coresight.c

461

WREG32(mmPSOC_ETR_DBALO, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

462

WREG32(mmPSOC_ETR_DBAHI, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

463

WREG32(mmPSOC_ETR_PSCR, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

464

WREG32(mmPSOC_ETR_MODE, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

465

WREG32(mmPSOC_ETR_FFCR, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

496

WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK);

drivers/accel/habanalabs/goya/goya_coresight.c

498

WREG32(base_reg, params->enable ? 0x33F : 0);

drivers/accel/habanalabs/goya/goya_coresight.c

517

WREG32(base_reg + 0x104, 1);

drivers/accel/habanalabs/goya/goya_coresight.c

525

WREG32(base_reg + 0x200, lower_32_bits(input->start_addr0));

drivers/accel/habanalabs/goya/goya_coresight.c

526

WREG32(base_reg + 0x204, upper_32_bits(input->start_addr0));

drivers/accel/habanalabs/goya/goya_coresight.c

527

WREG32(base_reg + 0x208, lower_32_bits(input->addr_mask0));

drivers/accel/habanalabs/goya/goya_coresight.c

528

WREG32(base_reg + 0x20C, upper_32_bits(input->addr_mask0));

drivers/accel/habanalabs/goya/goya_coresight.c

529

WREG32(base_reg + 0x240, lower_32_bits(input->start_addr1));

drivers/accel/habanalabs/goya/goya_coresight.c

530

WREG32(base_reg + 0x244, upper_32_bits(input->start_addr1));

drivers/accel/habanalabs/goya/goya_coresight.c

531

WREG32(base_reg + 0x248, lower_32_bits(input->addr_mask1));

drivers/accel/habanalabs/goya/goya_coresight.c

532

WREG32(base_reg + 0x24C, upper_32_bits(input->addr_mask1));

drivers/accel/habanalabs/goya/goya_coresight.c

533

WREG32(base_reg + 0x224, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

534

WREG32(base_reg + 0x234, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

535

WREG32(base_reg + 0x30C, input->bw_win);

drivers/accel/habanalabs/goya/goya_coresight.c

536

WREG32(base_reg + 0x308, input->win_capture);

drivers/accel/habanalabs/goya/goya_coresight.c

545

WREG32(base_reg + 0x700, pcie_base | 0xB00 | (input->id << 12));

drivers/accel/habanalabs/goya/goya_coresight.c

546

WREG32(base_reg + 0x708, pcie_base | 0xA00 | (input->id << 12));

drivers/accel/habanalabs/goya/goya_coresight.c

547

WREG32(base_reg + 0x70C, pcie_base | 0xC00 | (input->id << 12));

drivers/accel/habanalabs/goya/goya_coresight.c

549

WREG32(base_reg + 0x100, 0x11);

drivers/accel/habanalabs/goya/goya_coresight.c

550

WREG32(base_reg + 0x304, 0x1);

drivers/accel/habanalabs/goya/goya_coresight.c

552

WREG32(base_reg + 0x200, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

553

WREG32(base_reg + 0x204, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

554

WREG32(base_reg + 0x208, 0xFFFFFFFF);

drivers/accel/habanalabs/goya/goya_coresight.c

555

WREG32(base_reg + 0x20C, 0xFFFFFFFF);

drivers/accel/habanalabs/goya/goya_coresight.c

556

WREG32(base_reg + 0x240, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

557

WREG32(base_reg + 0x244, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

558

WREG32(base_reg + 0x248, 0xFFFFFFFF);

drivers/accel/habanalabs/goya/goya_coresight.c

559

WREG32(base_reg + 0x24C, 0xFFFFFFFF);

drivers/accel/habanalabs/goya/goya_coresight.c

560

WREG32(base_reg + 0x224, 0xFFFFFFFF);

drivers/accel/habanalabs/goya/goya_coresight.c

561

WREG32(base_reg + 0x234, 0x1070F);

drivers/accel/habanalabs/goya/goya_coresight.c

562

WREG32(base_reg + 0x30C, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

563

WREG32(base_reg + 0x308, 0xFFFF);

drivers/accel/habanalabs/goya/goya_coresight.c

564

WREG32(base_reg + 0x700, 0xA000B00);

drivers/accel/habanalabs/goya/goya_coresight.c

565

WREG32(base_reg + 0x708, 0xA000A00);

drivers/accel/habanalabs/goya/goya_coresight.c

566

WREG32(base_reg + 0x70C, 0xA000C00);

drivers/accel/habanalabs/goya/goya_coresight.c

567

WREG32(base_reg + 0x100, 1);

drivers/accel/habanalabs/goya/goya_coresight.c

568

WREG32(base_reg + 0x304, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

569

WREG32(base_reg + 0x104, 0);

drivers/accel/habanalabs/goya/goya_coresight.c

611

WREG32(base_reg + 0xE04, 0x41013046);

drivers/accel/habanalabs/goya/goya_coresight.c

612

WREG32(base_reg + 0xE04, 0x41013040);

drivers/accel/habanalabs/goya/goya_coresight.c

615

WREG32(base_reg + SPMU_EVENT_TYPES_OFFSET + i * 4,

drivers/accel/habanalabs/goya/goya_coresight.c

618

WREG32(base_reg + 0xE04, 0x41013041);

drivers/accel/habanalabs/goya/goya_coresight.c

619

WREG32(base_reg + 0xC00, 0x8000003F);

drivers/accel/habanalabs/goya/goya_coresight.c

642

WREG32(base_reg + 0xE04, 0x41013040);

drivers/accel/habanalabs/goya/goya_coresight.c

653

WREG32(base_reg + 0xCC0, 0);

drivers/accel/habanalabs/goya/goya_security.c

1015

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1033

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

104

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1055

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1066

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1080

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1094

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1101

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1119

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1143

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1175

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1195

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1211

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1229

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1251

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1262

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1276

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

128

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1290

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1297

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1315

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1339

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1371

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1391

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1407

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1425

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1447

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1458

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1472

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1486

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1493

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1511

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1535

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1567

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1587

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

160

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1603

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1621

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1643

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1654

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1668

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1682

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1689

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1707

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1731

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1763

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1783

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1799

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

180

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1817

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1839

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1850

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1864

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1878

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1885

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1903

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1927

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

194

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1959

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1979

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

1995

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2013

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2035

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2046

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2060

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2074

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2081

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2099

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

210

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2123

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2155

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2175

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2191

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2209

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2231

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2242

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

228

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

23

WREG32(pb_addr, 0);

drivers/accel/habanalabs/goya/goya_security.c

2362

WREG32(pb_addr + word_offset, mask);

drivers/accel/habanalabs/goya/goya_security.c

2429

WREG32(mmDMA_MACRO_LBW_RANGE_HIT_BLOCK, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2430

WREG32(mmDMA_MACRO_HBW_RANGE_HIT_BLOCK, 0xFF);

drivers/accel/habanalabs/goya/goya_security.c

2433

WREG32(mmDMA_MACRO_HBW_RANGE_HIT_BLOCK, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2436

WREG32(mmDMA_MACRO_HBW_RANGE_BASE_31_0_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2437

WREG32(mmDMA_MACRO_HBW_RANGE_BASE_49_32_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2438

WREG32(mmDMA_MACRO_HBW_RANGE_MASK_31_0_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2439

WREG32(mmDMA_MACRO_HBW_RANGE_MASK_49_32_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2447

WREG32(mmDMA_MACRO_HBW_RANGE_BASE_31_0_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2448

WREG32(mmDMA_MACRO_HBW_RANGE_BASE_49_32_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2449

WREG32(mmDMA_MACRO_HBW_RANGE_MASK_31_0_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2450

WREG32(mmDMA_MACRO_HBW_RANGE_MASK_49_32_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2454

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2455

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2456

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2457

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2458

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2459

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2460

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2461

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2462

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2463

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2464

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2465

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2466

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2467

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2468

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2469

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2470

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2471

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2472

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2473

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2474

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2475

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2476

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2477

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2478

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2479

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2480

WREG32(mmDMA_MACRO_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2481

WREG32(mmDMA_MACRO_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2483

WREG32(mmMME1_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2484

WREG32(mmMME2_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2485

WREG32(mmMME3_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2486

WREG32(mmMME4_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2487

WREG32(mmMME5_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2488

WREG32(mmMME6_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2490

WREG32(mmMME1_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2491

WREG32(mmMME2_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2492

WREG32(mmMME3_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2493

WREG32(mmMME4_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2494

WREG32(mmMME5_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2495

WREG32(mmMME6_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2498

WREG32(mmMME1_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2499

WREG32(mmMME1_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2500

WREG32(mmMME1_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2501

WREG32(mmMME1_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2503

WREG32(mmMME2_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2504

WREG32(mmMME2_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2505

WREG32(mmMME2_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2506

WREG32(mmMME2_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2508

WREG32(mmMME3_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2509

WREG32(mmMME3_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

251

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2510

WREG32(mmMME3_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2511

WREG32(mmMME3_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2513

WREG32(mmMME4_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2514

WREG32(mmMME4_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2515

WREG32(mmMME4_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2516

WREG32(mmMME4_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2518

WREG32(mmMME5_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2519

WREG32(mmMME5_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2520

WREG32(mmMME5_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2521

WREG32(mmMME5_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2523

WREG32(mmMME6_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2524

WREG32(mmMME6_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2525

WREG32(mmMME6_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2526

WREG32(mmMME6_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2533

WREG32(mmMME1_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2534

WREG32(mmMME1_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2535

WREG32(mmMME1_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2536

WREG32(mmMME1_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2538

WREG32(mmMME2_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2539

WREG32(mmMME2_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2540

WREG32(mmMME2_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2541

WREG32(mmMME2_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2543

WREG32(mmMME3_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2544

WREG32(mmMME3_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2545

WREG32(mmMME3_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2546

WREG32(mmMME3_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2548

WREG32(mmMME4_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2549

WREG32(mmMME4_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2550

WREG32(mmMME4_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2551

WREG32(mmMME4_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2553

WREG32(mmMME5_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2554

WREG32(mmMME5_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2555

WREG32(mmMME5_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2556

WREG32(mmMME5_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2558

WREG32(mmMME6_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2559

WREG32(mmMME6_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2560

WREG32(mmMME6_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2561

WREG32(mmMME6_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2563

WREG32(mmMME1_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2564

WREG32(mmMME1_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2565

WREG32(mmMME1_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2566

WREG32(mmMME1_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2567

WREG32(mmMME1_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2568

WREG32(mmMME1_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2569

WREG32(mmMME1_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2570

WREG32(mmMME1_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2571

WREG32(mmMME1_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2572

WREG32(mmMME1_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2573

WREG32(mmMME1_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2574

WREG32(mmMME1_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2575

WREG32(mmMME1_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2576

WREG32(mmMME1_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2577

WREG32(mmMME1_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2578

WREG32(mmMME1_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2579

WREG32(mmMME1_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2580

WREG32(mmMME1_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2581

WREG32(mmMME1_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2582

WREG32(mmMME1_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2583

WREG32(mmMME1_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2584

WREG32(mmMME1_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2585

WREG32(mmMME1_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2586

WREG32(mmMME1_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2587

WREG32(mmMME1_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2588

WREG32(mmMME1_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2589

WREG32(mmMME1_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2590

WREG32(mmMME1_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2592

WREG32(mmMME2_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2593

WREG32(mmMME2_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2594

WREG32(mmMME2_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2595

WREG32(mmMME2_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2596

WREG32(mmMME2_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2597

WREG32(mmMME2_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2598

WREG32(mmMME2_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2599

WREG32(mmMME2_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2600

WREG32(mmMME2_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2601

WREG32(mmMME2_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2602

WREG32(mmMME2_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2603

WREG32(mmMME2_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2604

WREG32(mmMME2_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2605

WREG32(mmMME2_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2606

WREG32(mmMME2_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2607

WREG32(mmMME2_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2608

WREG32(mmMME2_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2609

WREG32(mmMME2_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2610

WREG32(mmMME2_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2611

WREG32(mmMME2_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2612

WREG32(mmMME2_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2613

WREG32(mmMME2_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2614

WREG32(mmMME2_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2615

WREG32(mmMME2_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2616

WREG32(mmMME2_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2617

WREG32(mmMME2_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2618

WREG32(mmMME2_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2619

WREG32(mmMME2_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

262

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2621

WREG32(mmMME3_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2622

WREG32(mmMME3_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2623

WREG32(mmMME3_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2624

WREG32(mmMME3_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2625

WREG32(mmMME3_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2626

WREG32(mmMME3_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2627

WREG32(mmMME3_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2628

WREG32(mmMME3_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2629

WREG32(mmMME3_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2630

WREG32(mmMME3_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2631

WREG32(mmMME3_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2632

WREG32(mmMME3_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2633

WREG32(mmMME3_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2634

WREG32(mmMME3_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2635

WREG32(mmMME3_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2636

WREG32(mmMME3_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2637

WREG32(mmMME3_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2638

WREG32(mmMME3_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2639

WREG32(mmMME3_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2640

WREG32(mmMME3_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2641

WREG32(mmMME3_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2642

WREG32(mmMME3_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2643

WREG32(mmMME3_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2644

WREG32(mmMME3_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2645

WREG32(mmMME3_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2646

WREG32(mmMME3_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2647

WREG32(mmMME3_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2648

WREG32(mmMME3_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2650

WREG32(mmMME4_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2651

WREG32(mmMME4_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2652

WREG32(mmMME4_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2653

WREG32(mmMME4_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2654

WREG32(mmMME4_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2655

WREG32(mmMME4_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2656

WREG32(mmMME4_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2657

WREG32(mmMME4_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2658

WREG32(mmMME4_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2659

WREG32(mmMME4_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2660

WREG32(mmMME4_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2661

WREG32(mmMME4_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2662

WREG32(mmMME4_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2663

WREG32(mmMME4_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2664

WREG32(mmMME4_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2665

WREG32(mmMME4_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2666

WREG32(mmMME4_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2667

WREG32(mmMME4_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2668

WREG32(mmMME4_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2669

WREG32(mmMME4_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2670

WREG32(mmMME4_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2671

WREG32(mmMME4_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2672

WREG32(mmMME4_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2673

WREG32(mmMME4_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2674

WREG32(mmMME4_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2675

WREG32(mmMME4_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2676

WREG32(mmMME4_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2677

WREG32(mmMME4_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2679

WREG32(mmMME5_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2680

WREG32(mmMME5_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2681

WREG32(mmMME5_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2682

WREG32(mmMME5_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2683

WREG32(mmMME5_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2684

WREG32(mmMME5_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2685

WREG32(mmMME5_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2686

WREG32(mmMME5_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2687

WREG32(mmMME5_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2688

WREG32(mmMME5_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2689

WREG32(mmMME5_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

269

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

2690

WREG32(mmMME5_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2691

WREG32(mmMME5_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2692

WREG32(mmMME5_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2693

WREG32(mmMME5_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2694

WREG32(mmMME5_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2695

WREG32(mmMME5_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2696

WREG32(mmMME5_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2697

WREG32(mmMME5_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2698

WREG32(mmMME5_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2699

WREG32(mmMME5_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2700

WREG32(mmMME5_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2701

WREG32(mmMME5_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2702

WREG32(mmMME5_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2703

WREG32(mmMME5_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2704

WREG32(mmMME5_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2705

WREG32(mmMME5_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2706

WREG32(mmMME5_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2708

WREG32(mmMME6_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2709

WREG32(mmMME6_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2710

WREG32(mmMME6_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2711

WREG32(mmMME6_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2712

WREG32(mmMME6_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2713

WREG32(mmMME6_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2714

WREG32(mmMME6_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2715

WREG32(mmMME6_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2716

WREG32(mmMME6_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2717

WREG32(mmMME6_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2718

WREG32(mmMME6_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2719

WREG32(mmMME6_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2720

WREG32(mmMME6_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2721

WREG32(mmMME6_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2722

WREG32(mmMME6_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2723

WREG32(mmMME6_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2724

WREG32(mmMME6_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2725

WREG32(mmMME6_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2726

WREG32(mmMME6_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2727

WREG32(mmMME6_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2728

WREG32(mmMME6_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2729

WREG32(mmMME6_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2730

WREG32(mmMME6_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2731

WREG32(mmMME6_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2732

WREG32(mmMME6_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2733

WREG32(mmMME6_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2734

WREG32(mmMME6_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2735

WREG32(mmMME6_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2737

WREG32(mmTPC0_NRTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2738

WREG32(mmTPC0_NRTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2741

WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2742

WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2743

WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2744

WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2751

WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2752

WREG32(mmTPC0_NRTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2753

WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2754

WREG32(mmTPC0_NRTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2756

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2757

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2758

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2759

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2760

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2761

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2762

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2763

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2764

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2765

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2766

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2767

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2768

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2769

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2770

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2771

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2772

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2773

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2774

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2775

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2776

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2777

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2778

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2779

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2780

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2781

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2782

WREG32(mmTPC0_NRTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2783

WREG32(mmTPC0_NRTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2785

WREG32(mmTPC1_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2786

WREG32(mmTPC1_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2789

WREG32(mmTPC1_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2790

WREG32(mmTPC1_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2791

WREG32(mmTPC1_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2792

WREG32(mmTPC1_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2799

WREG32(mmTPC1_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2800

WREG32(mmTPC1_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2801

WREG32(mmTPC1_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2802

WREG32(mmTPC1_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2804

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2805

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2806

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2807

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2808

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2809

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2810

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2811

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2812

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2813

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2814

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2815

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2816

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2817

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2818

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2819

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2820

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2821

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2822

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2823

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2824

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2825

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2826

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2827

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2828

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2829

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2830

WREG32(mmTPC1_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2831

WREG32(mmTPC1_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2833

WREG32(mmTPC2_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2834

WREG32(mmTPC2_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2837

WREG32(mmTPC2_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2838

WREG32(mmTPC2_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2839

WREG32(mmTPC2_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2840

WREG32(mmTPC2_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2847

WREG32(mmTPC2_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2848

WREG32(mmTPC2_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2849

WREG32(mmTPC2_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2850

WREG32(mmTPC2_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2852

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2853

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2854

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2855

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2856

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2857

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2858

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2859

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2860

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2861

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2862

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2863

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2864

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2865

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2866

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2867

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2868

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2869

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2870

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2871

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2872

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2873

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2874

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2875

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2876

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2877

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2878

WREG32(mmTPC2_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2879

WREG32(mmTPC2_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2881

WREG32(mmTPC3_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2882

WREG32(mmTPC3_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2885

WREG32(mmTPC3_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2886

WREG32(mmTPC3_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2887

WREG32(mmTPC3_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2888

WREG32(mmTPC3_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2895

WREG32(mmTPC3_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2896

WREG32(mmTPC3_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2897

WREG32(mmTPC3_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2898

WREG32(mmTPC3_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2900

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2901

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2902

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2903

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2904

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2905

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2906

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2907

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2908

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2909

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2910

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2911

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2912

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2913

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2914

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2915

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2916

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2917

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2918

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2919

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2920

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2921

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2922

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2923

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2924

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2925

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2926

WREG32(mmTPC3_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2927

WREG32(mmTPC3_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2929

WREG32(mmTPC4_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2930

WREG32(mmTPC4_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2933

WREG32(mmTPC4_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2934

WREG32(mmTPC4_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2935

WREG32(mmTPC4_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2936

WREG32(mmTPC4_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2943

WREG32(mmTPC4_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2944

WREG32(mmTPC4_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2945

WREG32(mmTPC4_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2946

WREG32(mmTPC4_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2948

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2949

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2950

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2951

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

2952

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

2953

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

2954

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

2955

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

2956

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

2957

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

2958

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

2959

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

2960

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

2961

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

2962

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

2963

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

2964

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

2965

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

2966

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

2967

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

2968

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

2969

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

2970

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

2971

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

2972

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

2973

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

2974

WREG32(mmTPC4_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

2975

WREG32(mmTPC4_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

2977

WREG32(mmTPC5_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

2978

WREG32(mmTPC5_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

2981

WREG32(mmTPC5_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2982

WREG32(mmTPC5_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2983

WREG32(mmTPC5_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

2984

WREG32(mmTPC5_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

2991

WREG32(mmTPC5_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

2992

WREG32(mmTPC5_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

2993

WREG32(mmTPC5_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

2994

WREG32(mmTPC5_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

2996

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

2997

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

2998

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

2999

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

3000

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

3001

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

3002

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

3003

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

3004

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

3005

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

3006

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

3007

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

3008

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

3009

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

3010

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

3011

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

3012

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

3013

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

3014

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

3015

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

3016

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

3017

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

3018

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

3019

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

3020

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

3021

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

3022

WREG32(mmTPC5_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

3023

WREG32(mmTPC5_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

3025

WREG32(mmTPC6_RTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

3026

WREG32(mmTPC6_RTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

3029

WREG32(mmTPC6_RTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

303

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

3030

WREG32(mmTPC6_RTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

3031

WREG32(mmTPC6_RTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

3032

WREG32(mmTPC6_RTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

3039

WREG32(mmTPC6_RTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

3040

WREG32(mmTPC6_RTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

3041

WREG32(mmTPC6_RTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

3042

WREG32(mmTPC6_RTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

3044

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

3045

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

3046

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

3047

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

3048

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

3049

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

3050

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

3051

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

3052

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

3053

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

3054

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

3055

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

3056

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

3057

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

3058

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

3059

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

3060

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

3061

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

3062

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

3063

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

3064

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

3065

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

3066

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

3067

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

3068

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

3069

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

3070

WREG32(mmTPC6_RTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

3071

WREG32(mmTPC6_RTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

3073

WREG32(mmTPC7_NRTR_LBW_RANGE_HIT, 0xFFFF);

drivers/accel/habanalabs/goya/goya_security.c

3074

WREG32(mmTPC7_NRTR_HBW_RANGE_HIT, 0xFE);

drivers/accel/habanalabs/goya/goya_security.c

3077

WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

3078

WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_H_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

3079

WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_L_0, 0);

drivers/accel/habanalabs/goya/goya_security.c

3080

WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_H_0, 0xFFF80);

drivers/accel/habanalabs/goya/goya_security.c

3087

WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_L_1, dram_addr_lo);

drivers/accel/habanalabs/goya/goya_security.c

3088

WREG32(mmTPC7_NRTR_HBW_RANGE_BASE_H_1, dram_addr_hi);

drivers/accel/habanalabs/goya/goya_security.c

3089

WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_L_1, 0xE0000000);

drivers/accel/habanalabs/goya/goya_security.c

3090

WREG32(mmTPC7_NRTR_HBW_RANGE_MASK_H_1, 0x3FFFF);

drivers/accel/habanalabs/goya/goya_security.c

3092

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_0, lbw_rng0_base);

drivers/accel/habanalabs/goya/goya_security.c

3093

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_0, lbw_rng0_mask);

drivers/accel/habanalabs/goya/goya_security.c

3094

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_1, lbw_rng1_base);

drivers/accel/habanalabs/goya/goya_security.c

3095

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_1, lbw_rng1_mask);

drivers/accel/habanalabs/goya/goya_security.c

3096

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_2, lbw_rng2_base);

drivers/accel/habanalabs/goya/goya_security.c

3097

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_2, lbw_rng2_mask);

drivers/accel/habanalabs/goya/goya_security.c

3098

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_3, lbw_rng3_base);

drivers/accel/habanalabs/goya/goya_security.c

3099

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_3, lbw_rng3_mask);

drivers/accel/habanalabs/goya/goya_security.c

3100

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_4, lbw_rng4_base);

drivers/accel/habanalabs/goya/goya_security.c

3101

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_4, lbw_rng4_mask);

drivers/accel/habanalabs/goya/goya_security.c

3102

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_5, lbw_rng5_base);

drivers/accel/habanalabs/goya/goya_security.c

3103

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_5, lbw_rng5_mask);

drivers/accel/habanalabs/goya/goya_security.c

3104

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_6, lbw_rng6_base);

drivers/accel/habanalabs/goya/goya_security.c

3105

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_6, lbw_rng6_mask);

drivers/accel/habanalabs/goya/goya_security.c

3106

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_7, lbw_rng7_base);

drivers/accel/habanalabs/goya/goya_security.c

3107

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_7, lbw_rng7_mask);

drivers/accel/habanalabs/goya/goya_security.c

3108

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_8, lbw_rng8_base);

drivers/accel/habanalabs/goya/goya_security.c

3109

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_8, lbw_rng8_mask);

drivers/accel/habanalabs/goya/goya_security.c

3110

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_9, lbw_rng9_base);

drivers/accel/habanalabs/goya/goya_security.c

3111

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_9, lbw_rng9_mask);

drivers/accel/habanalabs/goya/goya_security.c

3112

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_10, lbw_rng10_base);

drivers/accel/habanalabs/goya/goya_security.c

3113

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_10, lbw_rng10_mask);

drivers/accel/habanalabs/goya/goya_security.c

3114

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_11, lbw_rng11_base);

drivers/accel/habanalabs/goya/goya_security.c

3115

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_11, lbw_rng11_mask);

drivers/accel/habanalabs/goya/goya_security.c

3116

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_12, lbw_rng12_base);

drivers/accel/habanalabs/goya/goya_security.c

3117

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_12, lbw_rng12_mask);

drivers/accel/habanalabs/goya/goya_security.c

3118

WREG32(mmTPC7_NRTR_LBW_RANGE_BASE_13, lbw_rng13_base);

drivers/accel/habanalabs/goya/goya_security.c

3119

WREG32(mmTPC7_NRTR_LBW_RANGE_MASK_13, lbw_rng13_mask);

drivers/accel/habanalabs/goya/goya_security.c

335

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

355

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

381

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

413

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

433

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

459

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

491

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

511

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

537

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

569

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

589

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

615

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

647

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

667

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

688

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

702

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

709

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

727

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

751

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

783

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

803

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

81

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

819

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

837

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

859

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

870

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

884

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

898

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

905

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

923

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

947

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

979

WREG32(pb_addr + word_offset, ~mask);

drivers/accel/habanalabs/goya/goya_security.c

999

WREG32(pb_addr + word_offset, ~mask);

drivers/gpu/drm/amd/amdgpu/amdgpu.h

1402

WREG32(reg, tmp_); \

drivers/gpu/drm/amd/amdgpu/amdgpu.h

1435

WREG32(mm##reg, (RREG32(mm##reg) & ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field))

drivers/gpu/drm/amd/amdgpu/amdgpu.h

1438

WREG32(mm##reg + offset, (RREG32(mm##reg + offset) & ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field))

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

137

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

152

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

157

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

158

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

160

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

163

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

165

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

167

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

170

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

172

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

175

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

177

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

178

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

180

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

182

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

187

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

256

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

269

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

270

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

331

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

358

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

384

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

101

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

103

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

106

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

108

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

111

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

113

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_BASE, m->sdmax_rlcx_rb_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

114

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

116

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

118

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

123

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

197

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

210

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_DOORBELL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

211

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

242

WREG32(SOC15_REG_OFFSET(ATHUB, 0,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

256

WREG32(SOC15_REG_OFFSET(ATHUB, 0,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

266

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_LUT_INDEX),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

268

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_0_LUT) + vmid,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

270

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_LUT_INDEX),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

272

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_0_LUT_MM) + vmid,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

274

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_LUT_INDEX), reg);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

73

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

88

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_DOORBELL_OFFSET,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

93

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

94

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_RPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

96

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_RB_RPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

99

WREG32(sdma_rlc_reg_offset + regSDMA_RLC0_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1056

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_LO),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1058

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_HI),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1065

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_LO),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

1067

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_HI),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

111

WREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) + vmid,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

123

WREG32(SOC15_REG_OFFSET(ATHUB, 0,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

130

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

387

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

402

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

407

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

408

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

410

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

413

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

415

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

417

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

420

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

422

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

425

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

427

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

428

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

430

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

432

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

437

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

640

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

653

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

654

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

744

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

770

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

771

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA0), 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

772

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA1), 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

781

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

798

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

849

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

852

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), wave_cntl_prev);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

874

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL2), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

937

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

945

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_CNTL) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

950

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_H) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

953

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_ADDR_L) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

957

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_ADDR_H) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

960

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_ADDR_L) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

969

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

977

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_CNTL) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

991

WREG32((SOC15_REG_OFFSET(GC, 0, mmTCP_WATCH0_CNTL) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

995

WREG32((SOC15_REG_OFFSET(GC, 0, mmSQ_WATCH0_CNTL) +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

104

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid, value);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

264

WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_EOP_RPTR),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

373

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

388

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

393

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

394

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

396

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

399

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

401

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

403

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

406

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

408

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

411

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

413

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

414

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

416

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

418

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

423

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

564

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

577

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

578

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

598

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_CMD), sq_cmd);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

641

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_LO),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

643

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TBA_HI),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

650

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_LO),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

652

WREG32(SOC15_REG_OFFSET(GC, 0, mmSQ_SHADER_TMA_HI),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

100

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_0_LUT) + vmid, value);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

190

WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_CP_SCHEDULERS), value);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

199

WREG32(reg, mqd_hqd[reg - hqd_base]);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

205

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_DOORBELL_CONTROL), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

234

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_LO),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

236

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_HI),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

238

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

240

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_WPTR_POLL_ADDR_HI),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

244

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_PQ_WPTR_POLL_CNTL1),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

249

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_EOP_RPTR),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

254

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_ACTIVE), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

358

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

373

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_DOORBELL_OFFSET,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

378

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

379

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_RPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

381

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_RPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

384

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

386

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

388

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

391

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

393

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

396

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

398

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_BASE, m->sdmax_rlcx_rb_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

399

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

401

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

403

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

408

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

515

WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_DEQUEUE_REQUEST), type);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

549

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

562

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_DOORBELL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

563

WREG32(sdma_rlc_reg_offset + regSDMA0_QUEUE0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

582

WREG32(SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX), gfx_index_val);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

583

WREG32(SOC15_REG_OFFSET(GC, 0, regSQ_CMD), sq_cmd);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

592

WREG32(SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

86

WREG32(SOC15_REG_OFFSET(GC, 0, regSH_MEM_CONFIG), sh_mem_config);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

87

WREG32(SOC15_REG_OFFSET(GC, 0, regSH_MEM_BASES), sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

171

WREG32(SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX), gfx_index_val);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

172

WREG32(SOC15_REG_OFFSET(GC, 0, regSQ_CMD), sq_cmd);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

181

WREG32(SOC15_REG_OFFSET(GC, 0, regGRBM_GFX_INDEX), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

174

WREG32(SOC15_REG_OFFSET(GC, GET_INST(GC, inst), regGRBM_GFX_INDEX), gfx_index_val);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

175

WREG32(SOC15_REG_OFFSET(GC, GET_INST(GC, inst), regSQ_CMD), sq_cmd);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

184

WREG32(SOC15_REG_OFFSET(GC, GET_INST(GC, inst), regGRBM_GFX_INDEX), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

105

WREG32(mmATC_VMID0_PASID_MAPPING + vmid, pasid_mapping);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

109

WREG32(mmATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

112

WREG32(mmIH_VMID_0_LUT + vmid, pasid_mapping);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

128

WREG32(mmCPC_INT_CNTL, CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK |

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

177

WREG32(reg, mqd_hqd[reg - mmCP_MQD_BASE_ADDR]);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

184

WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

194

WREG32(mmCP_HQD_PQ_WPTR, (wptr_val << wptr_shift) & wptr_mask);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

197

WREG32(mmCP_HQD_ACTIVE, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

250

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

267

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

268

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

272

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

274

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

277

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_VIRTUAL_ADDR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

279

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdma_rlc_rb_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

280

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

282

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

284

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

289

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

373

WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

441

WREG32(mmCP_HQD_DEQUEUE_REQUEST, type);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

473

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

486

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

487

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

504

WREG32(mmGRBM_GFX_INDEX, gfx_index_val);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

505

WREG32(mmSQ_CMD, sq_cmd);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

513

WREG32(mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

535

WREG32(mmSH_HIDDEN_PRIVATE_BASE_VMID, va);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

54

WREG32(mmSRBM_GFX_CNTL, value);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

546

WREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

59

WREG32(mmSRBM_GFX_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

85

WREG32(mmSH_MEM_CONFIG, sh_mem_config);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

86

WREG32(mmSH_MEM_APE1_BASE, sh_mem_ape1_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

87

WREG32(mmSH_MEM_APE1_LIMIT, sh_mem_ape1_limit);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

88

WREG32(mmSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

100

WREG32(mmATC_VMID0_PASID_MAPPING + vmid, pasid_mapping);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

104

WREG32(mmATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

107

WREG32(mmIH_VMID_0_LUT + vmid, pasid_mapping);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

123

WREG32(mmCPC_INT_CNTL, CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE_MASK |

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

180

WREG32(mmRLC_CP_SCHEDULERS, value);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

187

WREG32(reg, mqd_hqd[reg - mmCP_MQD_BASE_ADDR]);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

195

WREG32(mmCP_HQD_EOP_RPTR, m->cp_hqd_eop_rptr);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

196

WREG32(mmCP_HQD_EOP_WPTR, m->cp_hqd_eop_wptr);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

197

WREG32(mmCP_HQD_EOP_WPTR_MEM, m->cp_hqd_eop_wptr_mem);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

201

WREG32(reg, mqd_hqd[reg - mmCP_MQD_BASE_ADDR]);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

208

WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

218

WREG32(mmCP_HQD_PQ_WPTR, (wptr_val << wptr_shift) & wptr_mask);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

221

WREG32(mmCP_HQD_ACTIVE, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

273

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

290

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

291

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

295

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

297

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

300

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_VIRTUAL_ADDR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

302

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

303

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

305

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

307

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

312

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

476

WREG32(mmCP_HQD_DEQUEUE_REQUEST, type);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

48

WREG32(mmSRBM_GFX_CNTL, value);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

508

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

521

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

522

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

53

WREG32(mmSRBM_GFX_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

550

WREG32(mmGRBM_GFX_INDEX, gfx_index_val);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

551

WREG32(mmSQ_CMD, sq_cmd);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

560

WREG32(mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

570

WREG32(mmSH_HIDDEN_PRIVATE_BASE_VMID, va);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

581

WREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

79

WREG32(mmSH_MEM_CONFIG, sh_mem_config);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

80

WREG32(mmSH_MEM_APE1_BASE, sh_mem_ape1_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

81

WREG32(mmSH_MEM_APE1_LIMIT, sh_mem_ape1_limit);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

82

WREG32(mmSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

120

WREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) + vmid,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

129

WREG32(SOC15_REG_OFFSET(ATHUB, 0,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

134

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT) + vmid,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

137

WREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID16_PASID_MAPPING) + vmid,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

146

WREG32(SOC15_REG_OFFSET(ATHUB, 0,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

151

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, mmIH_VMID_0_LUT_MM) + vmid,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

398

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

413

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL_OFFSET,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

418

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

419

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

421

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

424

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

426

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

428

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

431

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

433

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_WPTR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

436

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

438

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

439

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_BASE_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

441

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

443

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_RPTR_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

448

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

590

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

603

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_DOORBELL, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

604

WREG32(sdma_rlc_reg_offset + mmSDMA0_RLC0_RB_CNTL,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

685

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

709

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

732

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

783

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

786

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL), wave_cntl_prev);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

808

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_WAVE_CNTL2), data);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1572

WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1593

WREG32(adev->bios_scratch_reg_offset + 2, bios_2_scratch);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1594

WREG32(adev->bios_scratch_reg_offset + 6, bios_6_scratch);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1607

WREG32(adev->bios_scratch_reg_offset + 3, tmp);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1619

WREG32(adev->bios_scratch_reg_offset + 2, tmp);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c

1786

WREG32(reg, val);

drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c

585

WREG32(rom_index_offset, rom_offset);

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

54

WREG32(offset, value);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

1669

WREG32(reg, tmp);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

7410

WREG32(address, reg * 4);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

7426

WREG32(address, reg * 4);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

7428

WREG32(data, v);

drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.c

55

WREG32((adev->rmmio_remap.reg_offset +

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

139

WREG32(rec->en_clk_reg, val);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

152

WREG32(rec->en_data_reg, val);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

52

WREG32(rec->mask_clk_reg, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

57

WREG32(rec->a_clk_reg, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

60

WREG32(rec->a_data_reg, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

64

WREG32(rec->en_clk_reg, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

67

WREG32(rec->en_data_reg, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

71

WREG32(rec->mask_clk_reg, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

75

WREG32(rec->mask_data_reg, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

90

WREG32(rec->mask_clk_reg, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.c

94

WREG32(rec->mask_data_reg, temp);

drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c

167

WREG32(adev->jpeg.inst[ring->me].external.jpeg_pitch[ring->pipe], 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5337

WREG32(err_status_lo_offset, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c

5338

WREG32(err_status_hi_offset, 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.c

74

WREG32(umsch->rb_wptr, ring->wptr << 2);

drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

207

WREG32(reg_offset, value); \

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

567

WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c

1587

WREG32(offset, value);

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

137

WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable), dpm_ctl);

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

199

WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_pratio), pratio_ctl); /* PRatio */

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

200

WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_request_interval), 24000); /* 1ms, unit=1/24MHz */

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

201

WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_decision_threshold), 1200000); /* 50ms */

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

202

WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_busy_clamp_threshold), 1200000);/* 50ms */

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

203

WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_idle_clamp_threshold), 1200000);/* 50ms */

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

215

WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable), dpm_ctl);

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

651

WREG32(vpe_get_reg_offset(vpe, ring->me, preempt_reg), 1);

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

667

WREG32(vpe_get_reg_offset(vpe, ring->me, preempt_reg), 0);

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

766

WREG32(vpe_get_reg_offset(vpe, i, vpe->regs.queue0_rb_wptr_lo),

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

768

WREG32(vpe_get_reg_offset(vpe, i, vpe->regs.queue0_rb_wptr_hi),

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c

890

WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.context_indicator), context_notify);

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

1955

WREG32(mmBIOS_SCRATCH_0, bios_0_scratch);

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

1956

WREG32(mmBIOS_SCRATCH_3, bios_3_scratch);

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

1957

WREG32(mmBIOS_SCRATCH_6, bios_6_scratch);

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c

68

WREG32(mmBIOS_SCRATCH_2, bios_2_scratch);

drivers/gpu/drm/amd/amdgpu/cik.c

1002

WREG32(mmBUS_CNTL, bus_cntl);

drivers/gpu/drm/amd/amdgpu/cik.c

1004

WREG32(mmD1VGA_CONTROL, d1vga_control);

drivers/gpu/drm/amd/amdgpu/cik.c

1005

WREG32(mmD2VGA_CONTROL, d2vga_control);

drivers/gpu/drm/amd/amdgpu/cik.c

1006

WREG32(mmVGA_RENDER_CONTROL, vga_render_control);

drivers/gpu/drm/amd/amdgpu/cik.c

1032

WREG32(mmSMC_IND_INDEX_0, ixROM_INDEX);

drivers/gpu/drm/amd/amdgpu/cik.c

1033

WREG32(mmSMC_IND_DATA_0, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1035

WREG32(mmSMC_IND_INDEX_0, ixROM_DATA);

drivers/gpu/drm/amd/amdgpu/cik.c

1250

WREG32(mmGMCON_RENG_EXECUTE, save->gmcon_reng_execute &

drivers/gpu/drm/amd/amdgpu/cik.c

1252

WREG32(mmGMCON_MISC, save->gmcon_misc &

drivers/gpu/drm/amd/amdgpu/cik.c

1262

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1263

WREG32(mmGMCON_PGFSM_CONFIG, 0x200010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1266

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1268

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1269

WREG32(mmGMCON_PGFSM_CONFIG, 0x300010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1272

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1274

WREG32(mmGMCON_PGFSM_WRITE, 0x210000);

drivers/gpu/drm/amd/amdgpu/cik.c

1275

WREG32(mmGMCON_PGFSM_CONFIG, 0xa00010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1278

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1280

WREG32(mmGMCON_PGFSM_WRITE, 0x21003);

drivers/gpu/drm/amd/amdgpu/cik.c

1281

WREG32(mmGMCON_PGFSM_CONFIG, 0xb00010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1284

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1286

WREG32(mmGMCON_PGFSM_WRITE, 0x2b00);

drivers/gpu/drm/amd/amdgpu/cik.c

1287

WREG32(mmGMCON_PGFSM_CONFIG, 0xc00010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1290

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1292

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1293

WREG32(mmGMCON_PGFSM_CONFIG, 0xd00010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1296

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1298

WREG32(mmGMCON_PGFSM_WRITE, 0x420000);

drivers/gpu/drm/amd/amdgpu/cik.c

1299

WREG32(mmGMCON_PGFSM_CONFIG, 0x100010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1302

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1304

WREG32(mmGMCON_PGFSM_WRITE, 0x120202);

drivers/gpu/drm/amd/amdgpu/cik.c

1305

WREG32(mmGMCON_PGFSM_CONFIG, 0x500010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1308

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1310

WREG32(mmGMCON_PGFSM_WRITE, 0x3e3e36);

drivers/gpu/drm/amd/amdgpu/cik.c

1311

WREG32(mmGMCON_PGFSM_CONFIG, 0x600010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1314

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1316

WREG32(mmGMCON_PGFSM_WRITE, 0x373f3e);

drivers/gpu/drm/amd/amdgpu/cik.c

1317

WREG32(mmGMCON_PGFSM_CONFIG, 0x700010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1320

WREG32(mmGMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/cik.c

1322

WREG32(mmGMCON_PGFSM_WRITE, 0x3e1332);

drivers/gpu/drm/amd/amdgpu/cik.c

1323

WREG32(mmGMCON_PGFSM_CONFIG, 0xe00010ff);

drivers/gpu/drm/amd/amdgpu/cik.c

1325

WREG32(mmGMCON_MISC3, save->gmcon_misc3);

drivers/gpu/drm/amd/amdgpu/cik.c

1326

WREG32(mmGMCON_MISC, save->gmcon_misc);

drivers/gpu/drm/amd/amdgpu/cik.c

1327

WREG32(mmGMCON_RENG_EXECUTE, save->gmcon_reng_execute);

drivers/gpu/drm/amd/amdgpu/cik.c

158

WREG32(mmPCIE_INDEX, reg);

drivers/gpu/drm/amd/amdgpu/cik.c

170

WREG32(mmPCIE_INDEX, reg);

drivers/gpu/drm/amd/amdgpu/cik.c

172

WREG32(mmPCIE_DATA, v);

drivers/gpu/drm/amd/amdgpu/cik.c

183

WREG32(mmSMC_IND_INDEX_0, (reg));

drivers/gpu/drm/amd/amdgpu/cik.c

1861

WREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);

drivers/gpu/drm/amd/amdgpu/cik.c

1872

WREG32(mmHDP_DEBUG0, 1);

drivers/gpu/drm/amd/amdgpu/cik.c

194

WREG32(mmSMC_IND_INDEX_0, (reg));

drivers/gpu/drm/amd/amdgpu/cik.c

195

WREG32(mmSMC_IND_DATA_0, (v));

drivers/gpu/drm/amd/amdgpu/cik.c

205

WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));

drivers/gpu/drm/amd/amdgpu/cik.c

216

WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));

drivers/gpu/drm/amd/amdgpu/cik.c

217

WREG32(mmUVD_CTX_DATA, (v));

drivers/gpu/drm/amd/amdgpu/cik.c

227

WREG32(mmDIDT_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/cik.c

238

WREG32(mmDIDT_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/cik.c

239

WREG32(mmDIDT_IND_DATA, (v));

drivers/gpu/drm/amd/amdgpu/cik.c

952

WREG32(mmSRBM_GFX_CNTL, srbm_gfx_cntl);

drivers/gpu/drm/amd/amdgpu/cik.c

964

WREG32(mmCONFIG_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/cik.c

985

WREG32(mmBUS_CNTL, (bus_cntl & ~BUS_CNTL__BIOS_ROM_DIS_MASK));

drivers/gpu/drm/amd/amdgpu/cik.c

988

WREG32(mmD1VGA_CONTROL,

drivers/gpu/drm/amd/amdgpu/cik.c

991

WREG32(mmD2VGA_CONTROL,

drivers/gpu/drm/amd/amdgpu/cik.c

994

WREG32(mmVGA_RENDER_CONTROL,

drivers/gpu/drm/amd/amdgpu/cik_ih.c

116

WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

124

WREG32(mmINTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

126

WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

136

WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/cik_ih.c

137

WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

139

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

142

WREG32(mmIH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

143

WREG32(mmIH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

152

WREG32(mmIH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

212

WREG32(mmIH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

218

WREG32(mmIH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

291

WREG32(mmIH_RB_RPTR, ih->rptr);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

401

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

407

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

67

WREG32(mmIH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

68

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

86

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

87

WREG32(mmIH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

89

WREG32(mmIH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/cik_ih.c

90

WREG32(mmIH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1056

WREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET, tmp);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1062

WREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET, tmp);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1069

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1075

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1098

WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1103

WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1114

WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

1119

WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

195

WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[ring->me],

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

316

WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

317

WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

376

WREG32(mmSDMA0_PHASE0_QUANTUM + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

378

WREG32(mmSDMA0_PHASE1_QUANTUM + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

386

WREG32(mmSDMA0_CNTL + sdma_offsets[i], f32_cntl);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

414

WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], me_cntl);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

440

WREG32(mmSDMA0_GFX_VIRTUAL_ADDR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

441

WREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

447

WREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

450

WREG32(mmSDMA0_SEM_INCOMPLETE_TIMER_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

451

WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

460

WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

463

WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

464

WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

465

WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

466

WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

469

WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

471

WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_LO + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

476

WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

477

WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

480

WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], ring->wptr << 2);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

483

WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

491

WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

550

WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

552

WREG32(mmSDMA0_UCODE_DATA + sdma_offsets[i], le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

553

WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], adev->sdma.instance[i].fw_version);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

879

WREG32(mmSDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, 0x00000100);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

880

WREG32(mmSDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET, 0x00000100);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

885

WREG32(mmSDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, data);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

890

WREG32(mmSDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET, data);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

903

WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

908

WREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

913

WREG32(mmSDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data);

drivers/gpu/drm/amd/amdgpu/cik_sdma.c

918

WREG32(mmSDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

116

WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

124

WREG32(mmINTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

127

WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

138

WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/cz_ih.c

139

WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

141

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

144

WREG32(mmIH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

145

WREG32(mmIH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

153

WREG32(mmIH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

223

WREG32(mmIH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

229

WREG32(mmIH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

280

WREG32(mmIH_RB_RPTR, ih->rptr);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

395

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

401

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

67

WREG32(mmIH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

68

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

86

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

87

WREG32(mmIH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

89

WREG32(mmIH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/cz_ih.c

90

WREG32(mmIH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1127

WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1131

WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1134

WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1138

WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1140

WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1221

WREG32(mmAFMT_AUDIO_SRC_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1487

WREG32(mmHDMI_ACR_32_0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1490

WREG32(mmHDMI_ACR_32_1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1494

WREG32(mmHDMI_ACR_44_0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1497

WREG32(mmHDMI_ACR_44_1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1501

WREG32(mmHDMI_ACR_48_0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1504

WREG32(mmHDMI_ACR_48_1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1521

WREG32(mmAFMT_AVI_INFO0 + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1523

WREG32(mmAFMT_AVI_INFO1 + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1525

WREG32(mmAFMT_AVI_INFO2 + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1527

WREG32(mmAFMT_AVI_INFO3 + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1553

WREG32(mmDCCG_AUDIO_DTO_SOURCE, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1554

WREG32(mmDCCG_AUDIO_DTO0_PHASE, dto_phase);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1555

WREG32(mmDCCG_AUDIO_DTO0_MODULE, dto_modulo);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1596

WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp); /* send null packets when required */

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1598

WREG32(mmAFMT_AUDIO_CRC_CONTROL + dig->afmt->offset, 0x1000);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1625

WREG32(mmHDMI_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1631

WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1638

WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1643

WREG32(mmAFMT_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1648

WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1650

WREG32(mmHDMI_GC + dig->afmt->offset, 0); /* unset HDMI_GC_AVMUTE */

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1657

WREG32(mmHDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1662

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1673

WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1679

WREG32(mmAFMT_60958_0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1683

WREG32(mmAFMT_60958_1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1692

WREG32(mmAFMT_60958_2 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1696

WREG32(mmAFMT_AUDIO_PACKET_CONTROL2 + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1722

WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1726

WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1731

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1733

WREG32(mmAFMT_RAMP_CONTROL0 + dig->afmt->offset, 0x00FFFFFF);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1734

WREG32(mmAFMT_RAMP_CONTROL1 + dig->afmt->offset, 0x007FFFFF);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1735

WREG32(mmAFMT_RAMP_CONTROL2 + dig->afmt->offset, 0x00000001);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1736

WREG32(mmAFMT_RAMP_CONTROL3 + dig->afmt->offset, 0x00000001);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

179

WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1822

WREG32(vga_control_regs[amdgpu_crtc->crtc_id], vga_control | 1);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1824

WREG32(vga_control_regs[amdgpu_crtc->crtc_id], vga_control);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1834

WREG32(mmGRPH_ENABLE + amdgpu_crtc->crtc_offset, 1);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

1836

WREG32(mmGRPH_ENABLE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

192

WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

193

WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2011

WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2013

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2015

WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2017

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2019

WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2021

WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2022

WREG32(mmGRPH_SWAP_CNTL + amdgpu_crtc->crtc_offset, fb_swap);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2034

WREG32(mmGRPH_LUT_10BIT_BYPASS + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2039

WREG32(mmGRPH_SURFACE_OFFSET_X + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2040

WREG32(mmGRPH_SURFACE_OFFSET_Y + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2041

WREG32(mmGRPH_X_START + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2042

WREG32(mmGRPH_Y_START + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2043

WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2044

WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2047

WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2051

WREG32(mmLB_DESKTOP_HEIGHT + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2056

WREG32(mmVIEWPORT_START + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2060

WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2064

WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2094

WREG32(mmLB_DATA_FORMAT + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2111

WREG32(mmINPUT_CSC_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2115

WREG32(mmPRESCALE_GRPH_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2119

WREG32(mmPRESCALE_OVL_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2124

WREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2126

WREG32(mmDC_LUT_CONTROL + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2128

WREG32(mmDC_LUT_BLACK_OFFSET_BLUE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2129

WREG32(mmDC_LUT_BLACK_OFFSET_GREEN + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2130

WREG32(mmDC_LUT_BLACK_OFFSET_RED + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2132

WREG32(mmDC_LUT_WHITE_OFFSET_BLUE + amdgpu_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2133

WREG32(mmDC_LUT_WHITE_OFFSET_GREEN + amdgpu_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2134

WREG32(mmDC_LUT_WHITE_OFFSET_RED + amdgpu_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2136

WREG32(mmDC_LUT_RW_MODE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2137

WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x00000007);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2139

WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2144

WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2154

WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2159

WREG32(mmGAMUT_REMAP_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2164

WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2169

WREG32(mmOUTPUT_CSC_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2172

WREG32(mmDENORM_CONTROL + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2178

WREG32(mmALPHA_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2280

WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2291

WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2300

WREG32(mmCUR_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2302

WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2308

WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2335

WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2336

WREG32(mmCUR_HOT_SPOT + amdgpu_crtc->crtc_offset, (xorigin << 16) | yorigin);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2337

WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

245

WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

247

WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

250

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

253

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2688

WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2978

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

2984

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3009

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3015

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3038

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3044

WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3067

WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3072

WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3143

WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3146

WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

317

WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3171

WREG32(mmGRPH_INTERRUPT_STATUS + crtc_offsets[crtc_id],

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3217

WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3232

WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3247

WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

351

WREG32(mmDC_HPD_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

357

WREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

366

WREG32(mmDC_HPD_TOGGLE_FILT_CNTL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

400

WREG32(mmDC_HPD_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

454

WREG32(mmVGA_HDP_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

462

WREG32(mmVGA_RENDER_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

494

WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

497

WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

498

WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

577

WREG32(mmFMT_BIT_DEPTH_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

630

WREG32(mmLB_MEMORY_CTRL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

634

WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1016

WREG32(mmDPG_PIPE_ARBITRATION_CONTROL3 + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1017

WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1024

WREG32(mmDPG_PIPE_ARBITRATION_CONTROL3 + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1025

WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1029

WREG32(mmDPG_PIPE_ARBITRATION_CONTROL3 + amdgpu_crtc->crtc_offset, arb_control3);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1032

WREG32(mmPRIORITY_A_CNT + amdgpu_crtc->crtc_offset, priority_a_cnt);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1033

WREG32(mmPRIORITY_B_CNT + amdgpu_crtc->crtc_offset, priority_b_cnt);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1090

WREG32(mmDC_LB_MEMORY_SPLIT + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1093

WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1191

WREG32(mmAFMT_AUDIO_SRC_CONTROL + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

142

WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1474

WREG32(mmHDMI_VBI_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1491

WREG32(mmHDMI_ACR_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1495

WREG32(mmHDMI_ACR_32_0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1498

WREG32(mmHDMI_ACR_32_1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1502

WREG32(mmHDMI_ACR_44_0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1505

WREG32(mmHDMI_ACR_44_1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1509

WREG32(mmHDMI_ACR_48_0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1512

WREG32(mmHDMI_ACR_48_1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1542

WREG32(mmAFMT_AVI_INFO0 + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1544

WREG32(mmAFMT_AVI_INFO1 + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1546

WREG32(mmAFMT_AVI_INFO2 + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1548

WREG32(mmAFMT_AVI_INFO3 + dig->afmt->offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

155

WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1555

WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

157

WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1582

WREG32(mmDCCG_AUDIO_DTO_SOURCE, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1584

WREG32(mmDCCG_AUDIO_DTO0_PHASE, 24000);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1585

WREG32(mmDCCG_AUDIO_DTO0_MODULE, clock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1587

WREG32(mmDCCG_AUDIO_DTO1_PHASE, 24000);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1588

WREG32(mmDCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1602

WREG32(mmAFMT_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1606

WREG32(mmAFMT_60958_0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1610

WREG32(mmAFMT_60958_1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1619

WREG32(mmAFMT_60958_2 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1623

WREG32(mmAFMT_AUDIO_PACKET_CONTROL2 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1628

WREG32(mmHDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1633

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1646

WREG32(mmHDMI_GC + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1663

WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1667

WREG32(mmHDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1671

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1678

WREG32(mmHDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1682

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1697

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1701

WREG32(mmDP_SEC_TIMESTAMP + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1708

WREG32(mmDP_SEC_CNTL + dig->afmt->offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1710

WREG32(mmDP_SEC_CNTL + dig->afmt->offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1865

WREG32(vga_control_regs[amdgpu_crtc->crtc_id], vga_control | (enable ? 1 : 0));

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

1874

WREG32(mmGRPH_ENABLE + amdgpu_crtc->crtc_offset, enable ? 1 : 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2029

WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2031

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2033

WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2035

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2037

WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2039

WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2040

WREG32(mmGRPH_SWAP_CNTL + amdgpu_crtc->crtc_offset, fb_swap);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2054

WREG32(mmGRPH_SURFACE_OFFSET_X + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2055

WREG32(mmGRPH_SURFACE_OFFSET_Y + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2056

WREG32(mmGRPH_X_START + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2057

WREG32(mmGRPH_Y_START + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2058

WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2059

WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2062

WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2066

WREG32(mmDESKTOP_HEIGHT + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2070

WREG32(mmVIEWPORT_START + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2075

WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2079

WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

208

WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, async ?

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2105

WREG32(mmDATA_FORMAT + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2108

WREG32(mmDATA_FORMAT + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

211

WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2121

WREG32(mmINPUT_CSC_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2124

WREG32(mmPRESCALE_GRPH_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2126

WREG32(mmPRESCALE_OVL_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2128

WREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2132

WREG32(mmDC_LUT_CONTROL + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2134

WREG32(mmDC_LUT_BLACK_OFFSET_BLUE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2135

WREG32(mmDC_LUT_BLACK_OFFSET_GREEN + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2136

WREG32(mmDC_LUT_BLACK_OFFSET_RED + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2138

WREG32(mmDC_LUT_WHITE_OFFSET_BLUE + amdgpu_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2139

WREG32(mmDC_LUT_WHITE_OFFSET_GREEN + amdgpu_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

214

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2140

WREG32(mmDC_LUT_WHITE_OFFSET_RED + amdgpu_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2142

WREG32(mmDC_LUT_RW_MODE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2143

WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x00000007);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2145

WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2150

WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2156

WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2161

WREG32(mmGAMUT_REMAP_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2164

WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2167

WREG32(mmOUTPUT_CSC_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

217

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2171

WREG32(0x1a50 + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2253

WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2261

WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2271

WREG32(mmCUR_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2273

WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2276

WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2308

WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2309

WREG32(mmCUR_HOT_SPOT + amdgpu_crtc->crtc_offset, (xorigin << 16) | yorigin);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2310

WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2655

WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

281

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2916

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2922

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

296

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2970

WREG32(mmINT_MASK + reg_block, interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

2975

WREG32(mmINT_MASK + reg_block, interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3005

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], dc_hpd_int_cntl);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3010

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], dc_hpd_int_cntl);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3079

WREG32(mmVBLANK_STATUS + crtc_offsets[crtc], VBLANK_STATUS__VBLANK_ACK_MASK);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3090

WREG32(mmVLINE_STATUS + crtc_offsets[crtc], VLINE_STATUS__VLINE_ACK_MASK);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3118

WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3121

WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

3146

WREG32(mmGRPH_INTERRUPT_STATUS + crtc_offsets[crtc_id],

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

323

WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

334

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

369

WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

414

WREG32(mmVGA_RENDER_CONTROL,

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

446

WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

449

WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

450

WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

509

WREG32(mmFMT_BIT_DEPTH_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1082

WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1083

WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1090

WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1091

WREG32(mmDPG_PIPE_URGENCY_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1095

WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1176

WREG32(mmAFMT_AUDIO_SRC_CONTROL + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

130

WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

143

WREG32(mmAZALIA_F0_CODEC_ENDPOINT_INDEX + block_offset, reg);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

144

WREG32(mmAZALIA_F0_CODEC_ENDPOINT_DATA + block_offset, v);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1466

WREG32(mmHDMI_ACR_32_0 + offset, (acr.cts_32khz << HDMI_ACR_32_0__HDMI_ACR_CTS_32__SHIFT));

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1467

WREG32(mmHDMI_ACR_32_1 + offset, acr.n_32khz);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1469

WREG32(mmHDMI_ACR_44_0 + offset, (acr.cts_44_1khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT));

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1470

WREG32(mmHDMI_ACR_44_1 + offset, acr.n_44_1khz);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1472

WREG32(mmHDMI_ACR_48_0 + offset, (acr.cts_48khz << HDMI_ACR_48_0__HDMI_ACR_CTS_48__SHIFT));

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1473

WREG32(mmHDMI_ACR_48_1 + offset, acr.n_48khz);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1490

WREG32(mmAFMT_AVI_INFO0 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1492

WREG32(mmAFMT_AVI_INFO1 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1494

WREG32(mmAFMT_AVI_INFO2 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1496

WREG32(mmAFMT_AVI_INFO3 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1518

WREG32(mmDCCG_AUDIO_DTO_SOURCE, (amdgpu_crtc->crtc_id << DCCG_AUDIO_DTO_SOURCE__DCCG_AUDIO_DTO0_SOURCE_SEL__SHIFT));

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1519

WREG32(mmDCCG_AUDIO_DTO0_PHASE, dto_phase);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1520

WREG32(mmDCCG_AUDIO_DTO0_MODULE, dto_modulo);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1561

WREG32(mmHDMI_VBI_PACKET_CONTROL + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1564

WREG32(mmAFMT_AUDIO_CRC_CONTROL + offset, 0x1000);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1593

WREG32(mmHDMI_CONTROL + offset, val);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1595

WREG32(mmHDMI_VBI_PACKET_CONTROL + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1600

WREG32(mmHDMI_INFOFRAME_CONTROL0 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1604

WREG32(mmAFMT_INFOFRAME_CONTROL0 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1607

WREG32(mmHDMI_INFOFRAME_CONTROL1 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1610

WREG32(mmHDMI_GC + offset, 0); /* unset HDMI_GC_AVMUTE */

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1612

WREG32(mmHDMI_AUDIO_PACKET_CONTROL + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1616

WREG32(mmAFMT_AUDIO_PACKET_CONTROL + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1622

WREG32(mmHDMI_ACR_PACKET_CONTROL + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1625

WREG32(mmHDMI_ACR_PACKET_CONTROL + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1631

WREG32(mmAFMT_60958_0 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1634

WREG32(mmAFMT_60958_1 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1637

WREG32(mmAFMT_60958_2 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1648

WREG32(mmAFMT_AUDIO_PACKET_CONTROL2 + offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1680

WREG32(mmAFMT_RAMP_CONTROL0 + offset, 0x00FFFFFF);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1681

WREG32(mmAFMT_RAMP_CONTROL1 + offset, 0x007FFFFF);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1682

WREG32(mmAFMT_RAMP_CONTROL2 + offset, 0x00000001);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1683

WREG32(mmAFMT_RAMP_CONTROL3 + offset, 0x00000001);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1769

WREG32(vga_control_regs[amdgpu_crtc->crtc_id], vga_control | 1);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1771

WREG32(vga_control_regs[amdgpu_crtc->crtc_id], vga_control);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1781

WREG32(mmGRPH_ENABLE + amdgpu_crtc->crtc_offset, 1);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1783

WREG32(mmGRPH_ENABLE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

192

WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, async ?

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1941

WREG32(mmGRPH_FLIP_CONTROL + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1943

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1945

WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1947

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1949

WREG32(mmGRPH_SECONDARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

195

WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1951

WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1952

WREG32(mmGRPH_SWAP_CNTL + amdgpu_crtc->crtc_offset, fb_swap);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1966

WREG32(mmGRPH_SURFACE_OFFSET_X + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1967

WREG32(mmGRPH_SURFACE_OFFSET_Y + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1968

WREG32(mmGRPH_X_START + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1969

WREG32(mmGRPH_Y_START + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1970

WREG32(mmGRPH_X_END + amdgpu_crtc->crtc_offset, target_fb->width);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1971

WREG32(mmGRPH_Y_END + amdgpu_crtc->crtc_offset, target_fb->height);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1974

WREG32(mmGRPH_PITCH + amdgpu_crtc->crtc_offset, fb_pitch_pixels);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1978

WREG32(mmLB_DESKTOP_HEIGHT + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

198

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1983

WREG32(mmVIEWPORT_START + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1987

WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

1991

WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

201

WREG32(mmGRPH_PRIMARY_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2016

WREG32(mmLB_DATA_FORMAT + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2019

WREG32(mmLB_DATA_FORMAT + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2032

WREG32(mmINPUT_CSC_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2035

WREG32(mmPRESCALE_GRPH_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2037

WREG32(mmPRESCALE_OVL_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2039

WREG32(mmINPUT_GAMMA_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2043

WREG32(mmDC_LUT_CONTROL + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2045

WREG32(mmDC_LUT_BLACK_OFFSET_BLUE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2046

WREG32(mmDC_LUT_BLACK_OFFSET_GREEN + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2047

WREG32(mmDC_LUT_BLACK_OFFSET_RED + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2049

WREG32(mmDC_LUT_WHITE_OFFSET_BLUE + amdgpu_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2050

WREG32(mmDC_LUT_WHITE_OFFSET_GREEN + amdgpu_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2051

WREG32(mmDC_LUT_WHITE_OFFSET_RED + amdgpu_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2053

WREG32(mmDC_LUT_RW_MODE + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2054

WREG32(mmDC_LUT_WRITE_EN_MASK + amdgpu_crtc->crtc_offset, 0x00000007);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2056

WREG32(mmDC_LUT_RW_INDEX + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2061

WREG32(mmDC_LUT_30_COLOR + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2067

WREG32(mmDEGAMMA_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2071

WREG32(mmGAMUT_REMAP_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2074

WREG32(mmREGAMMA_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2077

WREG32(mmOUTPUT_CSC_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2081

WREG32(0x1a50 + amdgpu_crtc->crtc_offset, 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2085

WREG32(mmALPHA_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2201

WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2209

WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2219

WREG32(mmCUR_SURFACE_ADDRESS_HIGH + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2221

WREG32(mmCUR_SURFACE_ADDRESS + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2224

WREG32(mmCUR_CONTROL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2254

WREG32(mmCUR_POSITION + amdgpu_crtc->crtc_offset, (x << 16) | y);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2255

WREG32(mmCUR_HOT_SPOT + amdgpu_crtc->crtc_offset, (xorigin << 16) | yorigin);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2256

WREG32(mmCUR_SIZE + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2614

WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

265

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

280

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2888

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2894

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2942

WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2947

WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2993

WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

2998

WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3021

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type], dc_hpd_int_cntl);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3026

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[type], dc_hpd_int_cntl);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

307

WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3095

WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], LB_VBLANK_STATUS__VBLANK_ACK_MASK);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3106

WREG32(mmLB_VLINE_STATUS + crtc_offsets[crtc], LB_VLINE_STATUS__VLINE_ACK_MASK);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3134

WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3137

WREG32(mmGRPH_INTERRUPT_CONTROL + crtc_offsets[type],

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

3162

WREG32(mmGRPH_INTERRUPT_STATUS + crtc_offsets[crtc_id],

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

318

WREG32(mmDC_HPD1_INT_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

353

WREG32(mmDC_HPD1_CONTROL + hpd_offsets[amdgpu_connector->hpd.hpd], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

405

WREG32(mmVGA_HDP_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

413

WREG32(mmVGA_RENDER_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

452

WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

455

WREG32(mmCRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

456

WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

532

WREG32(mmFMT_BIT_DEPTH_CONTROL + amdgpu_crtc->crtc_offset, tmp);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

583

WREG32(mmLB_MEMORY_CTRL + amdgpu_crtc->crtc_offset,

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

587

WREG32(mmPIPE0_DMIF_BUFFER_CONTROL + pipe_offset,

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

106

WREG32(address, lo_addr);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

108

WREG32(address, hi_addr);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

128

WREG32(address, lo_addr);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

129

WREG32(data, lo_val);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

130

WREG32(address, hi_addr);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

131

WREG32(data, hi_val);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

147

WREG32(address, lo_addr);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

148

WREG32(data, lo_val);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

149

WREG32(address, hi_addr);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

150

WREG32(data, hi_val);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

152

WREG32(address, lo_addr);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

154

WREG32(address, hi_addr);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

55

WREG32(address, smnDF_PIE_AON_FabricIndirectConfigAccessAddress3);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

56

WREG32(data, ficaa_val);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

58

WREG32(address, smnDF_PIE_AON_FabricIndirectConfigAccessDataLo3);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

61

WREG32(address, smnDF_PIE_AON_FabricIndirectConfigAccessDataHi3);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

78

WREG32(address, smnDF_PIE_AON_FabricIndirectConfigAccessAddress3);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

79

WREG32(data, ficaa_val);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

81

WREG32(address, smnDF_PIE_AON_FabricIndirectConfigAccessDataLo3);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

82

WREG32(data, ficadl_val);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

84

WREG32(address, smnDF_PIE_AON_FabricIndirectConfigAccessDataHi3);

drivers/gpu/drm/amd/amdgpu/df_v3_6.c

85

WREG32(data, ficadh_val);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

4041

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5191

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5192

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5194

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA0), 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

5195

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA1), 0);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8227

WREG32(reg_idx, reg_data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8235

WREG32(reg_idx, reg_data);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

8245

WREG32(reg_idx, reg_data);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

2316

WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL), tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

571

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

1975

WREG32(SOC15_REG_OFFSET(GC, 0, regRLC_SRM_CNTL), tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

459

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

1617

WREG32(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regRLC_SRM_CNTL), tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v12_1.c

271

WREG32(scratch_reg0_offset, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1074

WREG32(mmGB_TILE_MODE0 + reg_offset, tilemode[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1298

WREG32(mmGB_TILE_MODE0 + reg_offset, tilemode[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1326

WREG32(mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1459

WREG32(mmPA_SC_RASTER_CONFIG, raster_config_se);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1498

WREG32(mmPA_SC_RASTER_CONFIG, raster_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1531

WREG32(mmGC_USER_SHADER_ARRAY_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1564

WREG32(mmSPI_STATIC_THREAD_MGMT_3, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1678

WREG32(mmGRBM_CNTL, (0xff << GRBM_CNTL__READ_TIMEOUT__SHIFT));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1679

WREG32(mmSRBM_INT_CNTL, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1680

WREG32(mmSRBM_INT_ACK, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1682

WREG32(mmBIF_FB_EN, BIF_FB_EN__FB_READ_EN_MASK | BIF_FB_EN__FB_WRITE_EN_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1715

WREG32(mmGB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1716

WREG32(mmDMIF_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1717

WREG32(mmDMIF_ADDR_CALC, gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1718

WREG32(mmHDP_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1719

WREG32(mmDMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1720

WREG32(mmDMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1724

WREG32(mmUVD_UDEC_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1725

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1726

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1738

WREG32(mmCP_QUEUE_THRESHOLDS,

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1743

WREG32(mmCP_MEQ_THRESHOLDS,

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1748

WREG32(mmSX_DEBUG_1, sx_debug_1);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1750

WREG32(mmSPI_CONFIG_CNTL_1, (4 << SPI_CONFIG_CNTL_1__VTX_DONE_DELAY__SHIFT));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1752

WREG32(mmPA_SC_FIFO_SIZE, ((adev->gfx.config.sc_prim_fifo_size_frontend << PA_SC_FIFO_SIZE__SC_FRONTEND_PRIM_FIFO_SIZE__SHIFT) |

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1757

WREG32(mmVGT_NUM_INSTANCES, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1758

WREG32(mmCP_PERFMON_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1759

WREG32(mmSQ_CONFIG, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1760

WREG32(mmPA_SC_FORCE_EOV_MAX_CNTS, ((4095 << PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT__SHIFT) |

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1763

WREG32(mmVGT_CACHE_INVALIDATION,

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1767

WREG32(mmVGT_GS_VERTEX_REUSE, 16);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1768

WREG32(mmPA_SC_LINE_STIPPLE_STATE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1770

WREG32(mmCB_PERFCOUNTER0_SELECT0, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1771

WREG32(mmCB_PERFCOUNTER0_SELECT1, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1772

WREG32(mmCB_PERFCOUNTER1_SELECT0, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1773

WREG32(mmCB_PERFCOUNTER1_SELECT1, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1774

WREG32(mmCB_PERFCOUNTER2_SELECT0, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1775

WREG32(mmCB_PERFCOUNTER2_SELECT1, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1776

WREG32(mmCB_PERFCOUNTER3_SELECT0, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1777

WREG32(mmCB_PERFCOUNTER3_SELECT1, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1780

WREG32(mmHDP_HOST_PATH_CNTL, hdp_host_path_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1782

WREG32(mmPA_CL_ENHANCE, PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK |

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1795

WREG32(mmSCRATCH_REG0, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1902

WREG32(mmSCRATCH_REG0, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1939

WREG32(mmCP_ME_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1941

WREG32(mmCP_ME_CNTL, (CP_ME_CNTL__ME_HALT_MASK |

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1944

WREG32(mmSCRATCH_UMSK, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1974

WREG32(mmCP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1976

WREG32(mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1977

WREG32(mmCP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1983

WREG32(mmCP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1985

WREG32(mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1986

WREG32(mmCP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1992

WREG32(mmCP_ME_RAM_WADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1994

WREG32(mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1995

WREG32(mmCP_ME_RAM_WADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1997

WREG32(mmCP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1998

WREG32(mmCP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

1999

WREG32(mmCP_ME_RAM_WADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2000

WREG32(mmCP_ME_RAM_RADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2077

WREG32(mmCP_SEM_WAIT_TIMER, 0x0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2078

WREG32(mmCP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2081

WREG32(mmCP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2083

WREG32(mmCP_DEBUG, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2084

WREG32(mmSCRATCH_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2095

WREG32(mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2098

WREG32(mmCP_RB0_CNTL, tmp | CP_RB0_CNTL__RB_RPTR_WR_ENA_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2100

WREG32(mmCP_RB0_WPTR, ring->wptr);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2104

WREG32(mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2105

WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2107

WREG32(mmSCRATCH_UMSK, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2110

WREG32(mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2112

WREG32(mmCP_RB0_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2146

WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2155

WREG32(mmCP_RB1_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2158

WREG32(mmCP_RB2_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2183

WREG32(mmCP_RB1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2185

WREG32(mmCP_RB1_CNTL, tmp | CP_RB1_CNTL__RB_RPTR_WR_ENA_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2187

WREG32(mmCP_RB1_WPTR, ring->wptr);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2190

WREG32(mmCP_RB1_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2191

WREG32(mmCP_RB1_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2194

WREG32(mmCP_RB1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2195

WREG32(mmCP_RB1_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2203

WREG32(mmCP_RB2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2205

WREG32(mmCP_RB2_CNTL, tmp | CP_RB2_CNTL__RB_RPTR_WR_ENA_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2207

WREG32(mmCP_RB2_WPTR, ring->wptr);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2209

WREG32(mmCP_RB2_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2210

WREG32(mmCP_RB2_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2213

WREG32(mmCP_RB2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2214

WREG32(mmCP_RB2_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2249

WREG32(mmCP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2416

WREG32(mmSPI_LB_CU_MASK, 0x00ff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2443

WREG32(mmRLC_CNTL, rlc);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2454

WREG32(mmRLC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2464

WREG32(mmRLC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2472

WREG32(mmRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2518

WREG32(mmRLC_RL_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2519

WREG32(mmRLC_RL_SIZE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2520

WREG32(mmRLC_LB_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2521

WREG32(mmRLC_LB_CNTR_MAX, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2522

WREG32(mmRLC_LB_CNTR_INIT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2523

WREG32(mmRLC_LB_INIT_CU_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2525

WREG32(mmRLC_MC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2526

WREG32(mmRLC_UCODE_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2536

WREG32(mmRLC_UCODE_ADDR, i);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2537

WREG32(mmRLC_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2539

WREG32(mmRLC_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2556

WREG32(mmRLC_GCPM_GENERAL_3, 0x00000080);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2560

WREG32(mmRLC_SERDES_WR_MASTER_MASK_0, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2561

WREG32(mmRLC_SERDES_WR_MASTER_MASK_1, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2562

WREG32(mmRLC_SERDES_WR_CTRL, 0x00b000ff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2567

WREG32(mmRLC_SERDES_WR_CTRL, 0x007000ff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2582

WREG32(mmRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2595

WREG32(mmCGTS_SM_CTRL_REG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2601

WREG32(mmCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2607

WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2611

WREG32(mmRLC_SERDES_WR_MASTER_MASK_0, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2612

WREG32(mmRLC_SERDES_WR_MASTER_MASK_1, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2613

WREG32(mmRLC_SERDES_WR_CTRL, 0x00d000ff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2620

WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2625

WREG32(mmCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2630

WREG32(mmCGTS_SM_CTRL_REG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2634

WREG32(mmRLC_SERDES_WR_MASTER_MASK_0, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2635

WREG32(mmRLC_SERDES_WR_MASTER_MASK_1, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2636

WREG32(mmRLC_SERDES_WR_CTRL, 0x00e000ff);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2677

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2755

WREG32(mmRLC_TTOP_D, RLC_PUD(0x10) | RLC_PDD(0x10) | RLC_TTPD(0x10) | RLC_MSD(0x10));

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2768

WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2773

WREG32(mmRLC_MAX_PG_CU, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2787

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2801

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2808

WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2810

WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2816

WREG32(mmRLC_AUTO_PG_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2892

WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2893

WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2900

WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2901

WREG32(mmRLC_CLEAR_STATE_RESTORE_BASE, adev->gfx.rlc.clear_state_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2926

WREG32(mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2945

WREG32(mmSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

2957

WREG32(mmSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3201

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3206

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3223

WREG32(mmCP_INT_CNTL_RING1, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3228

WREG32(mmCP_INT_CNTL_RING2, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3236

WREG32(mmCP_INT_CNTL_RING1, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3241

WREG32(mmCP_INT_CNTL_RING2, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3264

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3269

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3289

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

3294

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

644

WREG32(mmGB_TILE_MODE0 + reg_offset, tilemode[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

850

WREG32(mmGB_TILE_MODE0 + reg_offset, tilemode[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1186

WREG32(mmGB_TILE_MODE0 + reg_offset, tile[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1189

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, macrotile[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1369

WREG32(mmGB_TILE_MODE0 + reg_offset, tile[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1372

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, macrotile[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1539

WREG32(mmGB_TILE_MODE0 + reg_offset, tile[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1542

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, macrotile[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1581

WREG32(mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1741

WREG32(mmPA_SC_RASTER_CONFIG, raster_config_se);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1742

WREG32(mmPA_SC_RASTER_CONFIG_1, raster_config_1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1787

WREG32(mmPA_SC_RASTER_CONFIG, raster_config);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1788

WREG32(mmPA_SC_RASTER_CONFIG_1, raster_config_1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1842

WREG32(mmSH_MEM_CONFIG, sh_mem_config);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1843

WREG32(mmSH_MEM_APE1_BASE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1844

WREG32(mmSH_MEM_APE1_LIMIT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1845

WREG32(mmSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1853

WREG32(amdgpu_gds_reg_offset[i].mem_base, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1854

WREG32(amdgpu_gds_reg_offset[i].mem_size, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1855

WREG32(amdgpu_gds_reg_offset[i].gws, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1856

WREG32(amdgpu_gds_reg_offset[i].oa, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1871

WREG32(amdgpu_gds_reg_offset[vmid].mem_base, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1872

WREG32(amdgpu_gds_reg_offset[vmid].mem_size, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1873

WREG32(amdgpu_gds_reg_offset[vmid].gws, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1874

WREG32(amdgpu_gds_reg_offset[vmid].oa, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1897

WREG32(mmGRBM_CNTL, (0xff << GRBM_CNTL__READ_TIMEOUT__SHIFT));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1899

WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1900

WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1901

WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1910

WREG32(mmCP_MEQ_THRESHOLDS,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1937

WREG32(mmSH_STATIC_MEM_CONFIG, sh_static_mem_cfg);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1947

WREG32(mmSH_MEM_CONFIG, sh_mem_cfg);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1948

WREG32(mmSH_MEM_APE1_BASE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1949

WREG32(mmSH_MEM_APE1_LIMIT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1950

WREG32(mmSH_MEM_BASES, sh_mem_base);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1958

WREG32(mmSX_DEBUG_1, 0x20);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1960

WREG32(mmTA_CNTL_AUX, 0x00010000);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1964

WREG32(mmSPI_CONFIG_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1966

WREG32(mmSQ_CONFIG, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1968

WREG32(mmDB_DEBUG, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1972

WREG32(mmDB_DEBUG2, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1976

WREG32(mmDB_DEBUG3, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1980

WREG32(mmCB_HW_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1982

WREG32(mmSPI_CONFIG_CNTL_1, (4 << SPI_CONFIG_CNTL_1__VTX_DONE_DELAY__SHIFT));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1984

WREG32(mmPA_SC_FIFO_SIZE,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1990

WREG32(mmVGT_NUM_INSTANCES, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1992

WREG32(mmCP_PERFMON_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1994

WREG32(mmSQ_CONFIG, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

1996

WREG32(mmPA_SC_FORCE_EOV_MAX_CNTS,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2000

WREG32(mmVGT_CACHE_INVALIDATION,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2004

WREG32(mmVGT_GS_VERTEX_REUSE, 16);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2005

WREG32(mmPA_SC_LINE_STIPPLE_STATE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2007

WREG32(mmPA_CL_ENHANCE, PA_CL_ENHANCE__CLIP_VTX_REORDER_ENA_MASK |

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2009

WREG32(mmPA_SC_ENHANCE, PA_SC_ENHANCE__ENABLE_PA_SC_OUT_OF_ORDER_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2016

WREG32(mmSPI_ARB_PRIORITY, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2040

WREG32(mmSCRATCH_REG0, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2299

WREG32(mmSCRATCH_REG0, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2367

WREG32(mmCP_ME_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2369

WREG32(mmCP_ME_CNTL, (CP_ME_CNTL__ME_HALT_MASK |

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2415

WREG32(mmCP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2417

WREG32(mmCP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2418

WREG32(mmCP_PFP_UCODE_ADDR, adev->gfx.pfp_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2425

WREG32(mmCP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2427

WREG32(mmCP_CE_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2428

WREG32(mmCP_CE_UCODE_ADDR, adev->gfx.ce_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2435

WREG32(mmCP_ME_RAM_WADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2437

WREG32(mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2438

WREG32(mmCP_ME_RAM_WADDR, adev->gfx.me_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2460

WREG32(mmCP_MAX_CONTEXT, adev->gfx.config.max_hw_contexts - 1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2461

WREG32(mmCP_ENDIAN_SWAP, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2462

WREG32(mmCP_DEVICE_ID, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2536

WREG32(mmCP_SEM_WAIT_TIMER, 0x0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2538

WREG32(mmCP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2541

WREG32(mmCP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2544

WREG32(mmCP_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2546

WREG32(mmSCRATCH_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2556

WREG32(mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2559

WREG32(mmCP_RB0_CNTL, tmp | CP_RB0_CNTL__RB_RPTR_WR_ENA_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2561

WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2565

WREG32(mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2566

WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2569

WREG32(mmSCRATCH_UMSK, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2572

WREG32(mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2575

WREG32(mmCP_RB0_BASE, rb_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2576

WREG32(mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2603

WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2633

WREG32(mmCP_MEC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2635

WREG32(mmCP_MEC_CNTL, (CP_MEC_CNTL__MEC_ME1_HALT_MASK |

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2670

WREG32(mmCP_MEC_ME1_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2672

WREG32(mmCP_MEC_ME1_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2673

WREG32(mmCP_MEC_ME1_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2692

WREG32(mmCP_MEC_ME2_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2694

WREG32(mmCP_MEC_ME2_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2695

WREG32(mmCP_MEC_ME2_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2775

WREG32(mmCP_HPD_EOP_BASE_ADDR, eop_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2776

WREG32(mmCP_HPD_EOP_BASE_ADDR_HI, upper_32_bits(eop_gpu_addr) >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2779

WREG32(mmCP_HPD_EOP_VMID, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2785

WREG32(mmCP_HPD_EOP_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2797

WREG32(mmCP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2807

WREG32(mmCP_HQD_DEQUEUE_REQUEST, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2808

WREG32(mmCP_HQD_PQ_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2809

WREG32(mmCP_HQD_PQ_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2947

WREG32(mmCP_PQ_WPTR_POLL_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2951

WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

2955

WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3008

WREG32(mmCP_CPF_DEBUG, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3065

WREG32(mmCP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3254

WREG32(mmRLC_LB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3293

WREG32(mmRLC_CNTL, rlc);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3306

WREG32(mmRLC_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3330

WREG32(mmRLC_GPR_REG2, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3352

WREG32(mmRLC_GPR_REG2, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3364

WREG32(mmRLC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3380

WREG32(mmRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3392

WREG32(mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3395

WREG32(mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3428

WREG32(mmRLC_CGCG_CGLS_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3434

WREG32(mmRLC_LB_CNTR_INIT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3435

WREG32(mmRLC_LB_CNTR_MAX, 0x00008000);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3439

WREG32(mmRLC_LB_INIT_CU_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3440

WREG32(mmRLC_LB_PARAMS, 0x00600408);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3441

WREG32(mmRLC_LB_CNTL, 0x80000004);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3444

WREG32(mmRLC_MC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3445

WREG32(mmRLC_UCODE_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3450

WREG32(mmRLC_GPM_UCODE_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3452

WREG32(mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3453

WREG32(mmRLC_GPM_UCODE_ADDR, adev->gfx.rlc_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3459

WREG32(mmRLC_DRIVER_CPDMA_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3478

WREG32(mmRLC_SPM_VMID, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3496

WREG32(mmRLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3497

WREG32(mmRLC_SERDES_WR_NONCU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3501

WREG32(mmRLC_SERDES_WR_CTRL, tmp2);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3508

WREG32(mmRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3520

WREG32(mmRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3536

WREG32(mmCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3544

WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3550

WREG32(mmRLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3551

WREG32(mmRLC_SERDES_WR_NONCU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3554

WREG32(mmRLC_SERDES_WR_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3572

WREG32(mmCGTS_SM_CTRL_REG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3578

WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3583

WREG32(mmRLC_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3589

WREG32(mmCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3595

WREG32(mmCGTS_SM_CTRL_REG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3601

WREG32(mmRLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3602

WREG32(mmRLC_SERDES_WR_NONCU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3604

WREG32(mmRLC_SERDES_WR_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3637

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3651

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3664

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3677

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3697

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3702

WREG32(mmRLC_AUTO_PG_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3707

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3712

WREG32(mmRLC_AUTO_PG_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3729

WREG32(mmGC_USER_SHADER_ARRAY_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3751

WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3756

WREG32(mmRLC_MAX_PG_CU, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3770

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3784

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3796

WREG32(mmRLC_GPM_SCRATCH_ADDR, RLC_CLEAR_STATE_DESCRIPTOR_OFFSET);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3797

WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3798

WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3799

WREG32(mmRLC_GPM_SCRATCH_DATA, adev->gfx.rlc.clear_state_size);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3801

WREG32(mmRLC_GPM_SCRATCH_ADDR, RLC_CLEAR_STATE_DESCRIPTOR_OFFSET);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3803

WREG32(mmRLC_GPM_SCRATCH_DATA, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3806

WREG32(mmRLC_GPM_SCRATCH_ADDR, RLC_SAVE_AND_RESTORE_STARTING_OFFSET);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3808

WREG32(mmRLC_GPM_SCRATCH_DATA, adev->gfx.rlc.reg_list[i]);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3814

WREG32(mmRLC_PG_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3816

WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3817

WREG32(mmRLC_JUMP_TABLE_RESTORE, adev->gfx.rlc.cp_table_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3822

WREG32(mmCP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3825

WREG32(mmRLC_PG_DELAY, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3830

WREG32(mmRLC_PG_DELAY_2, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3835

WREG32(mmRLC_AUTO_PG_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

3947

WREG32(mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4002

WREG32(mmSQ_CMD, value);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4007

WREG32(mmSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4019

WREG32(mmSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4578

WREG32(mmCP_ME_CNTL, CP_ME_CNTL__ME_HALT_MASK | CP_ME_CNTL__PFP_HALT_MASK | CP_ME_CNTL__CE_HALT_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4581

WREG32(mmCP_MEC_CNTL, CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4587

WREG32(mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4593

WREG32(mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4601

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4607

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4625

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4630

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4676

WREG32(mec_int_cntl_reg, mec_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4681

WREG32(mec_int_cntl_reg, mec_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4699

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4704

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4724

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

4729

WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1493

WREG32(mmGB_EDC_MODE, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1620

WREG32(mmGB_EDC_MODE, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

1624

WREG32(mmCC_GC_EDC_CONFIG, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

2245

WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

2249

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

2435

WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

2439

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

2624

WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

2628

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

2827

WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

2831

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3029

WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3033

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3200

WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3204

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3377

WREG32(mmGB_TILE_MODE0 + reg_offset, modearray[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3381

WREG32(mmGB_MACROTILE_MODE0 + reg_offset, mod2array[reg_offset]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3408

WREG32(mmGRBM_GFX_INDEX, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3574

WREG32(mmPA_SC_RASTER_CONFIG, raster_config_se);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3575

WREG32(mmPA_SC_RASTER_CONFIG_1, raster_config_1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3613

WREG32(mmPA_SC_RASTER_CONFIG, raster_config);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3614

WREG32(mmPA_SC_RASTER_CONFIG_1, raster_config_1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3673

WREG32(mmSH_MEM_CONFIG, sh_mem_config);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3674

WREG32(mmSH_MEM_APE1_BASE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3675

WREG32(mmSH_MEM_APE1_LIMIT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3676

WREG32(mmSH_MEM_BASES, sh_mem_bases);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3684

WREG32(amdgpu_gds_reg_offset[i].mem_base, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3685

WREG32(amdgpu_gds_reg_offset[i].mem_size, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3686

WREG32(amdgpu_gds_reg_offset[i].gws, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3687

WREG32(amdgpu_gds_reg_offset[i].oa, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3702

WREG32(amdgpu_gds_reg_offset[vmid].mem_base, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3703

WREG32(amdgpu_gds_reg_offset[vmid].mem_size, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3704

WREG32(amdgpu_gds_reg_offset[vmid].gws, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3705

WREG32(amdgpu_gds_reg_offset[vmid].oa, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3728

WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3729

WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3730

WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3745

WREG32(mmSH_STATIC_MEM_CONFIG, sh_static_mem_cfg);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3756

WREG32(mmSH_MEM_CONFIG, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3757

WREG32(mmSH_MEM_BASES, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3763

WREG32(mmSH_MEM_CONFIG, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3765

WREG32(mmSH_MEM_BASES, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3768

WREG32(mmSH_MEM_APE1_BASE, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3769

WREG32(mmSH_MEM_APE1_LIMIT, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3784

WREG32(mmPA_SC_FIFO_SIZE,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3799

WREG32(mmSPI_ARB_PRIORITY, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3853

WREG32(mmCP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3860

WREG32(mmRLC_CSIB_ADDR_HI,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3862

WREG32(mmRLC_CSIB_ADDR_LO,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3864

WREG32(mmRLC_CSIB_LENGTH,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3946

WREG32(mmRLC_SRM_ARAM_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3948

WREG32(mmRLC_SRM_ARAM_DATA, adev->gfx.rlc.register_restore[i]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3951

WREG32(mmRLC_GPM_SCRATCH_ADDR, adev->gfx.rlc.reg_list_format_start);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3953

WREG32(mmRLC_GPM_SCRATCH_DATA, register_list_format[i]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3957

WREG32(mmRLC_GPM_SCRATCH_ADDR, adev->gfx.rlc.reg_restore_list_size);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3958

WREG32(mmRLC_GPM_SCRATCH_DATA, list_size);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3961

WREG32(mmRLC_GPM_SCRATCH_ADDR,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3964

WREG32(mmRLC_GPM_SCRATCH_DATA,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3972

WREG32(temp + i, unique_indices[i] & 0x3FFFF);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3973

WREG32(data + i, unique_indices[i] >> 20);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

3996

WREG32(mmRLC_PG_DELAY, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4027

WREG32(mmRLC_JUMP_TABLE_RESTORE, adev->gfx.rlc.cp_table_gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4029

WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4097

WREG32(mmCP_ME_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4138

WREG32(mmCP_MAX_CONTEXT, adev->gfx.config.max_hw_contexts - 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4139

WREG32(mmCP_ENDIAN_SWAP, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4140

WREG32(mmCP_DEVICE_ID, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4213

WREG32(mmCP_RB_DOORBELL_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4221

WREG32(mmCP_RB_DOORBELL_RANGE_LOWER, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4223

WREG32(mmCP_RB_DOORBELL_RANGE_UPPER,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4235

WREG32(mmCP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4238

WREG32(mmCP_RB_VMID, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4250

WREG32(mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4253

WREG32(mmCP_RB0_CNTL, tmp | CP_RB0_CNTL__RB_RPTR_WR_ENA_MASK);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4255

WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4259

WREG32(mmCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4260

WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4263

WREG32(mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4264

WREG32(mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4266

WREG32(mmCP_RB0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4269

WREG32(mmCP_RB0_BASE, rb_addr);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4270

WREG32(mmCP_RB0_BASE_HI, upper_32_bits(rb_addr));

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4283

WREG32(mmCP_MEC_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4285

WREG32(mmCP_MEC_CNTL, (CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK));

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4301

WREG32(mmRLC_CP_SCHEDULERS, tmp | 0x80);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4379

WREG32(mmCP_HQD_DEQUEUE_REQUEST, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4380

WREG32(mmCP_HQD_PQ_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4381

WREG32(mmCP_HQD_PQ_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4560

WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4568

WREG32(mmCP_HQD_EOP_RPTR, mqd->cp_hqd_eop_rptr);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4569

WREG32(mmCP_HQD_EOP_WPTR, mqd->cp_hqd_eop_wptr);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4570

WREG32(mmCP_HQD_EOP_WPTR_MEM, mqd->cp_hqd_eop_wptr_mem);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4574

WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4578

WREG32(mqd_reg, mqd_data[mqd_reg - mmCP_MQD_BASE_ADDR]);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4656

WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, adev->doorbell_index.kiq << 2);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

4657

WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, adev->doorbell_index.mec_ring7 << 2);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5010

WREG32(mmGMCON_DEBUG, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5018

WREG32(mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5024

WREG32(mmGRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5032

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5038

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5046

WREG32(mmGMCON_DEBUG, tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5109

WREG32(mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5157

WREG32(mmSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5169

WREG32(mmSQ_IND_INDEX,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5484

WREG32(mmRLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5485

WREG32(mmRLC_SERDES_WR_NONCU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5515

WREG32(mmRLC_SERDES_WR_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5544

WREG32(mmRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5571

WREG32(mmRLC_SAFE_MODE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5598

WREG32(mmRLC_SPM_VMID, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5647

WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5668

WREG32(mmCGTS_SM_CTRL_REG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5682

WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5688

WREG32(mmRLC_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5695

WREG32(mmCP_MEM_SLP_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5703

WREG32(mmCGTS_SM_CTRL_REG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5729

WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5754

WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5760

WREG32(mmRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5775

WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data1);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

5799

WREG32(mmRLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6031

WREG32(mmCP_RB0_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6382

WREG32(mmSQ_CMD, value);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6431

WREG32(mec_int_cntl_reg, mec_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

6436

WREG32(mec_int_cntl_reg, mec_int_cntl);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

7057

WREG32(mmGC_USER_SHADER_ARRAY_CONFIG, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

845

WREG32(mmSCRATCH_REG0, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

1202

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2581

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2582

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_MASK), 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2584

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA0), 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2585

WREG32(SOC15_REG_OFFSET(GC, 0, mmSPI_GDBG_TRAP_DATA1), 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2853

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL), tmp);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2856

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_ARAM_ADDR),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2859

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_ARAM_DATA),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2863

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_ADDR),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2868

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2896

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_ADDR),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2898

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA), list_size);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2901

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_ADDR),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2904

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA),

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2910

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_INDEX_CNTL_ADDR_0)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2914

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_INDEX_CNTL_DATA_0)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2940

WREG32(SOC15_REG_OFFSET(PWR, 0, mmPWR_MISC_CNTL_STATUS), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2946

WREG32(SOC15_REG_OFFSET(PWR, 0, mmPWR_MISC_CNTL_STATUS), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2951

WREG32(SOC15_REG_OFFSET(PWR, 0, mmPWR_MISC_CNTL_STATUS), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2966

WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_RB_WPTR_POLL_CNTL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2974

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2979

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_2), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2984

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_DELAY_3), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

2991

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_AUTO_PG_CTRL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3008

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3022

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3036

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3049

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3062

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3079

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

3092

WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1522

WREG32(SOC15_REG_ENTRY_OFFSET(

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1538

WREG32(SOC15_REG_ENTRY_OFFSET(

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1625

WREG32(SOC15_REG_ENTRY_OFFSET(blk->idx_reg), j);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1629

WREG32(SOC15_REG_ENTRY_OFFSET(blk->data_reg),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1644

WREG32(SOC15_REG_ENTRY_OFFSET(blk->data_reg),

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1699

WREG32(SOC15_REG_ENTRY_OFFSET(gfx_v9_4_2_ea_err_status_regs), value);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

1738

WREG32(SOC15_REG_ENTRY_OFFSET(gfx_v9_4_2_ea_err_status_regs), reg_value);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

779

WREG32(SOC15_REG_OFFSET(GC, 0, regSPI_GDBG_PER_VMID_CNTL), data);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

785

WREG32(SOC15_REG_OFFSET(GC, 0, regSPI_GDBG_TRAP_DATA0), 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c

786

WREG32(SOC15_REG_OFFSET(GC, 0, regSPI_GDBG_TRAP_DATA1), 0);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1789

WREG32(mec_ucode_addr_offset, mec_hdr->jt_offset);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1791

WREG32(mec_ucode_data_offset,

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

1794

WREG32(mec_ucode_addr_offset, adev->gfx.mec_fw_version);

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c

427

WREG32(scratch_reg0_offset, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c

894

WREG32(hub->vm_contexts_disable, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c

243

WREG32(SOC15_REG_OFFSET(OSSSYS, 0, regIH_VMID_LUT_INDEX), index);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

100

WREG32(mmBIF_FB_EN, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

1012

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

1018

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

1047

WREG32(mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

1050

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

1055

WREG32(mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

1058

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

173

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

174

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000010);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

178

WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(new_io_mc_regs++));

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

179

WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(new_io_mc_regs++));

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

183

WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(new_fw_data++));

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

186

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

187

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000004);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

188

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000001);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

227

WREG32((0xb05 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

228

WREG32((0xb06 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

229

WREG32((0xb07 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

230

WREG32((0xb08 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

231

WREG32((0xb09 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

233

WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

248

WREG32(mmVGA_HDP_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

253

WREG32(mmVGA_RENDER_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

256

WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

258

WREG32(mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

260

WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

262

WREG32(mmMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

263

WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

264

WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

357

WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

412

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

443

WREG32(mmVM_PRT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

451

WREG32(mmVM_PRT_APERTURE0_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

452

WREG32(mmVM_PRT_APERTURE1_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

453

WREG32(mmVM_PRT_APERTURE2_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

454

WREG32(mmVM_PRT_APERTURE3_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

455

WREG32(mmVM_PRT_APERTURE0_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

456

WREG32(mmVM_PRT_APERTURE1_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

457

WREG32(mmVM_PRT_APERTURE2_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

458

WREG32(mmVM_PRT_APERTURE3_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

460

WREG32(mmVM_PRT_APERTURE0_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

461

WREG32(mmVM_PRT_APERTURE1_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

462

WREG32(mmVM_PRT_APERTURE2_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

463

WREG32(mmVM_PRT_APERTURE3_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

464

WREG32(mmVM_PRT_APERTURE0_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

465

WREG32(mmVM_PRT_APERTURE1_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

466

WREG32(mmVM_PRT_APERTURE2_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

467

WREG32(mmVM_PRT_APERTURE3_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

486

WREG32(mmMC_VM_MX_L1_TLB_CNTL,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

494

WREG32(mmVM_L2_CNTL,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

501

WREG32(mmVM_L2_CNTL2,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

506

WREG32(mmVM_L2_CNTL3,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

511

WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

512

WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

513

WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, table_addr >> 12);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

514

WREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

516

WREG32(mmVM_CONTEXT0_CNTL2, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

517

WREG32(mmVM_CONTEXT0_CNTL,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

522

WREG32(0x575, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

523

WREG32(0x576, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

524

WREG32(0x577, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

528

WREG32(mmVM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

529

WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

536

WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

539

WREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + i - 8,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

544

WREG32(mmVM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

546

WREG32(mmVM_CONTEXT1_CNTL2, 4);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

547

WREG32(mmVM_CONTEXT1_CNTL,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

594

WREG32(mmVM_CONTEXT0_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

595

WREG32(mmVM_CONTEXT1_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

597

WREG32(mmMC_VM_MX_L1_TLB_CNTL,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

601

WREG32(mmVM_L2_CNTL,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

606

WREG32(mmVM_L2_CNTL2, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

607

WREG32(mmVM_L2_CNTL3,

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

679

WREG32(mc_cg_registers[i], data);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

696

WREG32(mc_cg_registers[i], data);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

736

WREG32(mmHDP_HOST_PATH_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

752

WREG32(mmHDP_MEM_POWER_LS, data);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

78

WREG32(mmBIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

82

WREG32(mmMC_SHARED_BLACKOUT_CNTL, blackout | 1);

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

96

WREG32(mmMC_SHARED_BLACKOUT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

102

WREG32(mmBIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

106

WREG32(mmMC_SHARED_BLACKOUT_CNTL, blackout | 1);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

119

WREG32(mmMC_SHARED_BLACKOUT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1197

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1203

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

123

WREG32(mmBIF_FB_EN, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1234

WREG32(mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1238

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1244

WREG32(mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

1248

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

203

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

204

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000010);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

208

WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(io_mc_regs++));

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

209

WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(io_mc_regs++));

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

213

WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

216

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

217

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000004);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

218

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000001);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

270

WREG32((0xb05 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

271

WREG32((0xb06 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

272

WREG32((0xb07 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

273

WREG32((0xb08 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

274

WREG32((0xb09 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

276

WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

285

WREG32(mmVGA_HDP_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

290

WREG32(mmVGA_RENDER_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

293

WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

295

WREG32(mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

297

WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

299

WREG32(mmMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

300

WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

301

WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

305

WREG32(mmBIF_FB_EN, BIF_FB_EN__FB_READ_EN_MASK | BIF_FB_EN__FB_WRITE_EN_MASK);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

309

WREG32(mmHDP_MISC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

312

WREG32(mmHDP_HOST_PATH_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

449

WREG32(mmVM_INVALIDATE_REQUEST, mask);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

474

WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

540

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

573

WREG32(mmVM_PRT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

581

WREG32(mmVM_PRT_APERTURE0_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

582

WREG32(mmVM_PRT_APERTURE1_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

583

WREG32(mmVM_PRT_APERTURE2_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

584

WREG32(mmVM_PRT_APERTURE3_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

585

WREG32(mmVM_PRT_APERTURE0_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

586

WREG32(mmVM_PRT_APERTURE1_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

587

WREG32(mmVM_PRT_APERTURE2_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

588

WREG32(mmVM_PRT_APERTURE3_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

590

WREG32(mmVM_PRT_APERTURE0_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

591

WREG32(mmVM_PRT_APERTURE1_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

592

WREG32(mmVM_PRT_APERTURE2_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

593

WREG32(mmVM_PRT_APERTURE3_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

594

WREG32(mmVM_PRT_APERTURE0_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

595

WREG32(mmVM_PRT_APERTURE1_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

596

WREG32(mmVM_PRT_APERTURE2_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

597

WREG32(mmVM_PRT_APERTURE3_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

632

WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

642

WREG32(mmVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

645

WREG32(mmVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

652

WREG32(mmVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

654

WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

655

WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

656

WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, table_addr >> 12);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

657

WREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

659

WREG32(mmVM_CONTEXT0_CNTL2, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

664

WREG32(mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

666

WREG32(0x575, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

667

WREG32(0x576, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

668

WREG32(0x577, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

675

WREG32(mmVM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

676

WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

679

WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

682

WREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + i - 8,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

687

WREG32(mmVM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

689

WREG32(mmVM_CONTEXT1_CNTL2, 4);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

695

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

704

WREG32(mmCHUB_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

743

WREG32(mmVM_CONTEXT0_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

744

WREG32(mmVM_CONTEXT1_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

750

WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

754

WREG32(mmVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

755

WREG32(mmVM_L2_CNTL2, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

839

WREG32(mc_cg_registers[i], data);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

856

WREG32(mc_cg_registers[i], data);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

896

WREG32(mmHDP_HOST_PATH_CNTL, data);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

912

WREG32(mmHDP_MEM_POWER_LS, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1359

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1365

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1405

WREG32(mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1409

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1415

WREG32(mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1419

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1516

WREG32(mmMC_HUB_MISC_HUB_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1520

WREG32(mmMC_HUB_MISC_SIP_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1524

WREG32(mmMC_HUB_MISC_VM_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1528

WREG32(mmMC_XPB_CLK_GAT, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1532

WREG32(mmATC_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1536

WREG32(mmMC_CITF_MISC_WR_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1540

WREG32(mmMC_CITF_MISC_RD_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1544

WREG32(mmMC_CITF_MISC_VM_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1548

WREG32(mmVM_L2_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1552

WREG32(mmMC_HUB_MISC_HUB_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1556

WREG32(mmMC_HUB_MISC_SIP_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1560

WREG32(mmMC_HUB_MISC_VM_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1564

WREG32(mmMC_XPB_CLK_GAT, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1568

WREG32(mmATC_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1572

WREG32(mmMC_CITF_MISC_WR_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1576

WREG32(mmMC_CITF_MISC_RD_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1580

WREG32(mmMC_CITF_MISC_VM_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1584

WREG32(mmVM_L2_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1596

WREG32(mmMC_HUB_MISC_HUB_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1600

WREG32(mmMC_HUB_MISC_SIP_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1604

WREG32(mmMC_HUB_MISC_VM_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1608

WREG32(mmMC_XPB_CLK_GAT, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1612

WREG32(mmATC_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1616

WREG32(mmMC_CITF_MISC_WR_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1620

WREG32(mmMC_CITF_MISC_RD_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1624

WREG32(mmMC_CITF_MISC_VM_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1628

WREG32(mmVM_L2_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1632

WREG32(mmMC_HUB_MISC_HUB_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1636

WREG32(mmMC_HUB_MISC_SIP_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1640

WREG32(mmMC_HUB_MISC_VM_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1644

WREG32(mmMC_XPB_CLK_GAT, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1648

WREG32(mmATC_MISC_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1652

WREG32(mmMC_CITF_MISC_WR_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1656

WREG32(mmMC_CITF_MISC_RD_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1660

WREG32(mmMC_CITF_MISC_VM_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

1664

WREG32(mmVM_L2_CG, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

184

WREG32(mmBIF_FB_EN, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

188

WREG32(mmMC_SHARED_BLACKOUT_CNTL, blackout);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

201

WREG32(mmMC_SHARED_BLACKOUT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

205

WREG32(mmBIF_FB_EN, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

245

WREG32(mmMC_SEQ_IO_DEBUG_INDEX, ixMC_IO_DEBUG_UP_159);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

313

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

314

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000010);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

318

WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(io_mc_regs++));

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

319

WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(io_mc_regs++));

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

323

WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

326

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

327

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000004);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

328

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000001);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

380

WREG32(mmMC_SEQ_MISC0, data);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

384

WREG32(mmMC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(io_mc_regs++));

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

385

WREG32(mmMC_SEQ_IO_DEBUG_DATA, le32_to_cpup(io_mc_regs++));

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

388

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

389

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000010);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

393

WREG32(mmMC_SEQ_SUP_PGM, le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

396

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

397

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000004);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

398

WREG32(mmMC_SEQ_SUP_CNTL, 0x00000001);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

441

WREG32((0xb05 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

442

WREG32((0xb06 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

443

WREG32((0xb07 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

444

WREG32((0xb08 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

445

WREG32((0xb09 + j), 0x00000000);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

447

WREG32(mmHDP_REG_COHERENCY_FLUSH_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

460

WREG32(mmVGA_HDP_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

465

WREG32(mmVGA_RENDER_CONTROL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

468

WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

470

WREG32(mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

472

WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

478

WREG32(mmMC_VM_FB_LOCATION, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

480

WREG32(mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

481

WREG32(mmHDP_NONSURFACE_INFO, (2 << 7) | (1 << 30));

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

482

WREG32(mmHDP_NONSURFACE_SIZE, 0x3FFFFFFF);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

485

WREG32(mmMC_VM_AGP_BASE, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

486

WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

487

WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

491

WREG32(mmBIF_FB_EN, BIF_FB_EN__FB_READ_EN_MASK | BIF_FB_EN__FB_WRITE_EN_MASK);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

495

WREG32(mmHDP_MISC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

498

WREG32(mmHDP_HOST_PATH_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

640

WREG32(mmVM_INVALIDATE_REQUEST, mask);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

665

WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

757

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

790

WREG32(mmVM_PRT_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

798

WREG32(mmVM_PRT_APERTURE0_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

799

WREG32(mmVM_PRT_APERTURE1_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

800

WREG32(mmVM_PRT_APERTURE2_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

801

WREG32(mmVM_PRT_APERTURE3_LOW_ADDR, low);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

802

WREG32(mmVM_PRT_APERTURE0_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

803

WREG32(mmVM_PRT_APERTURE1_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

804

WREG32(mmVM_PRT_APERTURE2_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

805

WREG32(mmVM_PRT_APERTURE3_HIGH_ADDR, high);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

807

WREG32(mmVM_PRT_APERTURE0_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

808

WREG32(mmVM_PRT_APERTURE1_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

809

WREG32(mmVM_PRT_APERTURE2_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

810

WREG32(mmVM_PRT_APERTURE3_LOW_ADDR, 0xfffffff);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

811

WREG32(mmVM_PRT_APERTURE0_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

812

WREG32(mmVM_PRT_APERTURE1_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

813

WREG32(mmVM_PRT_APERTURE2_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

814

WREG32(mmVM_PRT_APERTURE3_HIGH_ADDR, 0x0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

849

WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

859

WREG32(mmVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

863

WREG32(mmVM_L2_CNTL2, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

870

WREG32(mmVM_L2_CNTL3, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

885

WREG32(mmVM_L2_CNTL4, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

887

WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

888

WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

889

WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, table_addr >> 12);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

890

WREG32(mmVM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

892

WREG32(mmVM_CONTEXT0_CNTL2, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

897

WREG32(mmVM_CONTEXT0_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

899

WREG32(mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

900

WREG32(mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

901

WREG32(mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

908

WREG32(mmVM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

909

WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

912

WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR + i,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

915

WREG32(mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + i - 8,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

920

WREG32(mmVM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

922

WREG32(mmVM_CONTEXT1_CNTL2, 4);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

935

WREG32(mmVM_CONTEXT1_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

977

WREG32(mmVM_CONTEXT0_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

978

WREG32(mmVM_CONTEXT1_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

984

WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

988

WREG32(mmVM_L2_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

989

WREG32(mmVM_L2_CNTL2, 0);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

433

WREG32(reg, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

439

WREG32(reg, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

447

WREG32(reg, tmp);

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

453

WREG32(reg, tmp);

drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c

100

WREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_LS), data);

drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c

116

WREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_CTRL), data);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

116

WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

124

WREG32(mmINTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

127

WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

138

WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

139

WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

141

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

144

WREG32(mmIH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

145

WREG32(mmIH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

153

WREG32(mmIH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

222

WREG32(mmIH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

228

WREG32(mmIH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

279

WREG32(mmIH_RB_RPTR, ih->rptr);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

389

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

395

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

67

WREG32(mmIH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

68

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

86

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

87

WREG32(mmIH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

89

WREG32(mmIH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/iceland_ih.c

90

WREG32(mmIH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

174

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

181

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

182

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

274

WREG32(ih_regs->ih_rb_base, ih->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

275

WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

292

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

297

WREG32(ih_regs->ih_rb_wptr_addr_lo, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

298

WREG32(ih_regs->ih_rb_wptr_addr_hi, upper_32_bits(ih->wptr_addr) & 0xFFFF);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

302

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

303

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

305

WREG32(ih_regs->ih_doorbell_rptr, ih_v6_0_doorbell_rptr(ih));

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c

526

WREG32(ih_regs->ih_rb_rptr, ih->rptr);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

146

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

153

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

154

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

246

WREG32(ih_regs->ih_rb_base, ih->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

247

WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

264

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

269

WREG32(ih_regs->ih_rb_wptr_addr_lo, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

270

WREG32(ih_regs->ih_rb_wptr_addr_hi, upper_32_bits(ih->wptr_addr) & 0xFFFF);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

274

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

275

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

277

WREG32(ih_regs->ih_doorbell_rptr, ih_v6_1_doorbell_rptr(ih));

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c

495

WREG32(ih_regs->ih_rb_rptr, ih->rptr);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

146

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

153

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

154

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

246

WREG32(ih_regs->ih_rb_base, ih->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

247

WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

264

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

269

WREG32(ih_regs->ih_rb_wptr_addr_lo, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

270

WREG32(ih_regs->ih_rb_wptr_addr_hi, upper_32_bits(ih->wptr_addr) & 0xFFFF);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

274

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

275

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

277

WREG32(ih_regs->ih_doorbell_rptr, ih_v7_0_doorbell_rptr(ih));

drivers/gpu/drm/amd/amdgpu/ih_v7_0.c

517

WREG32(ih_regs->ih_rb_rptr, ih->rptr);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

236

WREG32(SOC15_REG_OFFSET(JPEG, 0, mmUVD_PGFSM_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

250

WREG32(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_POWER_STATUS), data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

264

WREG32(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JPEG_POWER_STATUS), data);

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c

267

WREG32(SOC15_REG_OFFSET(JPEG, 0, mmUVD_PGFSM_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

294

WREG32(SOC15_REG_OFFSET(JPEG, 0, mmUVD_PGFSM_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c

329

WREG32(SOC15_REG_OFFSET(JPEG, 0, mmUVD_PGFSM_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

331

WREG32(SOC15_REG_OFFSET(JPEG, 0, regUVD_PGFSM_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c

366

WREG32(SOC15_REG_OFFSET(JPEG, 0, regUVD_PGFSM_CONFIG), data);

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

377

WREG32(SOC15_REG_OFFSET(JPEG, inst, regUVD_IPX_DLDO_CONFIG),

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

402

WREG32(SOC15_REG_OFFSET(JPEG, inst, regUVD_IPX_DLDO_CONFIG),

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c

433

WREG32(SOC15_REG_OFFSET(JPEG, inst_idx, regUVD_IPX_DLDO_CONFIG),

drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c

293

WREG32(SOC15_REG_OFFSET(JPEG, 0, regUVD_IPX_DLDO_CONFIG),

drivers/gpu/drm/amd/amdgpu/jpeg_v5_3_0.c

276

WREG32(SOC15_REG_OFFSET(JPEG, 0, regUVD_IPX_DLDO_CONFIG_ONO1),

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

470

WREG32(reg, value);

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

493

WREG32(reg, value);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

1298

WREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v1_7_edc_cnt_regs[i]), 0);

drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c

1344

WREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v1_7_ea_err_status_regs[i]),

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

172

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

179

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

180

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

272

WREG32(ih_regs->ih_rb_base, ih->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

273

WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

288

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

293

WREG32(ih_regs->ih_rb_wptr_addr_lo, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

294

WREG32(ih_regs->ih_rb_wptr_addr_hi, upper_32_bits(ih->wptr_addr) & 0xFFFF);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

298

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

299

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

301

WREG32(ih_regs->ih_doorbell_rptr, navi10_ih_doorbell_rptr(ih));

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

505

WREG32(ih_regs->ih_rb_rptr, ih->rptr);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

131

WREG32(reg, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c

152

WREG32(reg, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c

102

WREG32(reg, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

101

WREG32(reg, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c

81

WREG32(reg, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

176

WREG32(reg, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

205

WREG32(reg, doorbell_range);

drivers/gpu/drm/amd/amdgpu/nv.c

287

WREG32(address, (reg));

drivers/gpu/drm/amd/amdgpu/nv.c

301

WREG32(address, (reg));

drivers/gpu/drm/amd/amdgpu/nv.c

302

WREG32(data, (v));

drivers/gpu/drm/amd/amdgpu/psp_v11_0.c

421

WREG32(offset, GFX_CTRL_CMD_ID_MODE1_RST);

drivers/gpu/drm/amd/amdgpu/psp_v12_0.c

233

WREG32(offset, GFX_CTRL_CMD_ID_MODE1_RST);

drivers/gpu/drm/amd/amdgpu/psp_v3_1.c

323

WREG32(offset, GFX_CTRL_CMD_ID_MODE1_RST);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

1002

WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

1013

WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

1018

WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

221

WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[ring->me], ring->wptr << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

346

WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

349

WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

389

WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

415

WREG32(mmSDMA0_GFX_VIRTUAL_ADDR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

416

WREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

421

WREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

424

WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

435

WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

438

WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

439

WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

440

WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

441

WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

444

WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

446

WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_LO + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

451

WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

452

WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

455

WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], ring->wptr << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

459

WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

467

WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

953

WREG32(mmSDMA0_F32_CNTL + SDMA0_REGISTER_OFFSET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

960

WREG32(mmSDMA0_F32_CNTL + SDMA1_REGISTER_OFFSET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

968

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

974

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c

997

WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1306

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1312

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1335

WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1340

WREG32(mmSDMA0_CNTL + SDMA0_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1351

WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1356

WREG32(mmSDMA0_CNTL + SDMA1_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1442

WREG32(mmSDMA0_CLK_CTRL + sdma_offsets[i], data);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1457

WREG32(mmSDMA0_CLK_CTRL + sdma_offsets[i], data);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1475

WREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i], data);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

1483

WREG32(mmSDMA0_POWER_CNTL + sdma_offsets[i], data);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

396

WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[ring->me], ring->wptr << 2);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

522

WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

525

WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

586

WREG32(mmSDMA0_PHASE0_QUANTUM + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

588

WREG32(mmSDMA0_PHASE1_QUANTUM + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

598

WREG32(mmSDMA0_CNTL + sdma_offsets[i], f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

626

WREG32(mmSDMA0_F32_CNTL + sdma_offsets[i], f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

655

WREG32(mmSDMA0_GFX_VIRTUAL_ADDR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

656

WREG32(mmSDMA0_GFX_APE1_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

661

WREG32(mmSDMA0_TILING_CONFIG + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

664

WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

675

WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

679

WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

681

WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

682

WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

685

WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

687

WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_LO + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

692

WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

693

WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

704

WREG32(mmSDMA0_GFX_DOORBELL + sdma_offsets[i], doorbell);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

709

WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_LO + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

711

WREG32(mmSDMA0_GFX_RB_WPTR_POLL_ADDR_HI + sdma_offsets[i],

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

716

WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

725

WREG32(mmSDMA0_GFX_RB_WPTR_POLL_CNTL + sdma_offsets[i], wptr_poll_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

729

WREG32(mmSDMA0_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

737

WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

126

WREG32(sdma_v4_0_get_reg_offset(adev, (instance), (offset)), value)

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1262

WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1268

WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1280

WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1286

WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CNTL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c

1296

WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c

245

WREG32(reg_offset, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c

247

WREG32(reg_offset, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

101

WREG32(sdma_v4_4_2_get_reg_offset(adev, (instance), (offset)), value)

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1576

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_FREEZE), freeze);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1597

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1601

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1618

WREG32(sdma_v5_0_get_reg_offset(adev, inst_id, mmSDMA0_FREEZE), freeze);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1650

WREG32(sdma_gfx_preempt, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1666

WREG32(sdma_gfx_preempt, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1688

WREG32(reg_offset, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1768

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1781

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1798

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

1805

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

643

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

674

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

702

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL), 0);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

761

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR),

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

763

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI),

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

798

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), temp);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

804

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_CNTL), temp);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

811

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UTCL1_PAGE), temp);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

818

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), temp);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

905

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UCODE_ADDR), 0);

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

910

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

913

WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UCODE_ADDR), adev->sdma.instance[i].fw_version);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1484

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_FREEZE), freeze);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1506

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1510

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CNTL), cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1528

WREG32(sdma_v5_2_get_reg_offset(adev, inst_id, mmSDMA0_FREEZE), freeze);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1559

WREG32(sdma_gfx_preempt, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1575

WREG32(sdma_gfx_preempt, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1594

WREG32(reg_offset, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1732

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1743

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CLK_CTRL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1765

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

1772

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_POWER_CNTL), data);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

235

WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR),

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

237

WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI),

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

248

WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR),

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

250

WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI),

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

491

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CNTL), f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

521

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

609

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

610

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

645

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_CNTL), temp);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

665

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_F32_CNTL), temp);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

752

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UCODE_ADDR), 0);

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

757

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

760

WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_UCODE_ADDR), adev->sdma.instance[i].fw_version);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

1556

WREG32(sdma_gfx_preempt, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

1572

WREG32(sdma_gfx_preempt, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

1617

WREG32(reg_offset, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

440

WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_CNTL), f32_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

694

WREG32(sdma_v6_0_get_reg_offset(adev, 0, regSDMA0_BROADCAST_UCODE_ADDR), 0);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

699

WREG32(sdma_v6_0_get_reg_offset(adev, 0, regSDMA0_BROADCAST_UCODE_DATA), le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

709

WREG32(sdma_v6_0_get_reg_offset(adev, 0, regSDMA0_BROADCAST_UCODE_ADDR), 0x8000);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

714

WREG32(sdma_v6_0_get_reg_offset(adev, 0, regSDMA0_BROADCAST_UCODE_DATA), le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

728

WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_ADDR), 0);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

733

WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

736

WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_ADDR), adev->sdma.instance[0].fw_version);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

745

WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_ADDR), 0x8000);

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

750

WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_DATA), le32_to_cpup(fw_data++));

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

753

WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_ADDR), adev->sdma.instance[0].fw_version);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

1515

WREG32(sdma_gfx_preempt, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

1531

WREG32(sdma_gfx_preempt, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c

1550

WREG32(reg_offset, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1452

WREG32(sdma_gfx_preempt, 1);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1468

WREG32(sdma_gfx_preempt, 0);

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c

1487

WREG32(reg_offset, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/si.c

1031

WREG32(AMDGPU_PCIE_INDEX, reg);

drivers/gpu/drm/amd/amdgpu/si.c

1043

WREG32(AMDGPU_PCIE_INDEX, reg);

drivers/gpu/drm/amd/amdgpu/si.c

1045

WREG32(AMDGPU_PCIE_DATA, v);

drivers/gpu/drm/amd/amdgpu/si.c

1056

WREG32(PCIE_PORT_INDEX, ((reg) & 0xff));

drivers/gpu/drm/amd/amdgpu/si.c

1068

WREG32(PCIE_PORT_INDEX, ((reg) & 0xff));

drivers/gpu/drm/amd/amdgpu/si.c

1070

WREG32(PCIE_PORT_DATA, (v));

drivers/gpu/drm/amd/amdgpu/si.c

1081

WREG32(mmSMC_IND_INDEX_0, (reg));

drivers/gpu/drm/amd/amdgpu/si.c

1092

WREG32(mmSMC_IND_INDEX_0, (reg));

drivers/gpu/drm/amd/amdgpu/si.c

1093

WREG32(mmSMC_IND_DATA_0, (v));

drivers/gpu/drm/amd/amdgpu/si.c

1103

WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));

drivers/gpu/drm/amd/amdgpu/si.c

1114

WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));

drivers/gpu/drm/amd/amdgpu/si.c

1115

WREG32(mmUVD_CTX_DATA, (v));

drivers/gpu/drm/amd/amdgpu/si.c

1283

WREG32(mmBUS_CNTL, (bus_cntl & ~BUS_CNTL__BIOS_ROM_DIS_MASK));

drivers/gpu/drm/amd/amdgpu/si.c

1286

WREG32(mmD1VGA_CONTROL,

drivers/gpu/drm/amd/amdgpu/si.c

1289

WREG32(mmD2VGA_CONTROL,

drivers/gpu/drm/amd/amdgpu/si.c

1292

WREG32(mmVGA_RENDER_CONTROL,

drivers/gpu/drm/amd/amdgpu/si.c

1295

WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE);

drivers/gpu/drm/amd/amdgpu/si.c

1300

WREG32(mmBUS_CNTL, bus_cntl);

drivers/gpu/drm/amd/amdgpu/si.c

1302

WREG32(mmD1VGA_CONTROL, d1vga_control);

drivers/gpu/drm/amd/amdgpu/si.c

1303

WREG32(mmD2VGA_CONTROL, d2vga_control);

drivers/gpu/drm/amd/amdgpu/si.c

1304

WREG32(mmVGA_RENDER_CONTROL, vga_render_control);

drivers/gpu/drm/amd/amdgpu/si.c

1306

WREG32(R600_ROM_CNTL, rom_cntl);

drivers/gpu/drm/amd/amdgpu/si.c

1330

WREG32(mmROM_INDEX, 0);

drivers/gpu/drm/amd/amdgpu/si.c

1343

WREG32(mmCG_SPLL_FUNC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/si.c

1347

WREG32(mmCG_SPLL_FUNC_CNTL_2, tmp);

drivers/gpu/drm/amd/amdgpu/si.c

1358

WREG32(mmCG_SPLL_FUNC_CNTL_2, tmp);

drivers/gpu/drm/amd/amdgpu/si.c

1362

WREG32(MPLL_CNTL_MODE, tmp);

drivers/gpu/drm/amd/amdgpu/si.c

1371

WREG32(mmSPLL_CNTL_MODE, tmp);

drivers/gpu/drm/amd/amdgpu/si.c

1375

WREG32(mmCG_SPLL_FUNC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/si.c

1379

WREG32(mmCG_SPLL_FUNC_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/si.c

1383

WREG32(mmSPLL_CNTL_MODE, tmp);

drivers/gpu/drm/amd/amdgpu/si.c

1472

WREG32(mmCONFIG_CNTL, temp);

drivers/gpu/drm/amd/amdgpu/si.c

1494

WREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);

drivers/gpu/drm/amd/amdgpu/si.c

1505

WREG32(mmHDP_DEBUG0, 1);

drivers/gpu/drm/amd/amdgpu/si.c

2386

WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff));

drivers/gpu/drm/amd/amdgpu/si.c

2397

WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff));

drivers/gpu/drm/amd/amdgpu/si.c

2398

WREG32(EVERGREEN_PIF_PHY0_DATA, (v));

drivers/gpu/drm/amd/amdgpu/si.c

2408

WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff));

drivers/gpu/drm/amd/amdgpu/si.c

2419

WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff));

drivers/gpu/drm/amd/amdgpu/si.c

2420

WREG32(EVERGREEN_PIF_PHY1_DATA, (v));

drivers/gpu/drm/amd/amdgpu/si.c

2571

WREG32(mmTHM_CLK_CNTL, data);

drivers/gpu/drm/amd/amdgpu/si.c

2577

WREG32(mmMISC_CLK_CNTL, data);

drivers/gpu/drm/amd/amdgpu/si.c

2582

WREG32(mmCG_CLKPIN_CNTL, data);

drivers/gpu/drm/amd/amdgpu/si.c

2587

WREG32(mmCG_CLKPIN_CNTL_2, data);

drivers/gpu/drm/amd/amdgpu/si.c

2593

WREG32(mmMPLL_BYPASSCLK_SEL, data);

drivers/gpu/drm/amd/amdgpu/si.c

2598

WREG32(mmSPLL_CNTL_MODE, data);

drivers/gpu/drm/amd/amdgpu/si_dma.c

138

WREG32(mmDMA_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/si_dma.c

152

WREG32(mmDMA_SEM_INCOMPLETE_TIMER_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/si_dma.c

153

WREG32(mmDMA_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/si_dma.c

161

WREG32(mmDMA_GFX_RB_CNTL + sdma_offsets[i], rb_cntl);

drivers/gpu/drm/amd/amdgpu/si_dma.c

164

WREG32(mmDMA_GFX_RB_RPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/si_dma.c

165

WREG32(mmDMA_GFX_RB_WPTR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/si_dma.c

169

WREG32(mmDMA_GFX_RB_RPTR_ADDR_LO + sdma_offsets[i], lower_32_bits(rptr_addr));

drivers/gpu/drm/amd/amdgpu/si_dma.c

170

WREG32(mmDMA_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i], upper_32_bits(rptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/si_dma.c

174

WREG32(mmDMA_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/si_dma.c

181

WREG32(mmDMA_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);

drivers/gpu/drm/amd/amdgpu/si_dma.c

185

WREG32(mmDMA_CNTL + sdma_offsets[i], dma_cntl);

drivers/gpu/drm/amd/amdgpu/si_dma.c

188

WREG32(mmDMA_GFX_RB_WPTR + sdma_offsets[i], ring->wptr << 2);

drivers/gpu/drm/amd/amdgpu/si_dma.c

189

WREG32(mmDMA_GFX_RB_CNTL + sdma_offsets[i], rb_cntl | DMA_GFX_RB_CNTL__RB_ENABLE_MASK);

drivers/gpu/drm/amd/amdgpu/si_dma.c

604

WREG32(mmDMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/si_dma.c

609

WREG32(mmDMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/si_dma.c

620

WREG32(mmDMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/si_dma.c

625

WREG32(mmDMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);

drivers/gpu/drm/amd/amdgpu/si_dma.c

667

WREG32(mmDMA_POWER_CNTL + offset, data);

drivers/gpu/drm/amd/amdgpu/si_dma.c

668

WREG32(mmDMA_CLK_CTRL + offset, 0x00000100);

drivers/gpu/drm/amd/amdgpu/si_dma.c

679

WREG32(mmDMA_POWER_CNTL + offset, data);

drivers/gpu/drm/amd/amdgpu/si_dma.c

684

WREG32(mmDMA_CLK_CTRL + offset, data);

drivers/gpu/drm/amd/amdgpu/si_dma.c

698

WREG32(mmDMA_PGFSM_WRITE, 0x00002000);

drivers/gpu/drm/amd/amdgpu/si_dma.c

699

WREG32(mmDMA_PGFSM_CONFIG, 0x100010ff);

drivers/gpu/drm/amd/amdgpu/si_dma.c

702

WREG32(mmDMA_PGFSM_WRITE, 0);

drivers/gpu/drm/amd/amdgpu/si_dma.c

75

WREG32(mmDMA_GFX_RB_WPTR + sdma_offsets[me], (ring->wptr << 2) & 0x3fffc);

drivers/gpu/drm/amd/amdgpu/si_ih.c

128

WREG32(IH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/si_ih.c

134

WREG32(IH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/si_ih.c

165

WREG32(IH_RB_RPTR, ih->rptr);

drivers/gpu/drm/amd/amdgpu/si_ih.c

264

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/si_ih.c

270

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/si_ih.c

43

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/si_ih.c

44

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/si_ih.c

55

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/si_ih.c

56

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/si_ih.c

57

WREG32(IH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/si_ih.c

58

WREG32(IH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/si_ih.c

71

WREG32(INTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/si_ih.c

75

WREG32(INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/si_ih.c

77

WREG32(IH_RB_BASE, adev->irq.ih.gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/si_ih.c

85

WREG32(IH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/si_ih.c

86

WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/si_ih.c

87

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/si_ih.c

88

WREG32(IH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/si_ih.c

89

WREG32(IH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/si_ih.c

94

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/amd/amdgpu/soc15.c

1394

WREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_MISC_CGTT_CTRL0), data);

drivers/gpu/drm/amd/amdgpu/soc15.c

1409

WREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_MISC_LIGHT_SLEEP_CTRL), data);

drivers/gpu/drm/amd/amdgpu/soc15.c

249

WREG32(address, ((reg) & 0x1ff));

drivers/gpu/drm/amd/amdgpu/soc15.c

263

WREG32(address, ((reg) & 0x1ff));

drivers/gpu/drm/amd/amdgpu/soc15.c

264

WREG32(data, (v));

drivers/gpu/drm/amd/amdgpu/soc15.c

277

WREG32(address, (reg));

drivers/gpu/drm/amd/amdgpu/soc15.c

291

WREG32(address, (reg));

drivers/gpu/drm/amd/amdgpu/soc15.c

292

WREG32(data, (v));

drivers/gpu/drm/amd/amdgpu/soc15.c

500

WREG32_SOC15_IP(GC, reg, tmp) : WREG32(reg, tmp);

drivers/gpu/drm/amd/amdgpu/soc15_common.h

121

WREG32(r0, value); \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

122

WREG32(r1, (reg | 0x80000000)); \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

123

WREG32(spare_int, 0x1); \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

133

WREG32(reg, value); \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

160

WREG32(r2, value); \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

162

WREG32(r3, value); \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

163

WREG32(target_reg, value); \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

165

WREG32(target_reg, value); \

drivers/gpu/drm/amd/amdgpu/soc15_common.h

43

WREG32(reg, value))

drivers/gpu/drm/amd/amdgpu/soc21.c

233

WREG32(address, (reg));

drivers/gpu/drm/amd/amdgpu/soc21.c

247

WREG32(address, (reg));

drivers/gpu/drm/amd/amdgpu/soc21.c

248

WREG32(data, (v));

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

112

WREG32(mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

120

WREG32(mmINTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

123

WREG32(mmIH_RB_BASE, ih->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

135

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

138

WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

139

WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

142

WREG32(mmIH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

143

WREG32(mmIH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

155

WREG32(mmIH_DOORBELL_RPTR, ih_doorbell_rtpr);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

226

WREG32(mmIH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

232

WREG32(mmIH_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

288

WREG32(mmIH_RB_RPTR, ih->rptr);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

445

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

451

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

66

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

83

WREG32(mmIH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

85

WREG32(mmIH_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/tonga_ih.c

86

WREG32(mmIH_RB_WPTR, 0);

drivers/gpu/drm/amd/amdgpu/umc_v6_0.c

32

WREG32((i*0x100000 + 0x5010c + j*0x2000)/4, 0x1002);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

146

WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

229

WREG32(mmUVD_CGC_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

248

WREG32(mmUVD_VCPU_CACHE_OFFSET0, addr);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

249

WREG32(mmUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

253

WREG32(mmUVD_VCPU_CACHE_OFFSET1, addr);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

254

WREG32(mmUVD_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

259

WREG32(mmUVD_VCPU_CACHE_OFFSET2, addr);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

260

WREG32(mmUVD_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

264

WREG32(mmUVD_LMI_ADDR_EXT, (addr << 12) | (addr << 0));

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

268

WREG32(mmUVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

270

WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

271

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

272

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

287

WREG32(mmUVD_FW_START, keysel);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

334

WREG32(mmUVD_CGC_GATE, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

341

WREG32(mmUVD_VCPU_CNTL, 1 << 9);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

351

WREG32(mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

352

WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

355

WREG32(mmUVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) |

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

359

WREG32(mmUVD_MPC_CNTL, tmp | 0x10);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

361

WREG32(mmUVD_MPC_SET_MUXA0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

362

WREG32(mmUVD_MPC_SET_MUXA1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

363

WREG32(mmUVD_MPC_SET_MUXB0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

364

WREG32(mmUVD_MPC_SET_MUXB1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

365

WREG32(mmUVD_MPC_SET_ALU, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

366

WREG32(mmUVD_MPC_SET_MUX, 0x88);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

414

WREG32(mmUVD_RBC_RB_CNTL, 0x11010101);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

417

WREG32(mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

420

WREG32(mmUVD_LMI_EXT40_ADDR, upper_32_bits(ring->gpu_addr) |

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

424

WREG32(mmUVD_RBC_RB_RPTR, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

427

WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

430

WREG32(mmUVD_RBC_RB_BASE, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

452

WREG32(mmUVD_RBC_RB_CNTL, 0x11010101);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

495

WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__LMI_SOFT_RESET_MASK |

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

499

WREG32(mmUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

608

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

617

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c

76

WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

296

WREG32(mmUVD_CGC_GATE, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

303

WREG32(mmUVD_VCPU_CNTL, 1 << 9);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

313

WREG32(mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

314

WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

317

WREG32(mmUVD_LMI_CTRL, 0x203108);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

320

WREG32(mmUVD_MPC_CNTL, tmp | 0x10);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

322

WREG32(mmUVD_MPC_SET_MUXA0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

323

WREG32(mmUVD_MPC_SET_MUXA1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

324

WREG32(mmUVD_MPC_SET_MUXB0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

325

WREG32(mmUVD_MPC_SET_MUXB1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

326

WREG32(mmUVD_MPC_SET_ALU, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

327

WREG32(mmUVD_MPC_SET_MUX, 0x88);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

377

WREG32(mmUVD_RBC_RB_CNTL, 0x11010101);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

380

WREG32(mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

383

WREG32(mmUVD_LMI_EXT40_ADDR, upper_32_bits(ring->gpu_addr) |

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

387

WREG32(mmUVD_RBC_RB_RPTR, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

390

WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

393

WREG32(mmUVD_RBC_RB_BASE, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

415

WREG32(mmUVD_RBC_RB_CNTL, 0x11010101);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

458

WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__LMI_SOFT_RESET_MASK |

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

462

WREG32(mmUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

513

WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

582

WREG32(mmUVD_VCPU_CACHE_OFFSET0, addr);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

583

WREG32(mmUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

587

WREG32(mmUVD_VCPU_CACHE_OFFSET1, addr);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

588

WREG32(mmUVD_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

593

WREG32(mmUVD_VCPU_CACHE_OFFSET2, addr);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

594

WREG32(mmUVD_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

598

WREG32(mmUVD_LMI_ADDR_EXT, (addr << 12) | (addr << 0));

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

602

WREG32(mmUVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

604

WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

605

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

606

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

622

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

631

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

658

WREG32(mmUVD_CGC_CTRL, tmp);

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

735

WREG32(mmUVD_PGFSM_CONFIG, (UVD_PGFSM_CONFIG__UVD_PGFSM_FSM_ADDR_MASK |

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

746

WREG32(mmUVD_PGFSM_CONFIG, (UVD_PGFSM_CONFIG__UVD_PGFSM_FSM_ADDR_MASK |

drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c

90

WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

286

WREG32(mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

288

WREG32(mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

293

WREG32(mmUVD_VCPU_CACHE_OFFSET0, offset >> 3);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

294

WREG32(mmUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

298

WREG32(mmUVD_VCPU_CACHE_OFFSET1, offset >> 3);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

299

WREG32(mmUVD_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

304

WREG32(mmUVD_VCPU_CACHE_OFFSET2, offset >> 3);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

305

WREG32(mmUVD_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

307

WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

308

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

309

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

344

WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__LMI_SOFT_RESET_MASK |

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

356

WREG32(mmUVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) |

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

364

WREG32(mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

365

WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

367

WREG32(mmUVD_MPC_SET_MUXA0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

368

WREG32(mmUVD_MPC_SET_MUXA1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

369

WREG32(mmUVD_MPC_SET_MUXB0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

370

WREG32(mmUVD_MPC_SET_MUXB1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

371

WREG32(mmUVD_MPC_SET_ALU, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

372

WREG32(mmUVD_MPC_SET_MUX, 0x88);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

375

WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

379

WREG32(mmUVD_VCPU_CNTL, 1 << 9);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

385

WREG32(mmUVD_SOFT_RESET, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

428

WREG32(mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

431

WREG32(mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

434

WREG32(mmUVD_RBC_RB_RPTR_ADDR, (upper_32_bits(ring->gpu_addr) >> 2));

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

437

WREG32(mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

439

WREG32(mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

443

WREG32(mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

446

WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

463

WREG32(mmUVD_RBC_RB_CNTL, 0x11010101);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

470

WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

474

WREG32(mmUVD_VCPU_CNTL, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

479

WREG32(mmUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

528

WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

675

WREG32(mmUVD_SUVD_CGC_GATE, data1);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

676

WREG32(mmUVD_CGC_GATE, data3);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

722

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

723

WREG32(mmUVD_SUVD_CGC_CTRL, data2);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

762

WREG32(mmUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

763

WREG32(mmUVD_SUVD_CGC_GATE, data1);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

780

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

789

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c

88

WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1214

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1220

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1334

WREG32(mmUVD_SUVD_CGC_GATE, data1);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1335

WREG32(mmUVD_CGC_GATE, data3);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1382

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1383

WREG32(mmUVD_SUVD_CGC_CTRL, data2);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

142

WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1424

WREG32(mmUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1425

WREG32(mmUVD_SUVD_CGC_GATE, data1);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1442

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1451

WREG32(mmUVD_CGC_CTRL, data);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

1489

WREG32(mmUVD_POWER_STATUS, UVD_POWER_STATUS__UVD_PG_EN_MASK);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

157

WREG32(mmUVD_RB_WPTR,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

160

WREG32(mmUVD_RB_WPTR2,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

612

WREG32(mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

614

WREG32(mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

619

WREG32(mmUVD_VCPU_CACHE_OFFSET0, offset >> 3);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

620

WREG32(mmUVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

624

WREG32(mmUVD_VCPU_CACHE_OFFSET1, offset >> 3);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

625

WREG32(mmUVD_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

630

WREG32(mmUVD_VCPU_CACHE_OFFSET2, offset >> 3);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

631

WREG32(mmUVD_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

633

WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

634

WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

635

WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

637

WREG32(mmUVD_GP_SCRATCH4, adev->uvd.max_handles);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

714

WREG32(mmUVD_CGC_GATE, data);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

715

WREG32(mmUVD_SUVD_CGC_GATE, data1);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

751

WREG32(mmUVD_SOFT_RESET,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

767

WREG32(mmUVD_LMI_CTRL,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

780

WREG32(mmUVD_LMI_SWAP_CNTL, lmi_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

781

WREG32(mmUVD_MP_SWAP_CNTL, mp_swap_cntl);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

783

WREG32(mmUVD_MPC_SET_MUXA0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

784

WREG32(mmUVD_MPC_SET_MUXA1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

785

WREG32(mmUVD_MPC_SET_MUXB0, 0x40c2040);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

786

WREG32(mmUVD_MPC_SET_MUXB1, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

787

WREG32(mmUVD_MPC_SET_ALU, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

788

WREG32(mmUVD_MPC_SET_MUX, 0x88);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

791

WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

795

WREG32(mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

801

WREG32(mmUVD_SOFT_RESET, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

845

WREG32(mmUVD_RBC_RB_CNTL, tmp);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

848

WREG32(mmUVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

851

WREG32(mmUVD_RBC_RB_RPTR_ADDR, (upper_32_bits(ring->gpu_addr) >> 2));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

854

WREG32(mmUVD_LMI_RBC_RB_64BIT_BAR_LOW,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

856

WREG32(mmUVD_LMI_RBC_RB_64BIT_BAR_HIGH,

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

860

WREG32(mmUVD_RBC_RB_RPTR, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

863

WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

869

WREG32(mmUVD_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

870

WREG32(mmUVD_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

871

WREG32(mmUVD_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

872

WREG32(mmUVD_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

873

WREG32(mmUVD_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

876

WREG32(mmUVD_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

877

WREG32(mmUVD_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

878

WREG32(mmUVD_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

879

WREG32(mmUVD_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

880

WREG32(mmUVD_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

896

WREG32(mmUVD_RBC_RB_CNTL, 0x11010101);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

903

WREG32(mmUVD_SOFT_RESET, UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

907

WREG32(mmUVD_VCPU_CNTL, 0x0);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

912

WREG32(mmUVD_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c

993

WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

116

WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

118

WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

168

WREG32(mmVCE_CLOCK_GATING_A, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

173

WREG32(mmVCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

177

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

181

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

254

WREG32(mmVCE_LMI_FW_START_KEYSEL, adev->vce.keyselect);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

306

WREG32(mmVCE_CLOCK_GATING_B, 0);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

310

WREG32(mmVCE_LMI_CTRL, 0x00398000);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

313

WREG32(mmVCE_LMI_SWAP_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

314

WREG32(mmVCE_LMI_SWAP_CNTL1, 0);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

315

WREG32(mmVCE_LMI_VM_CTRL, 0);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

317

WREG32(mmVCE_VCPU_SCRATCH7, AMDGPU_MAX_VCE_HANDLES);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

321

WREG32(mmVCE_VCPU_CACHE_OFFSET0, offset & 0x7fffffff);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

322

WREG32(mmVCE_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

326

WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0x7fffffff);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

327

WREG32(mmVCE_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

331

WREG32(mmVCE_VCPU_CACHE_OFFSET2, offset & 0x7fffffff);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

332

WREG32(mmVCE_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

391

WREG32(mmVCE_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

392

WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

393

WREG32(mmVCE_RB_BASE_LO, lower_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

394

WREG32(mmVCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

395

WREG32(mmVCE_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

398

WREG32(mmVCE_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

399

WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

400

WREG32(mmVCE_RB_BASE_LO2, lower_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

401

WREG32(mmVCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

402

WREG32(mmVCE_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

422

WREG32(mmVCE_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

467

WREG32(mmVCE_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

479

WREG32(mmVCE_CLOCK_GATING_A, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

484

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

488

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

492

WREG32(mmVCE_CLOCK_GATING_A, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

497

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v1_0.c

501

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

144

WREG32(mmVCE_CGTT_CLK_OVERRIDE, 7);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

155

WREG32(mmVCE_CLOCK_GATING_A, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

160

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

165

WREG32(mmVCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

175

WREG32(mmVCE_CLOCK_GATING_B, 0xf7);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

177

WREG32(mmVCE_LMI_CTRL, 0x00398000);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

179

WREG32(mmVCE_LMI_SWAP_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

180

WREG32(mmVCE_LMI_SWAP_CNTL1, 0);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

181

WREG32(mmVCE_LMI_VM_CTRL, 0);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

183

WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8));

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

187

WREG32(mmVCE_VCPU_CACHE_OFFSET0, offset & 0x7fffffff);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

188

WREG32(mmVCE_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

192

WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0x7fffffff);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

193

WREG32(mmVCE_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

197

WREG32(mmVCE_VCPU_CACHE_OFFSET2, offset & 0x7fffffff);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

198

WREG32(mmVCE_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

244

WREG32(mmVCE_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

245

WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

246

WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

247

WREG32(mmVCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

248

WREG32(mmVCE_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

251

WREG32(mmVCE_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

252

WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

253

WREG32(mmVCE_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

254

WREG32(mmVCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

255

WREG32(mmVCE_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

311

WREG32(mmVCE_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

323

WREG32(mmVCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

327

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

331

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

333

WREG32(mmVCE_CGTT_CLK_OVERRIDE, 0);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

338

WREG32(mmVCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

343

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

347

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

364

WREG32(mmVCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

368

WREG32(mmVCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

375

WREG32(mmVCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

380

WREG32(mmVCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

383

WREG32(mmVCE_UENC_REG_CLOCK_GATING, 0x00);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

386

WREG32(mmVCE_CGTT_CLK_OVERRIDE, 0);

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

94

WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v2_0.c

96

WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

117

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

119

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

128

WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

148

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

150

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

153

WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

155

WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

157

WREG32(mmVCE_RB_WPTR3, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

159

WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

185

WREG32(mmVCE_CLOCK_GATING_B, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

190

WREG32(mmVCE_UENC_CLOCK_GATING, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

195

WREG32(mmVCE_UENC_CLOCK_GATING_2, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

199

WREG32(mmVCE_UENC_REG_CLOCK_GATING, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

206

WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

211

WREG32(mmVCE_CLOCK_GATING_B, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

215

WREG32(mmVCE_UENC_CLOCK_GATING, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

219

WREG32(mmVCE_UENC_CLOCK_GATING_2, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

223

WREG32(mmVCE_UENC_REG_CLOCK_GATING, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

230

WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

275

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(idx));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

281

WREG32(mmVCE_RB_RPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

282

WREG32(mmVCE_RB_WPTR, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

283

WREG32(mmVCE_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

284

WREG32(mmVCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

285

WREG32(mmVCE_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

288

WREG32(mmVCE_RB_RPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

289

WREG32(mmVCE_RB_WPTR2, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

290

WREG32(mmVCE_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

291

WREG32(mmVCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

292

WREG32(mmVCE_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

295

WREG32(mmVCE_RB_RPTR3, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

296

WREG32(mmVCE_RB_WPTR3, lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

297

WREG32(mmVCE_RB_BASE_LO3, ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

298

WREG32(mmVCE_RB_BASE_HI3, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

299

WREG32(mmVCE_RB_SIZE3, ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

325

WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

340

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(idx));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

351

WREG32(mmVCE_STATUS, 0);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

354

WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

561

WREG32(mmVCE_CLOCK_GATING_B, 0x1FF);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

563

WREG32(mmVCE_LMI_CTRL, 0x00398000);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

565

WREG32(mmVCE_LMI_SWAP_CNTL, 0);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

566

WREG32(mmVCE_LMI_SWAP_CNTL1, 0);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

567

WREG32(mmVCE_LMI_VM_CTRL, 0);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

571

WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR0, (adev->vce.gpu_addr >> 8));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

572

WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR1, (adev->vce.gpu_addr >> 8));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

573

WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR2, (adev->vce.gpu_addr >> 8));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

575

WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

578

WREG32(mmVCE_VCPU_CACHE_OFFSET0, offset & 0x7fffffff);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

579

WREG32(mmVCE_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

584

WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0x7fffffff);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

585

WREG32(mmVCE_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

588

WREG32(mmVCE_VCPU_CACHE_OFFSET2, offset & 0x7fffffff);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

589

WREG32(mmVCE_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

593

WREG32(mmVCE_VCPU_CACHE_OFFSET1, offset & 0xfffffff);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

594

WREG32(mmVCE_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

597

WREG32(mmVCE_VCPU_CACHE_OFFSET2, offset & 0xfffffff);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

598

WREG32(mmVCE_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

653

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

658

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

663

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

690

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

696

WREG32(mmSRBM_SOFT_RESET, tmp);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

784

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(i));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

791

WREG32(mmVCE_CLOCK_GATING_A, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

797

WREG32(mmVCE_UENC_CLOCK_GATING, data);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

803

WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

85

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(0));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

87

WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(1));

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c

96

WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

115

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR),

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

118

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR2),

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

121

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR3),

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

164

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_CTX_ADDR_LO), lower_32_bits(addr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

165

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_CTX_ADDR_HI), upper_32_bits(addr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

171

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_VMID), data);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

174

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_CTX_SIZE), size);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

177

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_RESP), 0);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

185

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_MMSCH_VF_MAILBOX_HOST), 0x10000001);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

343

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_RPTR), lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

344

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR), lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

345

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_LO), ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

346

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_HI), upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

347

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_SIZE), ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

351

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_RPTR2), lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

352

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR2), lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

353

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_LO2), ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

354

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_HI2), upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

355

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_SIZE2), ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

359

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_RPTR3), lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

360

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_WPTR3), lower_32_bits(ring->wptr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

361

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_LO3), ring->gpu_addr);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

362

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_BASE_HI3), upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

363

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_SIZE3), ring->ring_size / 4);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

400

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_STATUS), 0);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

643

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_CLOCK_GATING_B), 0x1FF);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

645

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_CTRL), 0x00398000);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

647

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_SWAP_CNTL), 0);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

648

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_SWAP_CNTL1), 0);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

649

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VM_CTRL), 0);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

656

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0),

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

658

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR0),

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

660

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_OFFSET0), 0);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

662

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR0),

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

664

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR0),

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

666

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_OFFSET0), offset & ~0x0f000000);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

670

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_SIZE0), size);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

672

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR1), (adev->vce.gpu_addr >> 8));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

673

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR1), (adev->vce.gpu_addr >> 40) & 0xff);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

676

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_OFFSET1), (offset & ~0x0f000000) | (1 << 24));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

677

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_SIZE1), size);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

679

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_40BIT_BAR2), (adev->vce.gpu_addr >> 8));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

680

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_LMI_VCPU_CACHE_64BIT_BAR2), (adev->vce.gpu_addr >> 40) & 0xff);

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

683

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_OFFSET2), (offset & ~0x0f000000) | (2 << 24));

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c

684

WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_SIZE2), size);

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1835

WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

117

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

124

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

125

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

217

WREG32(ih_regs->ih_rb_base, ih->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

218

WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

232

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

237

WREG32(ih_regs->ih_rb_wptr_addr_lo, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

238

WREG32(ih_regs->ih_rb_wptr_addr_hi, upper_32_bits(ih->wptr_addr) & 0xFFFF);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

242

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

243

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

245

WREG32(ih_regs->ih_doorbell_rptr, vega10_ih_doorbell_rptr(ih));

drivers/gpu/drm/amd/amdgpu/vega10_ih.c

435

WREG32(ih_regs->ih_rb_rptr, ih->rptr);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

153

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

160

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

161

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

253

WREG32(ih_regs->ih_rb_base, ih->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

254

WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

268

WREG32(ih_regs->ih_rb_cntl, tmp);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

273

WREG32(ih_regs->ih_rb_wptr_addr_lo, lower_32_bits(ih->wptr_addr));

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

274

WREG32(ih_regs->ih_rb_wptr_addr_hi, upper_32_bits(ih->wptr_addr) & 0xFFFF);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

278

WREG32(ih_regs->ih_rb_wptr, 0);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

279

WREG32(ih_regs->ih_rb_rptr, 0);

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

281

WREG32(ih_regs->ih_doorbell_rptr, vega20_ih_doorbell_rptr(ih));

drivers/gpu/drm/amd/amdgpu/vega20_ih.c

520

WREG32(ih_regs->ih_rb_rptr, ih->rptr);

drivers/gpu/drm/amd/amdgpu/vi.c

1233

WREG32(mmBIF_CLK_CTRL, data);

drivers/gpu/drm/amd/amdgpu/vi.c

1293

WREG32(mmBIF_DOORBELL_APER_EN, tmp);

drivers/gpu/drm/amd/amdgpu/vi.c

1313

WREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1);

drivers/gpu/drm/amd/amdgpu/vi.c

1324

WREG32(mmHDP_DEBUG0, 1);

drivers/gpu/drm/amd/amdgpu/vi.c

1771

WREG32(mmHDP_HOST_PATH_CNTL, data);

drivers/gpu/drm/amd/amdgpu/vi.c

1787

WREG32(mmHDP_MEM_POWER_LS, data);

drivers/gpu/drm/amd/amdgpu/vi.c

1803

WREG32(0x157a, data);

drivers/gpu/drm/amd/amdgpu/vi.c

354

WREG32(mmMP0PUB_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/vi.c

365

WREG32(mmMP0PUB_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/vi.c

366

WREG32(mmMP0PUB_IND_DATA, (v));

drivers/gpu/drm/amd/amdgpu/vi.c

376

WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));

drivers/gpu/drm/amd/amdgpu/vi.c

387

WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff));

drivers/gpu/drm/amd/amdgpu/vi.c

388

WREG32(mmUVD_CTX_DATA, (v));

drivers/gpu/drm/amd/amdgpu/vi.c

398

WREG32(mmDIDT_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/vi.c

409

WREG32(mmDIDT_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/vi.c

410

WREG32(mmDIDT_IND_DATA, (v));

drivers/gpu/drm/amd/amdgpu/vi.c

420

WREG32(mmGC_CAC_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/vi.c

431

WREG32(mmGC_CAC_IND_INDEX, (reg));

drivers/gpu/drm/amd/amdgpu/vi.c

432

WREG32(mmGC_CAC_IND_DATA, (v));

drivers/gpu/drm/amd/amdgpu/vi.c

586

WREG32(mmSRBM_GFX_CNTL, srbm_gfx_cntl);

drivers/gpu/drm/amd/amdgpu/vi.c

607

WREG32(mmBUS_CNTL, (bus_cntl & ~BUS_CNTL__BIOS_ROM_DIS_MASK));

drivers/gpu/drm/amd/amdgpu/vi.c

610

WREG32(mmD1VGA_CONTROL,

drivers/gpu/drm/amd/amdgpu/vi.c

613

WREG32(mmD2VGA_CONTROL,

drivers/gpu/drm/amd/amdgpu/vi.c

616

WREG32(mmVGA_RENDER_CONTROL,

drivers/gpu/drm/amd/amdgpu/vi.c

624

WREG32(mmBUS_CNTL, bus_cntl);

drivers/gpu/drm/amd/amdgpu/vi.c

626

WREG32(mmD1VGA_CONTROL, d1vga_control);

drivers/gpu/drm/amd/amdgpu/vi.c

627

WREG32(mmD2VGA_CONTROL, d2vga_control);

drivers/gpu/drm/amd/amdgpu/vi.c

628

WREG32(mmVGA_RENDER_CONTROL, vga_render_control);

drivers/gpu/drm/amd/amdgpu/vi.c

654

WREG32(mmSMC_IND_INDEX_11, ixROM_INDEX);

drivers/gpu/drm/amd/amdgpu/vi.c

655

WREG32(mmSMC_IND_DATA_11, 0);

drivers/gpu/drm/amd/amdgpu/vi.c

657

WREG32(mmSMC_IND_INDEX_11, ixROM_DATA);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

112

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_COLLABORATE_CNTL), vpe_colla_cntl);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

119

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_COLLABORATE_CFG), vpe_colla_cfg);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

143

WREG32(vpe_get_reg_offset(vpe, j, regVPEC_CNTL_6_1_1), ret);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

145

WREG32(vpe_get_reg_offset(vpe, j, regVPEC_CNTL), ret);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

186

WREG32(vpe_get_reg_offset(vpe, j, regVPEC_UCODE_ADDR), VPE_THREAD1_UCODE_OFFSET);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

188

WREG32(vpe_get_reg_offset(vpe, j, regVPEC_UCODE_ADDR), 0);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

196

WREG32(vpe_get_reg_offset(vpe, j, regVPEC_UCODE_DATA), le32_to_cpup(data++));

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

222

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_CNTL), rb_cntl);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

225

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_RPTR), 0);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

226

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_RPTR_HI), 0);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

227

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_WPTR), 0);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

228

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_WPTR_HI), 0);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

231

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_RPTR_ADDR_LO),

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

233

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_RPTR_ADDR_HI),

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

238

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_BASE), ring->gpu_addr >> 8);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

239

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_BASE_HI), ring->gpu_addr >> 40);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

244

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_MINOR_PTR_UPDATE), 1);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

245

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_WPTR), lower_32_bits(ring->wptr) << 2);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

246

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

248

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_MINOR_PTR_UPDATE), 0);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

252

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_DOORBELL_OFFSET), doorbell_offset);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

256

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_DOORBELL), doorbell);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

262

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_RB_CNTL), rb_cntl);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

266

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE0_IB_CNTL), ib_cntl);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

291

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE_RESET_REQ_6_1_1), queue_reset);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

295

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_QUEUE_RESET_REQ), queue_reset);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

326

WREG32(vpe_get_reg_offset(vpe, 0, regVPEC_CNTL_6_1_1), vpe_cntl);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

328

WREG32(vpe_get_reg_offset(vpe, 0, regVPEC_CNTL), vpe_cntl);

drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c

82

WREG32(vpe_get_reg_offset(vpe, i, regVPEC_F32_CNTL), f32_cntl);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

133

WREG32(mmDOUT_SCRATCH3, v);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c

439

WREG32(config_regs->offset, data);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_smc.c

168

WREG32(mmSMC_IND_DATA_0, data);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_smc.c

181

WREG32(mmSMC_IND_DATA_0, data);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_smc.c

214

WREG32(mmSMC_IND_DATA_0, data);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_smc.c

37

WREG32(mmSMC_MESSAGE_0, id & SMC_MESSAGE_0__SMC_MSG_MASK);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_smc.c

72

WREG32(mmSMC_MSG_ARG_0, parameter);

drivers/gpu/drm/amd/pm/legacy-dpm/kv_smc.c

85

WREG32(mmSMC_IND_INDEX_0, smc_address);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2776

WREG32(mmCG_CAC_CTRL, reg);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

2873

WREG32(config_regs->offset, data);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3127

WREG32(MC_ARB_DRAM_TIMING, mc_arb_dram_timing);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3128

WREG32(MC_ARB_DRAM_TIMING2, mc_arb_dram_timing2);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3132

WREG32(MC_ARB_DRAM_TIMING_1, mc_arb_dram_timing);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3133

WREG32(MC_ARB_DRAM_TIMING2_1, mc_arb_dram_timing2);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3137

WREG32(MC_ARB_DRAM_TIMING_2, mc_arb_dram_timing);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3138

WREG32(MC_ARB_DRAM_TIMING2_2, mc_arb_dram_timing2);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3142

WREG32(MC_ARB_DRAM_TIMING_3, mc_arb_dram_timing);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3143

WREG32(MC_ARB_DRAM_TIMING2_3, mc_arb_dram_timing2);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3151

WREG32(MC_CG_CONFIG, mc_cg_config);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3729

WREG32(MC_SEQ_IO_DEBUG_INDEX, 0xb);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

3901

WREG32(mmSMC_SCRATCH0, parameter);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4120

WREG32(SMC_MESSAGE_0, PPSMC_MSG_SwitchToMinimumPower);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4131

WREG32(SMC_MESSAGE_0, PPSMC_MSG_ResumeFromMinimumPower);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4217

WREG32(mmCG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4227

WREG32(DCCG_DISP_SLOW_SELECT_REG, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4271

WREG32(mmCG_BSP, pi->dsp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4285

WREG32(mmCG_FFCT_0 + i, (r600_utc[i] << CG_FFCT_0__UTC_0__SHIFT | r600_dtc[i] << CG_FFCT_0__DTC_0__SHIFT));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4301

WREG32(mmCG_TPC, R600_TPC_DFLT);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4306

WREG32(mmCG_SSP, (R600_SSTU_DFLT << CG_SSP__SSTU__SHIFT| R600_SST_DFLT << CG_SSP__SST__SHIFT));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4320

WREG32(mmCG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4327

WREG32(mmCG_FTV, pi->vrc);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

4332

WREG32(mmCG_FTV, 0);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5307

WREG32(mmCG_ULV_CONTROL, ulv->cg_ulv_control);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

5308

WREG32(mmCG_ULV_PARAMETER, ulv->cg_ulv_parameter);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6063

WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6064

WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6065

WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6066

WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6067

WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6068

WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6069

WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6070

WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6071

WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6072

WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6073

WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6074

WREG32(MC_SEQ_PMG_TIMING_LP, RREG32(MC_SEQ_PMG_TIMING));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6075

WREG32(MC_SEQ_PMG_CMD_MRS2_LP, RREG32(MC_PMG_CMD_MRS2));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6076

WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2));

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6468

WREG32(mmCG_THERMAL_INT, thermal_int);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6476

WREG32(mmCG_THERMAL_INT, thermal_int);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6522

WREG32(mmCG_FDO_CTRL2, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6526

WREG32(mmCG_FDO_CTRL2, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6682

WREG32(mmCG_FDO_CTRL0, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6772

WREG32(mmCG_TACH_CTRL, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6788

WREG32(mmCG_FDO_CTRL2, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6792

WREG32(mmCG_FDO_CTRL2, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6812

WREG32(mmCG_TACH_CTRL, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

6817

WREG32(mmCG_FDO_CTRL2, tmp);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7608

WREG32(mmCG_THERMAL_INT, cg_thermal_int);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7613

WREG32(mmCG_THERMAL_INT, cg_thermal_int);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7625

WREG32(mmCG_THERMAL_INT, cg_thermal_int);

drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c

7630

WREG32(mmCG_THERMAL_INT, cg_thermal_int);

drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c

108

WREG32(mmSMC_IND_DATA_0, data);

drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c

194

WREG32(mmSMC_MESSAGE_0, msg);

drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c

256

WREG32(mmSMC_IND_INDEX_0, ucode_start_address);

drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c

262

WREG32(mmSMC_IND_DATA_0, data);

drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c

297

WREG32(mmSMC_IND_DATA_0, value);

drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c

47

WREG32(mmSMC_IND_INDEX_0, smc_address);

drivers/gpu/drm/amd/pm/legacy-dpm/si_smc.c

77

WREG32(mmSMC_IND_DATA_0, data);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c

53

WREG32(reg, value << shift);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/common_baco.c

58

WREG32(reg, data);

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c

39

WREG32(0x12074, 0xFFF0003B);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1654

WREG32(adev->bios_scratch_reg_offset + 6, 0);

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1655

WREG32(adev->bios_scratch_reg_offset + 7, 0);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

2176

WREG32(adev->bios_scratch_reg_offset + 6, 0);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

2177

WREG32(adev->bios_scratch_reg_offset + 7, 0);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

1804

WREG32(adev->bios_scratch_reg_offset + 6, 0);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

1805

WREG32(adev->bios_scratch_reg_offset + 7, 0);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

1679

WREG32(adev->bios_scratch_reg_offset + 6, 0);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

1680

WREG32(adev->bios_scratch_reg_offset + 7, 0);

drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c

277

WREG32(cfg->resp_reg, 0);

drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c

279

WREG32(cfg->arg_regs[i], args->args[i]);

drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c

280

WREG32(cfg->msg_reg, index);

drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c

96

WREG32(cfg->debug_param_reg, param);

drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c

97

WREG32(cfg->debug_msg_reg, msg);

drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c

98

WREG32(cfg->debug_resp_reg, 0);

drivers/gpu/drm/mgag200/mgag200_drv.c

198

WREG32(MGAREG_IEN, 0);

drivers/gpu/drm/mgag200/mgag200_g200er.c

48

WREG32(MGAREG_MEMCTL, memctl);

drivers/gpu/drm/mgag200/mgag200_g200er.c

53

WREG32(MGAREG_MEMCTL, memctl);

drivers/gpu/drm/mgag200/mgag200_mode.c

184

WREG32(MGAREG_OPMODE, opmode);

drivers/gpu/drm/radeon/atombios_crtc.c

1349

WREG32(AVIVO_D1VGA_CONTROL, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1352

WREG32(AVIVO_D2VGA_CONTROL, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1355

WREG32(EVERGREEN_D3VGA_CONTROL, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1358

WREG32(EVERGREEN_D4VGA_CONTROL, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1361

WREG32(EVERGREEN_D5VGA_CONTROL, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1364

WREG32(EVERGREEN_D6VGA_CONTROL, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1373

WREG32(EVERGREEN_GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1375

WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1377

WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1379

WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1381

WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1383

WREG32(EVERGREEN_GRPH_CONTROL + radeon_crtc->crtc_offset, fb_format);

drivers/gpu/drm/radeon/atombios_crtc.c

1384

WREG32(EVERGREEN_GRPH_SWAP_CONTROL + radeon_crtc->crtc_offset, fb_swap);

drivers/gpu/drm/radeon/atombios_crtc.c

1398

WREG32(EVERGREEN_GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1399

WREG32(EVERGREEN_GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1400

WREG32(EVERGREEN_GRPH_X_START + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1401

WREG32(EVERGREEN_GRPH_Y_START + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1402

WREG32(EVERGREEN_GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width);

drivers/gpu/drm/radeon/atombios_crtc.c

1403

WREG32(EVERGREEN_GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height);

drivers/gpu/drm/radeon/atombios_crtc.c

1406

WREG32(EVERGREEN_GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels);

drivers/gpu/drm/radeon/atombios_crtc.c

1407

WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 1);

drivers/gpu/drm/radeon/atombios_crtc.c

1410

WREG32(CIK_LB_DESKTOP_HEIGHT + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1413

WREG32(EVERGREEN_DESKTOP_HEIGHT + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1417

WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1424

WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1428

WREG32(EVERGREEN_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1570

WREG32(AVIVO_D1VGA_CONTROL, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1572

WREG32(AVIVO_D2VGA_CONTROL, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1577

WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1581

WREG32(R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location));

drivers/gpu/drm/radeon/atombios_crtc.c

1582

WREG32(R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location));

drivers/gpu/drm/radeon/atombios_crtc.c

1584

WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location));

drivers/gpu/drm/radeon/atombios_crtc.c

1585

WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location));

drivers/gpu/drm/radeon/atombios_crtc.c

1588

WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1590

WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS +

drivers/gpu/drm/radeon/atombios_crtc.c

1592

WREG32(AVIVO_D1GRPH_CONTROL + radeon_crtc->crtc_offset, fb_format);

drivers/gpu/drm/radeon/atombios_crtc.c

1594

WREG32(R600_D1GRPH_SWAP_CONTROL + radeon_crtc->crtc_offset, fb_swap);

drivers/gpu/drm/radeon/atombios_crtc.c

1603

WREG32(AVIVO_D1GRPH_SURFACE_OFFSET_X + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1604

WREG32(AVIVO_D1GRPH_SURFACE_OFFSET_Y + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1605

WREG32(AVIVO_D1GRPH_X_START + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1606

WREG32(AVIVO_D1GRPH_Y_START + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

1607

WREG32(AVIVO_D1GRPH_X_END + radeon_crtc->crtc_offset, target_fb->width);

drivers/gpu/drm/radeon/atombios_crtc.c

1608

WREG32(AVIVO_D1GRPH_Y_END + radeon_crtc->crtc_offset, target_fb->height);

drivers/gpu/drm/radeon/atombios_crtc.c

1611

WREG32(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset, fb_pitch_pixels);

drivers/gpu/drm/radeon/atombios_crtc.c

1612

WREG32(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1);

drivers/gpu/drm/radeon/atombios_crtc.c

1614

WREG32(AVIVO_D1MODE_DESKTOP_HEIGHT + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1618

WREG32(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1622

WREG32(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_crtc.c

1626

WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 3);

drivers/gpu/drm/radeon/atombios_crtc.c

1669

WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);

drivers/gpu/drm/radeon/atombios_crtc.c

1674

WREG32(RADEON_DISP2_MERGE_CNTL, disp_merge_cntl);

drivers/gpu/drm/radeon/atombios_crtc.c

1675

WREG32(RADEON_FP_H2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_H_SYNC_STRT_WID));

drivers/gpu/drm/radeon/atombios_crtc.c

1676

WREG32(RADEON_FP_V2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_V_SYNC_STRT_WID));

drivers/gpu/drm/radeon/atombios_crtc.c

2133

WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

2135

WREG32(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_crtc.c

239

WREG32(vga_control_regs[radeon_crtc->crtc_id], vga_control | 1);

drivers/gpu/drm/radeon/atombios_crtc.c

248

WREG32(vga_control_regs[radeon_crtc->crtc_id], vga_control);

drivers/gpu/drm/radeon/atombios_crtc.c

404

WREG32(EVERGREEN_P1PLL_SS_CNTL, ss_cntl);

drivers/gpu/drm/radeon/atombios_crtc.c

409

WREG32(EVERGREEN_P2PLL_SS_CNTL, ss_cntl);

drivers/gpu/drm/radeon/atombios_crtc.c

420

WREG32(AVIVO_P1PLL_INT_SS_CNTL, ss_cntl);

drivers/gpu/drm/radeon/atombios_crtc.c

425

WREG32(AVIVO_P2PLL_INT_SS_CNTL, ss_cntl);

drivers/gpu/drm/radeon/atombios_encoders.c

1546

WREG32(reg, (ATOM_S3_TV1_ACTIVE |

drivers/gpu/drm/radeon/atombios_encoders.c

1549

WREG32(reg, (ATOM_S3_CV_ACTIVE | (radeon_crtc->crtc_id << 24)));

drivers/gpu/drm/radeon/atombios_encoders.c

1551

WREG32(reg, 0);

drivers/gpu/drm/radeon/atombios_encoders.c

1559

WREG32(reg, temp);

drivers/gpu/drm/radeon/atombios_encoders.c

1620

WREG32(RADEON_BIOS_3_SCRATCH, reg & ~ATOM_S3_DFP2I_ACTIVE);

drivers/gpu/drm/radeon/atombios_encoders.c

1622

WREG32(RADEON_BIOS_3_SCRATCH, reg);

drivers/gpu/drm/radeon/atombios_encoders.c

2011

WREG32(AVIVO_LVTMA_BIT_DEPTH_CONTROL, lvtma_bit_depth_control);

drivers/gpu/drm/radeon/atombios_encoders.c

2020

WREG32(CIK_LB_DATA_FORMAT + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_encoders.c

2023

WREG32(CIK_LB_DATA_FORMAT + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_encoders.c

2026

WREG32(EVERGREEN_DATA_FORMAT + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_encoders.c

2029

WREG32(EVERGREEN_DATA_FORMAT + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_encoders.c

2032

WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/atombios_encoders.c

2035

WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/atombios_encoders.c

80

WREG32(R600_BIOS_2_SCRATCH, bios_2_scratch);

drivers/gpu/drm/radeon/atombios_encoders.c

82

WREG32(RADEON_BIOS_2_SCRATCH, bios_2_scratch);

drivers/gpu/drm/radeon/btc_dpm.c

1316

WREG32(CG_BIF_REQ_AND_RSP, bif);

drivers/gpu/drm/radeon/btc_dpm.c

1335

WREG32(CG_BIF_REQ_AND_RSP, bif);

drivers/gpu/drm/radeon/btc_dpm.c

1388

WREG32(CG_ULV_CONTROL, BTC_CGULVCONTROL_DFLT);

drivers/gpu/drm/radeon/btc_dpm.c

1389

WREG32(CG_ULV_PARAMETER, BTC_CGULVPARAMETER_DFLT);

drivers/gpu/drm/radeon/btc_dpm.c

1420

WREG32(sequence[i], tmp);

drivers/gpu/drm/radeon/btc_dpm.c

1741

WREG32(MC_ARB_DRAM_TIMING, arb_registers->mc_arb_dram_timing);

drivers/gpu/drm/radeon/btc_dpm.c

1742

WREG32(MC_ARB_DRAM_TIMING2, arb_registers->mc_arb_dram_timing2);

drivers/gpu/drm/radeon/btc_dpm.c

2000

WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));

drivers/gpu/drm/radeon/btc_dpm.c

2001

WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));

drivers/gpu/drm/radeon/btc_dpm.c

2002

WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING));

drivers/gpu/drm/radeon/btc_dpm.c

2003

WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2));

drivers/gpu/drm/radeon/btc_dpm.c

2004

WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));

drivers/gpu/drm/radeon/btc_dpm.c

2005

WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));

drivers/gpu/drm/radeon/btc_dpm.c

2006

WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));

drivers/gpu/drm/radeon/btc_dpm.c

2007

WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1));

drivers/gpu/drm/radeon/btc_dpm.c

2008

WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));

drivers/gpu/drm/radeon/btc_dpm.c

2009

WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS));

drivers/gpu/drm/radeon/btc_dpm.c

2010

WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));

drivers/gpu/drm/radeon/btc_dpm.c

2046

WREG32(MC_PMG_AUTO_CFG, tmp);

drivers/gpu/drm/radeon/ci_dpm.c

1623

WREG32(SMC_MESSAGE_0, msg);

drivers/gpu/drm/radeon/ci_dpm.c

1639

WREG32(SMC_MSG_ARG_0, parameter);

drivers/gpu/drm/radeon/ci_dpm.c

1887

WREG32(SMC_MESSAGE_0, PPSMC_MSG_SwitchToMinimumPower);

drivers/gpu/drm/radeon/ci_dpm.c

1898

WREG32(SMC_MESSAGE_0, PPSMC_MSG_ResumeFromMinimumPower);

drivers/gpu/drm/radeon/ci_dpm.c

4564

WREG32(MC_SEQ_IO_DEBUG_INDEX, 3);

drivers/gpu/drm/radeon/ci_dpm.c

4567

WREG32(MC_SEQ_IO_DEBUG_INDEX, 3);

drivers/gpu/drm/radeon/ci_dpm.c

4568

WREG32(MC_SEQ_IO_DEBUG_DATA, tmp);

drivers/gpu/drm/radeon/ci_dpm.c

4586

WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));

drivers/gpu/drm/radeon/ci_dpm.c

4587

WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));

drivers/gpu/drm/radeon/ci_dpm.c

4588

WREG32(MC_SEQ_DLL_STBY_LP, RREG32(MC_SEQ_DLL_STBY));

drivers/gpu/drm/radeon/ci_dpm.c

4589

WREG32(MC_SEQ_G5PDX_CMD0_LP, RREG32(MC_SEQ_G5PDX_CMD0));

drivers/gpu/drm/radeon/ci_dpm.c

4590

WREG32(MC_SEQ_G5PDX_CMD1_LP, RREG32(MC_SEQ_G5PDX_CMD1));

drivers/gpu/drm/radeon/ci_dpm.c

4591

WREG32(MC_SEQ_G5PDX_CTRL_LP, RREG32(MC_SEQ_G5PDX_CTRL));

drivers/gpu/drm/radeon/ci_dpm.c

4592

WREG32(MC_SEQ_PMG_DVS_CMD_LP, RREG32(MC_SEQ_PMG_DVS_CMD));

drivers/gpu/drm/radeon/ci_dpm.c

4593

WREG32(MC_SEQ_PMG_DVS_CTL_LP, RREG32(MC_SEQ_PMG_DVS_CTL));

drivers/gpu/drm/radeon/ci_dpm.c

4594

WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING));

drivers/gpu/drm/radeon/ci_dpm.c

4595

WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2));

drivers/gpu/drm/radeon/ci_dpm.c

4596

WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));

drivers/gpu/drm/radeon/ci_dpm.c

4597

WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS));

drivers/gpu/drm/radeon/ci_dpm.c

4598

WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));

drivers/gpu/drm/radeon/ci_dpm.c

4599

WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));

drivers/gpu/drm/radeon/ci_dpm.c

4600

WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1));

drivers/gpu/drm/radeon/ci_dpm.c

4601

WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));

drivers/gpu/drm/radeon/ci_dpm.c

4602

WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));

drivers/gpu/drm/radeon/ci_dpm.c

4603

WREG32(MC_SEQ_PMG_TIMING_LP, RREG32(MC_SEQ_PMG_TIMING));

drivers/gpu/drm/radeon/ci_dpm.c

4604

WREG32(MC_SEQ_PMG_CMD_MRS2_LP, RREG32(MC_PMG_CMD_MRS2));

drivers/gpu/drm/radeon/ci_dpm.c

4605

WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2));

drivers/gpu/drm/radeon/ci_dpm.c

576

WREG32(config_regs->offset << 2, data);

drivers/gpu/drm/radeon/ci_smc.c

105

WREG32(SMC_IND_DATA_0, data);

drivers/gpu/drm/radeon/ci_smc.c

229

WREG32(SMC_IND_INDEX_0, ucode_start_address);

drivers/gpu/drm/radeon/ci_smc.c

235

WREG32(SMC_IND_DATA_0, data);

drivers/gpu/drm/radeon/ci_smc.c

270

WREG32(SMC_IND_DATA_0, value);

drivers/gpu/drm/radeon/ci_smc.c

41

WREG32(SMC_IND_INDEX_0, smc_address);

drivers/gpu/drm/radeon/ci_smc.c

73

WREG32(SMC_IND_DATA_0, data);

drivers/gpu/drm/radeon/cik.c

1848

WREG32(SRBM_GFX_CNTL, srbm_gfx_cntl);

drivers/gpu/drm/radeon/cik.c

185

WREG32(CIK_DIDT_IND_INDEX, (reg));

drivers/gpu/drm/radeon/cik.c

1906

WREG32(MC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/radeon/cik.c

1907

WREG32(MC_SEQ_SUP_CNTL, 0x00000010);

drivers/gpu/drm/radeon/cik.c

1912

WREG32(MC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(new_io_mc_regs++));

drivers/gpu/drm/radeon/cik.c

1913

WREG32(MC_SEQ_IO_DEBUG_DATA, le32_to_cpup(new_io_mc_regs++));

drivers/gpu/drm/radeon/cik.c

1915

WREG32(MC_SEQ_IO_DEBUG_INDEX, io_mc_regs[(i << 1)]);

drivers/gpu/drm/radeon/cik.c

1916

WREG32(MC_SEQ_IO_DEBUG_DATA, io_mc_regs[(i << 1) + 1]);

drivers/gpu/drm/radeon/cik.c

1922

WREG32(MC_SEQ_IO_DEBUG_INDEX, 5);

drivers/gpu/drm/radeon/cik.c

1923

WREG32(MC_SEQ_IO_DEBUG_DATA, 0x00000023);

drivers/gpu/drm/radeon/cik.c

1924

WREG32(MC_SEQ_IO_DEBUG_INDEX, 9);

drivers/gpu/drm/radeon/cik.c

1925

WREG32(MC_SEQ_IO_DEBUG_DATA, 0x000001f0);

drivers/gpu/drm/radeon/cik.c

1931

WREG32(MC_SEQ_SUP_PGM, le32_to_cpup(new_fw_data++));

drivers/gpu/drm/radeon/cik.c

1933

WREG32(MC_SEQ_SUP_PGM, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

1937

WREG32(MC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/radeon/cik.c

1938

WREG32(MC_SEQ_SUP_CNTL, 0x00000004);

drivers/gpu/drm/radeon/cik.c

1939

WREG32(MC_SEQ_SUP_CNTL, 0x00000001);

drivers/gpu/drm/radeon/cik.c

196

WREG32(CIK_DIDT_IND_INDEX, (reg));

drivers/gpu/drm/radeon/cik.c

197

WREG32(CIK_DIDT_IND_DATA, (v));

drivers/gpu/drm/radeon/cik.c

243

WREG32(PCIE_INDEX, reg);

drivers/gpu/drm/radeon/cik.c

2494

WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);

drivers/gpu/drm/radeon/cik.c

2496

WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), macrotile[reg_offset]);

drivers/gpu/drm/radeon/cik.c

255

WREG32(PCIE_INDEX, reg);

drivers/gpu/drm/radeon/cik.c

257

WREG32(PCIE_DATA, v);

drivers/gpu/drm/radeon/cik.c

2637

WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);

drivers/gpu/drm/radeon/cik.c

2639

WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), macrotile[reg_offset]);

drivers/gpu/drm/radeon/cik.c

2862

WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);

drivers/gpu/drm/radeon/cik.c

2864

WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), macrotile[reg_offset]);

drivers/gpu/drm/radeon/cik.c

3005

WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);

drivers/gpu/drm/radeon/cik.c

3007

WREG32(GB_MACROTILE_MODE0 + (reg_offset * 4), macrotile[reg_offset]);

drivers/gpu/drm/radeon/cik.c

3039

WREG32(GRBM_GFX_INDEX, data);

drivers/gpu/drm/radeon/cik.c

3155

WREG32(PA_SC_RASTER_CONFIG, data);

drivers/gpu/drm/radeon/cik.c

3251

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

3252

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

3253

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

3254

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

3255

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

3258

WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));

drivers/gpu/drm/radeon/cik.c

3259

WREG32(SRBM_INT_CNTL, 0x1);

drivers/gpu/drm/radeon/cik.c

3260

WREG32(SRBM_INT_ACK, 0x1);

drivers/gpu/drm/radeon/cik.c

3262

WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN);

drivers/gpu/drm/radeon/cik.c

3324

WREG32(GB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/cik.c

3325

WREG32(HDP_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/cik.c

3326

WREG32(DMIF_ADDR_CALC, gb_addr_config);

drivers/gpu/drm/radeon/cik.c

3327

WREG32(SDMA0_TILING_CONFIG + SDMA0_REGISTER_OFFSET, gb_addr_config & 0x70);

drivers/gpu/drm/radeon/cik.c

3328

WREG32(SDMA0_TILING_CONFIG + SDMA1_REGISTER_OFFSET, gb_addr_config & 0x70);

drivers/gpu/drm/radeon/cik.c

3329

WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/cik.c

3330

WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/cik.c

3331

WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/cik.c

3348

WREG32(CP_MEQ_THRESHOLDS, MEQ1_START(0x30) | MEQ2_START(0x60));

drivers/gpu/drm/radeon/cik.c

3350

WREG32(SX_DEBUG_1, 0x20);

drivers/gpu/drm/radeon/cik.c

3352

WREG32(TA_CNTL_AUX, 0x00010000);

drivers/gpu/drm/radeon/cik.c

3356

WREG32(SPI_CONFIG_CNTL, tmp);

drivers/gpu/drm/radeon/cik.c

3358

WREG32(SQ_CONFIG, 1);

drivers/gpu/drm/radeon/cik.c

3360

WREG32(DB_DEBUG, 0);

drivers/gpu/drm/radeon/cik.c

3364

WREG32(DB_DEBUG2, tmp);

drivers/gpu/drm/radeon/cik.c

3368

WREG32(DB_DEBUG3, tmp);

drivers/gpu/drm/radeon/cik.c

3372

WREG32(CB_HW_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

3374

WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4));

drivers/gpu/drm/radeon/cik.c

3376

WREG32(PA_SC_FIFO_SIZE, (SC_FRONTEND_PRIM_FIFO_SIZE(rdev->config.cik.sc_prim_fifo_size_frontend) |

drivers/gpu/drm/radeon/cik.c

3381

WREG32(VGT_NUM_INSTANCES, 1);

drivers/gpu/drm/radeon/cik.c

3383

WREG32(CP_PERFMON_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

3385

WREG32(SQ_CONFIG, 0);

drivers/gpu/drm/radeon/cik.c

3387

WREG32(PA_SC_FORCE_EOV_MAX_CNTS, (FORCE_EOV_MAX_CLK_CNT(4095) |

drivers/gpu/drm/radeon/cik.c

3390

WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) |

drivers/gpu/drm/radeon/cik.c

3393

WREG32(VGT_GS_VERTEX_REUSE, 16);

drivers/gpu/drm/radeon/cik.c

3394

WREG32(PA_SC_LINE_STIPPLE_STATE, 0);

drivers/gpu/drm/radeon/cik.c

3398

WREG32(HDP_MISC_CNTL, tmp);

drivers/gpu/drm/radeon/cik.c

3401

WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl);

drivers/gpu/drm/radeon/cik.c

3403

WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3));

drivers/gpu/drm/radeon/cik.c

3404

WREG32(PA_SC_ENHANCE, ENABLE_PA_SC_OUT_OF_ORDER);

drivers/gpu/drm/radeon/cik.c

3457

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/radeon/cik.c

3782

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/radeon/cik.c

3866

WREG32(CP_ME_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

3870

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT));

drivers/gpu/drm/radeon/cik.c

3911

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

3913

WREG32(CP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

3914

WREG32(CP_PFP_UCODE_ADDR, le32_to_cpu(pfp_hdr->header.ucode_version));

drivers/gpu/drm/radeon/cik.c

3920

WREG32(CP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

3922

WREG32(CP_CE_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

3923

WREG32(CP_CE_UCODE_ADDR, le32_to_cpu(ce_hdr->header.ucode_version));

drivers/gpu/drm/radeon/cik.c

3929

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/cik.c

3931

WREG32(CP_ME_RAM_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

3932

WREG32(CP_ME_RAM_WADDR, le32_to_cpu(me_hdr->header.ucode_version));

drivers/gpu/drm/radeon/cik.c

3933

WREG32(CP_ME_RAM_RADDR, le32_to_cpu(me_hdr->header.ucode_version));

drivers/gpu/drm/radeon/cik.c

3939

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

3941

WREG32(CP_PFP_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

3942

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

3946

WREG32(CP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

3948

WREG32(CP_CE_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

3949

WREG32(CP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

3953

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/cik.c

3955

WREG32(CP_ME_RAM_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

3956

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/cik.c

3977

WREG32(CP_MAX_CONTEXT, rdev->config.cik.max_hw_contexts - 1);

drivers/gpu/drm/radeon/cik.c

3978

WREG32(CP_ENDIAN_SWAP, 0);

drivers/gpu/drm/radeon/cik.c

3979

WREG32(CP_DEVICE_ID, 1);

drivers/gpu/drm/radeon/cik.c

4054

WREG32(CP_SEM_WAIT_TIMER, 0x0);

drivers/gpu/drm/radeon/cik.c

4056

WREG32(CP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);

drivers/gpu/drm/radeon/cik.c

4059

WREG32(CP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/radeon/cik.c

4062

WREG32(CP_RB_VMID, 0);

drivers/gpu/drm/radeon/cik.c

4064

WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF);

drivers/gpu/drm/radeon/cik.c

4074

WREG32(CP_RB0_CNTL, tmp);

drivers/gpu/drm/radeon/cik.c

4077

WREG32(CP_RB0_CNTL, tmp | RB_RPTR_WR_ENA);

drivers/gpu/drm/radeon/cik.c

4079

WREG32(CP_RB0_WPTR, ring->wptr);

drivers/gpu/drm/radeon/cik.c

4082

WREG32(CP_RB0_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC);

drivers/gpu/drm/radeon/cik.c

4083

WREG32(CP_RB0_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF);

drivers/gpu/drm/radeon/cik.c

4086

WREG32(SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/cik.c

4092

WREG32(CP_RB0_CNTL, tmp);

drivers/gpu/drm/radeon/cik.c

4095

WREG32(CP_RB0_BASE, rb_addr);

drivers/gpu/drm/radeon/cik.c

4096

WREG32(CP_RB0_BASE_HI, upper_32_bits(rb_addr));

drivers/gpu/drm/radeon/cik.c

4135

WREG32(CP_RB0_WPTR, ring->wptr);

drivers/gpu/drm/radeon/cik.c

4193

WREG32(CP_PQ_WPTR_POLL_CNTL, tmp);

drivers/gpu/drm/radeon/cik.c

4196

WREG32(CP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/radeon/cik.c

4202

WREG32(CP_HQD_DEQUEUE_REQUEST, 0);

drivers/gpu/drm/radeon/cik.c

4203

WREG32(CP_HQD_PQ_RPTR, 0);

drivers/gpu/drm/radeon/cik.c

4204

WREG32(CP_HQD_PQ_WPTR, 0);

drivers/gpu/drm/radeon/cik.c

4220

WREG32(CP_MEC_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

4231

WREG32(CP_MEC_CNTL, (MEC_ME1_HALT | MEC_ME2_HALT));

drivers/gpu/drm/radeon/cik.c

4267

WREG32(CP_MEC_ME1_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

4269

WREG32(CP_MEC_ME1_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

4270

WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version));

drivers/gpu/drm/radeon/cik.c

4281

WREG32(CP_MEC_ME2_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

4283

WREG32(CP_MEC_ME2_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

4284

WREG32(CP_MEC_ME2_UCODE_ADDR, le32_to_cpu(mec2_hdr->header.ucode_version));

drivers/gpu/drm/radeon/cik.c

4291

WREG32(CP_MEC_ME1_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

4293

WREG32(CP_MEC_ME1_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

4294

WREG32(CP_MEC_ME1_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

4299

WREG32(CP_MEC_ME2_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

4301

WREG32(CP_MEC_ME2_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

4302

WREG32(CP_MEC_ME2_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

4527

WREG32(CP_CPF_DEBUG, tmp);

drivers/gpu/drm/radeon/cik.c

4540

WREG32(CP_HPD_EOP_BASE_ADDR, eop_gpu_addr >> 8);

drivers/gpu/drm/radeon/cik.c

4541

WREG32(CP_HPD_EOP_BASE_ADDR_HI, upper_32_bits(eop_gpu_addr) >> 8);

drivers/gpu/drm/radeon/cik.c

4544

WREG32(CP_HPD_EOP_VMID, 0);

drivers/gpu/drm/radeon/cik.c

4550

WREG32(CP_HPD_EOP_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

4612

WREG32(CP_PQ_WPTR_POLL_CNTL, tmp);

drivers/gpu/drm/radeon/cik.c

4621

WREG32(CP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/radeon/cik.c

4629

WREG32(CP_HQD_DEQUEUE_REQUEST, 1);

drivers/gpu/drm/radeon/cik.c

4635

WREG32(CP_HQD_DEQUEUE_REQUEST, mqd->queue_state.cp_hqd_dequeue_request);

drivers/gpu/drm/radeon/cik.c

4636

WREG32(CP_HQD_PQ_RPTR, mqd->queue_state.cp_hqd_pq_rptr);

drivers/gpu/drm/radeon/cik.c

4637

WREG32(CP_HQD_PQ_WPTR, mqd->queue_state.cp_hqd_pq_wptr);

drivers/gpu/drm/radeon/cik.c

4643

WREG32(CP_MQD_BASE_ADDR, mqd->queue_state.cp_mqd_base_addr);

drivers/gpu/drm/radeon/cik.c

4644

WREG32(CP_MQD_BASE_ADDR_HI, mqd->queue_state.cp_mqd_base_addr_hi);

drivers/gpu/drm/radeon/cik.c

4648

WREG32(CP_MQD_CONTROL, mqd->queue_state.cp_mqd_control);

drivers/gpu/drm/radeon/cik.c

4654

WREG32(CP_HQD_PQ_BASE, mqd->queue_state.cp_hqd_pq_base);

drivers/gpu/drm/radeon/cik.c

4655

WREG32(CP_HQD_PQ_BASE_HI, mqd->queue_state.cp_hqd_pq_base_hi);

drivers/gpu/drm/radeon/cik.c

4673

WREG32(CP_HQD_PQ_CONTROL, mqd->queue_state.cp_hqd_pq_control);

drivers/gpu/drm/radeon/cik.c

4682

WREG32(CP_HQD_PQ_WPTR_POLL_ADDR, mqd->queue_state.cp_hqd_pq_wptr_poll_addr);

drivers/gpu/drm/radeon/cik.c

4683

WREG32(CP_HQD_PQ_WPTR_POLL_ADDR_HI,

drivers/gpu/drm/radeon/cik.c

4694

WREG32(CP_HQD_PQ_RPTR_REPORT_ADDR,

drivers/gpu/drm/radeon/cik.c

4696

WREG32(CP_HQD_PQ_RPTR_REPORT_ADDR_HI,

drivers/gpu/drm/radeon/cik.c

4713

WREG32(CP_HQD_PQ_DOORBELL_CONTROL,

drivers/gpu/drm/radeon/cik.c

4719

WREG32(CP_HQD_PQ_WPTR, mqd->queue_state.cp_hqd_pq_wptr);

drivers/gpu/drm/radeon/cik.c

4724

WREG32(CP_HQD_VMID, mqd->queue_state.cp_hqd_vmid);

drivers/gpu/drm/radeon/cik.c

4728

WREG32(CP_HQD_ACTIVE, mqd->queue_state.cp_hqd_active);

drivers/gpu/drm/radeon/cik.c

4947

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/cik.c

4950

WREG32(CP_MEC_CNTL, MEC_ME1_HALT | MEC_ME2_HALT);

drivers/gpu/drm/radeon/cik.c

4956

WREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/cik.c

4962

WREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/cik.c

5012

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/cik.c

5018

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/cik.c

5026

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/cik.c

5032

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/cik.c

5058

WREG32(GMCON_RENG_EXECUTE, save->gmcon_reng_execute & ~RENG_EXECUTE_ON_PWR_UP);

drivers/gpu/drm/radeon/cik.c

5059

WREG32(GMCON_MISC, save->gmcon_misc & ~(RENG_EXECUTE_ON_REG_UPDATE |

drivers/gpu/drm/radeon/cik.c

5068

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5069

WREG32(GMCON_PGFSM_CONFIG, 0x200010ff);

drivers/gpu/drm/radeon/cik.c

5072

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5074

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5075

WREG32(GMCON_PGFSM_CONFIG, 0x300010ff);

drivers/gpu/drm/radeon/cik.c

5078

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5080

WREG32(GMCON_PGFSM_WRITE, 0x210000);

drivers/gpu/drm/radeon/cik.c

5081

WREG32(GMCON_PGFSM_CONFIG, 0xa00010ff);

drivers/gpu/drm/radeon/cik.c

5084

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5086

WREG32(GMCON_PGFSM_WRITE, 0x21003);

drivers/gpu/drm/radeon/cik.c

5087

WREG32(GMCON_PGFSM_CONFIG, 0xb00010ff);

drivers/gpu/drm/radeon/cik.c

5090

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5092

WREG32(GMCON_PGFSM_WRITE, 0x2b00);

drivers/gpu/drm/radeon/cik.c

5093

WREG32(GMCON_PGFSM_CONFIG, 0xc00010ff);

drivers/gpu/drm/radeon/cik.c

5096

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5098

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5099

WREG32(GMCON_PGFSM_CONFIG, 0xd00010ff);

drivers/gpu/drm/radeon/cik.c

5102

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5104

WREG32(GMCON_PGFSM_WRITE, 0x420000);

drivers/gpu/drm/radeon/cik.c

5105

WREG32(GMCON_PGFSM_CONFIG, 0x100010ff);

drivers/gpu/drm/radeon/cik.c

5108

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5110

WREG32(GMCON_PGFSM_WRITE, 0x120202);

drivers/gpu/drm/radeon/cik.c

5111

WREG32(GMCON_PGFSM_CONFIG, 0x500010ff);

drivers/gpu/drm/radeon/cik.c

5114

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5116

WREG32(GMCON_PGFSM_WRITE, 0x3e3e36);

drivers/gpu/drm/radeon/cik.c

5117

WREG32(GMCON_PGFSM_CONFIG, 0x600010ff);

drivers/gpu/drm/radeon/cik.c

5120

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5122

WREG32(GMCON_PGFSM_WRITE, 0x373f3e);

drivers/gpu/drm/radeon/cik.c

5123

WREG32(GMCON_PGFSM_CONFIG, 0x700010ff);

drivers/gpu/drm/radeon/cik.c

5126

WREG32(GMCON_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/cik.c

5128

WREG32(GMCON_PGFSM_WRITE, 0x3e1332);

drivers/gpu/drm/radeon/cik.c

5129

WREG32(GMCON_PGFSM_CONFIG, 0xe00010ff);

drivers/gpu/drm/radeon/cik.c

5131

WREG32(GMCON_MISC3, save->gmcon_misc3);

drivers/gpu/drm/radeon/cik.c

5132

WREG32(GMCON_MISC, save->gmcon_misc);

drivers/gpu/drm/radeon/cik.c

5133

WREG32(GMCON_RENG_EXECUTE, save->gmcon_reng_execute);

drivers/gpu/drm/radeon/cik.c

5151

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/cik.c

5154

WREG32(CP_MEC_CNTL, MEC_ME1_HALT | MEC_ME2_HALT);

drivers/gpu/drm/radeon/cik.c

5159

WREG32(SDMA0_ME_CNTL + SDMA0_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/cik.c

5163

WREG32(SDMA0_ME_CNTL + SDMA1_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/cik.c

5279

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

5280

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

5281

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

5282

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

5283

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/cik.c

5285

WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

5292

WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE);

drivers/gpu/drm/radeon/cik.c

5294

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/cik.c

5296

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/cik.c

5298

WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,

drivers/gpu/drm/radeon/cik.c

5302

WREG32(MC_VM_FB_LOCATION, tmp);

drivers/gpu/drm/radeon/cik.c

5304

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

drivers/gpu/drm/radeon/cik.c

5305

WREG32(HDP_NONSURFACE_INFO, (2 << 7) | (1 << 30));

drivers/gpu/drm/radeon/cik.c

5306

WREG32(HDP_NONSURFACE_SIZE, 0x3FFFFFFF);

drivers/gpu/drm/radeon/cik.c

5307

WREG32(MC_VM_AGP_BASE, 0);

drivers/gpu/drm/radeon/cik.c

5308

WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF);

drivers/gpu/drm/radeon/cik.c

5309

WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF);

drivers/gpu/drm/radeon/cik.c

5402

WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

5405

WREG32(VM_INVALIDATE_REQUEST, 0x1);

drivers/gpu/drm/radeon/cik.c

5431

WREG32(MC_VM_MX_L1_TLB_CNTL,

drivers/gpu/drm/radeon/cik.c

5439

WREG32(VM_L2_CNTL, ENABLE_L2_CACHE |

drivers/gpu/drm/radeon/cik.c

5445

WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE);

drivers/gpu/drm/radeon/cik.c

5446

WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY |

drivers/gpu/drm/radeon/cik.c

5450

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

drivers/gpu/drm/radeon/cik.c

5451

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

drivers/gpu/drm/radeon/cik.c

5452

WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);

drivers/gpu/drm/radeon/cik.c

5453

WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/radeon/cik.c

5455

WREG32(VM_CONTEXT0_CNTL2, 0);

drivers/gpu/drm/radeon/cik.c

5456

WREG32(VM_CONTEXT0_CNTL, (ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |

drivers/gpu/drm/radeon/cik.c

5459

WREG32(0x15D4, 0);

drivers/gpu/drm/radeon/cik.c

5460

WREG32(0x15D8, 0);

drivers/gpu/drm/radeon/cik.c

5461

WREG32(0x15DC, 0);

drivers/gpu/drm/radeon/cik.c

5465

WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

5466

WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn - 1);

drivers/gpu/drm/radeon/cik.c

5469

WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),

drivers/gpu/drm/radeon/cik.c

5472

WREG32(VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2),

drivers/gpu/drm/radeon/cik.c

5477

WREG32(VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/radeon/cik.c

5479

WREG32(VM_CONTEXT1_CNTL2, 4);

drivers/gpu/drm/radeon/cik.c

5480

WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) |

drivers/gpu/drm/radeon/cik.c

5498

WREG32(CHUB_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

5507

WREG32(SH_MEM_CONFIG, SH_MEM_CONFIG_GFX_DEFAULT);

drivers/gpu/drm/radeon/cik.c

5508

WREG32(SH_MEM_APE1_BASE, 1);

drivers/gpu/drm/radeon/cik.c

5509

WREG32(SH_MEM_APE1_LIMIT, 0);

drivers/gpu/drm/radeon/cik.c

5510

WREG32(SH_MEM_BASES, 0);

drivers/gpu/drm/radeon/cik.c

5512

WREG32(SDMA0_GFX_VIRTUAL_ADDR + SDMA0_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

5513

WREG32(SDMA0_GFX_APE1_CNTL + SDMA0_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

5514

WREG32(SDMA0_GFX_VIRTUAL_ADDR + SDMA1_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

5515

WREG32(SDMA0_GFX_APE1_CNTL + SDMA1_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

5550

WREG32(VM_CONTEXT0_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

5551

WREG32(VM_CONTEXT1_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

5553

WREG32(MC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE_NOT_IN_SYS |

drivers/gpu/drm/radeon/cik.c

5556

WREG32(VM_L2_CNTL,

drivers/gpu/drm/radeon/cik.c

5562

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/cik.c

5563

WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY |

drivers/gpu/drm/radeon/cik.c

5766

WREG32(CP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/radeon/cik.c

5778

WREG32(RLC_LB_CNTL, tmp);

drivers/gpu/drm/radeon/cik.c

5812

WREG32(RLC_CNTL, rlc);

drivers/gpu/drm/radeon/cik.c

5825

WREG32(RLC_CNTL, data);

drivers/gpu/drm/radeon/cik.c

5844

WREG32(RLC_GPR_REG2, tmp);

drivers/gpu/drm/radeon/cik.c

5865

WREG32(RLC_GPR_REG2, tmp);

drivers/gpu/drm/radeon/cik.c

5877

WREG32(RLC_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

5893

WREG32(RLC_CNTL, RLC_ENABLE);

drivers/gpu/drm/radeon/cik.c

5920

WREG32(RLC_CGCG_CGLS_CTRL, tmp);

drivers/gpu/drm/radeon/cik.c

5928

WREG32(RLC_LB_CNTR_INIT, 0);

drivers/gpu/drm/radeon/cik.c

5929

WREG32(RLC_LB_CNTR_MAX, 0x00008000);

drivers/gpu/drm/radeon/cik.c

5932

WREG32(RLC_LB_INIT_CU_MASK, 0xffffffff);

drivers/gpu/drm/radeon/cik.c

5933

WREG32(RLC_LB_PARAMS, 0x00600408);

drivers/gpu/drm/radeon/cik.c

5934

WREG32(RLC_LB_CNTL, 0x80000004);

drivers/gpu/drm/radeon/cik.c

5936

WREG32(RLC_MC_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

5937

WREG32(RLC_UCODE_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

5948

WREG32(RLC_GPM_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

5950

WREG32(RLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

5951

WREG32(RLC_GPM_UCODE_ADDR, le32_to_cpu(hdr->header.ucode_version));

drivers/gpu/drm/radeon/cik.c

5973

WREG32(RLC_GPM_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

5975

WREG32(RLC_GPM_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik.c

5976

WREG32(RLC_GPM_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/cik.c

5983

WREG32(RLC_DRIVER_DMA_STATUS, 0);

drivers/gpu/drm/radeon/cik.c

6002

WREG32(RLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/radeon/cik.c

6003

WREG32(RLC_SERDES_WR_NONCU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/radeon/cik.c

6005

WREG32(RLC_SERDES_WR_CTRL, tmp2);

drivers/gpu/drm/radeon/cik.c

6022

WREG32(RLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/radeon/cik.c

6036

WREG32(CP_MEM_SLP_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6044

WREG32(RLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/radeon/cik.c

6049

WREG32(RLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/radeon/cik.c

6050

WREG32(RLC_SERDES_WR_NONCU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/radeon/cik.c

6052

WREG32(RLC_SERDES_WR_CTRL, data);

drivers/gpu/drm/radeon/cik.c

6069

WREG32(CGTS_SM_CTRL_REG, data);

drivers/gpu/drm/radeon/cik.c

6075

WREG32(RLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/radeon/cik.c

6080

WREG32(RLC_MEM_SLP_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6086

WREG32(CP_MEM_SLP_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6092

WREG32(CGTS_SM_CTRL_REG, data);

drivers/gpu/drm/radeon/cik.c

6097

WREG32(RLC_SERDES_WR_CU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/radeon/cik.c

6098

WREG32(RLC_SERDES_WR_NONCU_MASTER_MASK, 0xffffffff);

drivers/gpu/drm/radeon/cik.c

6100

WREG32(RLC_SERDES_WR_CTRL, data);

drivers/gpu/drm/radeon/cik.c

6132

WREG32(mc_cg_registers[i], data);

drivers/gpu/drm/radeon/cik.c

6149

WREG32(mc_cg_registers[i], data);

drivers/gpu/drm/radeon/cik.c

6159

WREG32(SDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, 0x00000100);

drivers/gpu/drm/radeon/cik.c

6160

WREG32(SDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET, 0x00000100);

drivers/gpu/drm/radeon/cik.c

6165

WREG32(SDMA0_CLK_CTRL + SDMA0_REGISTER_OFFSET, data);

drivers/gpu/drm/radeon/cik.c

6170

WREG32(SDMA0_CLK_CTRL + SDMA1_REGISTER_OFFSET, data);

drivers/gpu/drm/radeon/cik.c

6183

WREG32(SDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data);

drivers/gpu/drm/radeon/cik.c

6188

WREG32(SDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data);

drivers/gpu/drm/radeon/cik.c

6193

WREG32(SDMA0_POWER_CNTL + SDMA0_REGISTER_OFFSET, data);

drivers/gpu/drm/radeon/cik.c

6198

WREG32(SDMA0_POWER_CNTL + SDMA1_REGISTER_OFFSET, data);

drivers/gpu/drm/radeon/cik.c

6215

WREG32(UVD_CGC_CTRL, data);

drivers/gpu/drm/radeon/cik.c

6224

WREG32(UVD_CGC_CTRL, data);

drivers/gpu/drm/radeon/cik.c

6259

WREG32(HDP_HOST_PATH_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6275

WREG32(HDP_MEM_POWER_LS, data);

drivers/gpu/drm/radeon/cik.c

6363

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6377

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6390

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6403

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6503

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6508

WREG32(RLC_AUTO_PG_CTRL, data);

drivers/gpu/drm/radeon/cik.c

6513

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6518

WREG32(RLC_AUTO_PG_CTRL, data);

drivers/gpu/drm/radeon/cik.c

6572

WREG32(RLC_PG_AO_CU_MASK, tmp);

drivers/gpu/drm/radeon/cik.c

6577

WREG32(RLC_MAX_PG_CU, tmp);

drivers/gpu/drm/radeon/cik.c

6591

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6605

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6617

WREG32(RLC_GPM_SCRATCH_ADDR, RLC_CLEAR_STATE_DESCRIPTOR_OFFSET);

drivers/gpu/drm/radeon/cik.c

6618

WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr));

drivers/gpu/drm/radeon/cik.c

6619

WREG32(RLC_GPM_SCRATCH_DATA, lower_32_bits(rdev->rlc.clear_state_gpu_addr));

drivers/gpu/drm/radeon/cik.c

6620

WREG32(RLC_GPM_SCRATCH_DATA, rdev->rlc.clear_state_size);

drivers/gpu/drm/radeon/cik.c

6622

WREG32(RLC_GPM_SCRATCH_ADDR, RLC_CLEAR_STATE_DESCRIPTOR_OFFSET);

drivers/gpu/drm/radeon/cik.c

6624

WREG32(RLC_GPM_SCRATCH_DATA, 0);

drivers/gpu/drm/radeon/cik.c

6627

WREG32(RLC_GPM_SCRATCH_ADDR, RLC_SAVE_AND_RESTORE_STARTING_OFFSET);

drivers/gpu/drm/radeon/cik.c

6629

WREG32(RLC_GPM_SCRATCH_DATA, rdev->rlc.reg_list[i]);

drivers/gpu/drm/radeon/cik.c

6635

WREG32(RLC_PG_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6637

WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);

drivers/gpu/drm/radeon/cik.c

6638

WREG32(RLC_CP_TABLE_RESTORE, rdev->rlc.cp_table_gpu_addr >> 8);

drivers/gpu/drm/radeon/cik.c

6643

WREG32(CP_RB_WPTR_POLL_CNTL, data);

drivers/gpu/drm/radeon/cik.c

6646

WREG32(RLC_PG_DELAY, data);

drivers/gpu/drm/radeon/cik.c

6651

WREG32(RLC_PG_DELAY_2, data);

drivers/gpu/drm/radeon/cik.c

6656

WREG32(RLC_AUTO_PG_CTRL, data);

drivers/gpu/drm/radeon/cik.c

6819

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/radeon/cik.c

6820

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/radeon/cik.c

6838

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/radeon/cik.c

6839

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/radeon/cik.c

6841

WREG32(IH_RB_RPTR, 0);

drivers/gpu/drm/radeon/cik.c

6842

WREG32(IH_RB_WPTR, 0);

drivers/gpu/drm/radeon/cik.c

6861

WREG32(CP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/radeon/cik.c

6864

WREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/cik.c

6866

WREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/cik.c

6868

WREG32(CP_ME1_PIPE0_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6869

WREG32(CP_ME1_PIPE1_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6870

WREG32(CP_ME1_PIPE2_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6871

WREG32(CP_ME1_PIPE3_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6872

WREG32(CP_ME2_PIPE0_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6873

WREG32(CP_ME2_PIPE1_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6874

WREG32(CP_ME2_PIPE2_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6875

WREG32(CP_ME2_PIPE3_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6877

WREG32(GRBM_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6879

WREG32(SRBM_INT_CNTL, 0);

drivers/gpu/drm/radeon/cik.c

6881

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6882

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6884

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC2_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6885

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6888

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6889

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6893

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6894

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6897

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6898

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6901

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6902

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik.c

6906

WREG32(DAC_AUTODETECT_INT_CONTROL, 0);

drivers/gpu/drm/radeon/cik.c

6910

WREG32(DC_HPD1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

6912

WREG32(DC_HPD2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

6914

WREG32(DC_HPD3_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

6916

WREG32(DC_HPD4_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

6918

WREG32(DC_HPD5_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

6920

WREG32(DC_HPD6_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

6958

WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);

drivers/gpu/drm/radeon/cik.c

6966

WREG32(INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/radeon/cik.c

6968

WREG32(IH_RB_BASE, rdev->ih.gpu_addr >> 8);

drivers/gpu/drm/radeon/cik.c

6979

WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC);

drivers/gpu/drm/radeon/cik.c

6980

WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF);

drivers/gpu/drm/radeon/cik.c

6982

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/radeon/cik.c

6985

WREG32(IH_RB_RPTR, 0);

drivers/gpu/drm/radeon/cik.c

6986

WREG32(IH_RB_WPTR, 0);

drivers/gpu/drm/radeon/cik.c

6993

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/radeon/cik.c

7217

WREG32(CP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/radeon/cik.c

7219

WREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET, dma_cntl);

drivers/gpu/drm/radeon/cik.c

7220

WREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET, dma_cntl1);

drivers/gpu/drm/radeon/cik.c

7222

WREG32(CP_ME1_PIPE0_INT_CNTL, cp_m1p0);

drivers/gpu/drm/radeon/cik.c

7223

WREG32(CP_ME1_PIPE1_INT_CNTL, cp_m1p1);

drivers/gpu/drm/radeon/cik.c

7224

WREG32(CP_ME1_PIPE2_INT_CNTL, cp_m1p2);

drivers/gpu/drm/radeon/cik.c

7225

WREG32(CP_ME1_PIPE3_INT_CNTL, cp_m1p3);

drivers/gpu/drm/radeon/cik.c

7226

WREG32(CP_ME2_PIPE0_INT_CNTL, cp_m2p0);

drivers/gpu/drm/radeon/cik.c

7227

WREG32(CP_ME2_PIPE1_INT_CNTL, cp_m2p1);

drivers/gpu/drm/radeon/cik.c

7228

WREG32(CP_ME2_PIPE2_INT_CNTL, cp_m2p2);

drivers/gpu/drm/radeon/cik.c

7229

WREG32(CP_ME2_PIPE3_INT_CNTL, cp_m2p3);

drivers/gpu/drm/radeon/cik.c

7231

WREG32(GRBM_INT_CNTL, grbm_int_cntl);

drivers/gpu/drm/radeon/cik.c

7233

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, crtc1);

drivers/gpu/drm/radeon/cik.c

7234

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, crtc2);

drivers/gpu/drm/radeon/cik.c

7236

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC2_REGISTER_OFFSET, crtc3);

drivers/gpu/drm/radeon/cik.c

7237

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC3_REGISTER_OFFSET, crtc4);

drivers/gpu/drm/radeon/cik.c

7240

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, crtc5);

drivers/gpu/drm/radeon/cik.c

7241

WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6);

drivers/gpu/drm/radeon/cik.c

7245

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7247

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7251

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7253

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7257

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7259

WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7263

WREG32(DC_HPD1_INT_CONTROL, hpd1);

drivers/gpu/drm/radeon/cik.c

7264

WREG32(DC_HPD2_INT_CONTROL, hpd2);

drivers/gpu/drm/radeon/cik.c

7265

WREG32(DC_HPD3_INT_CONTROL, hpd3);

drivers/gpu/drm/radeon/cik.c

7266

WREG32(DC_HPD4_INT_CONTROL, hpd4);

drivers/gpu/drm/radeon/cik.c

7267

WREG32(DC_HPD5_INT_CONTROL, hpd5);

drivers/gpu/drm/radeon/cik.c

7268

WREG32(DC_HPD6_INT_CONTROL, hpd6);

drivers/gpu/drm/radeon/cik.c

7315

WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7318

WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7321

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7323

WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VLINE_ACK);

drivers/gpu/drm/radeon/cik.c

7325

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7327

WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK);

drivers/gpu/drm/radeon/cik.c

7331

WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7334

WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7337

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7339

WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VLINE_ACK);

drivers/gpu/drm/radeon/cik.c

7341

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7343

WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VLINE_ACK);

drivers/gpu/drm/radeon/cik.c

7348

WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7351

WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET,

drivers/gpu/drm/radeon/cik.c

7354

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7356

WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VLINE_ACK);

drivers/gpu/drm/radeon/cik.c

7358

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7360

WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VLINE_ACK);

drivers/gpu/drm/radeon/cik.c

7366

WREG32(DC_HPD1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7371

WREG32(DC_HPD2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7376

WREG32(DC_HPD3_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7381

WREG32(DC_HPD4_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7386

WREG32(DC_HPD5_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7391

WREG32(DC_HPD6_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7396

WREG32(DC_HPD1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7401

WREG32(DC_HPD2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7406

WREG32(DC_HPD3_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7411

WREG32(DC_HPD4_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7416

WREG32(DC_HPD5_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7421

WREG32(DC_HPD6_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/cik.c

7501

WREG32(IH_RB_CNTL, tmp);

drivers/gpu/drm/radeon/cik.c

7888

WREG32(SRBM_INT_ACK, 0x1);

drivers/gpu/drm/radeon/cik.c

8083

WREG32(IH_RB_RPTR, rptr);

drivers/gpu/drm/radeon/cik.c

8802

WREG32(FMT_BIT_DEPTH_CONTROL + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/cik.c

8852

WREG32(LB_MEMORY_CTRL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/cik.c

8855

WREG32(PIPE0_DMIF_BUFFER_CONTROL + pipe_offset,

drivers/gpu/drm/radeon/cik.c

9354

WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/cik.c

9355

WREG32(DPG_PIPE_LATENCY_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/cik.c

9362

WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/cik.c

9363

WREG32(DPG_PIPE_LATENCY_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/cik.c

9367

WREG32(DPG_WATERMARK_MASK_CONTROL + radeon_crtc->crtc_offset, wm_mask);

drivers/gpu/drm/radeon/cik.c

9418

WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);

drivers/gpu/drm/radeon/cik_sdma.c

120

WREG32(reg, (ring->wptr << 2) & 0x3fffc);

drivers/gpu/drm/radeon/cik_sdma.c

265

WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl);

drivers/gpu/drm/radeon/cik_sdma.c

266

WREG32(SDMA0_GFX_IB_CNTL + reg_offset, 0);

drivers/gpu/drm/radeon/cik_sdma.c

276

WREG32(SRBM_SOFT_RESET, SOFT_RESET_SDMA | SOFT_RESET_SDMA1);

drivers/gpu/drm/radeon/cik_sdma.c

279

WREG32(SRBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/cik_sdma.c

318

WREG32(SDMA0_CNTL + reg_offset, value);

drivers/gpu/drm/radeon/cik_sdma.c

350

WREG32(SDMA0_ME_CNTL + reg_offset, me_cntl);

drivers/gpu/drm/radeon/cik_sdma.c

383

WREG32(SDMA0_SEM_INCOMPLETE_TIMER_CNTL + reg_offset, 0);

drivers/gpu/drm/radeon/cik_sdma.c

384

WREG32(SDMA0_SEM_WAIT_FAIL_TIMER_CNTL + reg_offset, 0);

drivers/gpu/drm/radeon/cik_sdma.c

392

WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl);

drivers/gpu/drm/radeon/cik_sdma.c

395

WREG32(SDMA0_GFX_RB_RPTR + reg_offset, 0);

drivers/gpu/drm/radeon/cik_sdma.c

396

WREG32(SDMA0_GFX_RB_WPTR + reg_offset, 0);

drivers/gpu/drm/radeon/cik_sdma.c

399

WREG32(SDMA0_GFX_RB_RPTR_ADDR_HI + reg_offset,

drivers/gpu/drm/radeon/cik_sdma.c

401

WREG32(SDMA0_GFX_RB_RPTR_ADDR_LO + reg_offset,

drivers/gpu/drm/radeon/cik_sdma.c

407

WREG32(SDMA0_GFX_RB_BASE + reg_offset, ring->gpu_addr >> 8);

drivers/gpu/drm/radeon/cik_sdma.c

408

WREG32(SDMA0_GFX_RB_BASE_HI + reg_offset, ring->gpu_addr >> 40);

drivers/gpu/drm/radeon/cik_sdma.c

411

WREG32(SDMA0_GFX_RB_WPTR + reg_offset, ring->wptr << 2);

drivers/gpu/drm/radeon/cik_sdma.c

414

WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl | SDMA_RB_ENABLE);

drivers/gpu/drm/radeon/cik_sdma.c

421

WREG32(SDMA0_GFX_IB_CNTL + reg_offset, ib_cntl);

drivers/gpu/drm/radeon/cik_sdma.c

483

WREG32(SDMA0_UCODE_ADDR + SDMA0_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik_sdma.c

485

WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik_sdma.c

486

WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, CIK_SDMA_UCODE_VERSION);

drivers/gpu/drm/radeon/cik_sdma.c

492

WREG32(SDMA0_UCODE_ADDR + SDMA1_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik_sdma.c

494

WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik_sdma.c

495

WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, CIK_SDMA_UCODE_VERSION);

drivers/gpu/drm/radeon/cik_sdma.c

501

WREG32(SDMA0_UCODE_ADDR + SDMA0_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik_sdma.c

503

WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik_sdma.c

504

WREG32(SDMA0_UCODE_DATA + SDMA0_REGISTER_OFFSET, CIK_SDMA_UCODE_VERSION);

drivers/gpu/drm/radeon/cik_sdma.c

508

WREG32(SDMA0_UCODE_ADDR + SDMA1_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik_sdma.c

510

WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/cik_sdma.c

511

WREG32(SDMA0_UCODE_DATA + SDMA1_REGISTER_OFFSET, CIK_SDMA_UCODE_VERSION);

drivers/gpu/drm/radeon/cik_sdma.c

514

WREG32(SDMA0_UCODE_ADDR + SDMA0_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cik_sdma.c

515

WREG32(SDMA0_UCODE_ADDR + SDMA1_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/cypress_dpm.c

1135

WREG32(MC_CONFIG_MCD, 0xf);

drivers/gpu/drm/radeon/cypress_dpm.c

1136

WREG32(MC_CG_CONFIG_MCD, 0xf);

drivers/gpu/drm/radeon/cypress_dpm.c

1138

WREG32(MC_CONFIG, 0xf);

drivers/gpu/drm/radeon/cypress_dpm.c

1139

WREG32(MC_CG_CONFIG, 0xf);

drivers/gpu/drm/radeon/cypress_dpm.c

1145

WREG32(MC_SEQ_CG, MC_CG_SEQ_YCLK_SUSPEND);

drivers/gpu/drm/radeon/cypress_dpm.c

1153

WREG32(MC_SEQ_CG, mc_seq_cg);

drivers/gpu/drm/radeon/cypress_dpm.c

1163

WREG32(MC_SEQ_CG, mc_seq_cg);

drivers/gpu/drm/radeon/cypress_dpm.c

1176

WREG32(eg_pi->mc_reg_table.mc_reg_address[i].s0 << 2, value);

drivers/gpu/drm/radeon/cypress_dpm.c

1193

WREG32(MC_CONFIG_MCD, 0xf);

drivers/gpu/drm/radeon/cypress_dpm.c

1194

WREG32(MC_CG_CONFIG_MCD, 0xf);

drivers/gpu/drm/radeon/cypress_dpm.c

1196

WREG32(MC_CONFIG, 0xf);

drivers/gpu/drm/radeon/cypress_dpm.c

1197

WREG32(MC_CG_CONFIG, 0xf);

drivers/gpu/drm/radeon/cypress_dpm.c

1203

WREG32(MC_SEQ_CG, MC_CG_SEQ_YCLK_SUSPEND);

drivers/gpu/drm/radeon/cypress_dpm.c

1211

WREG32(MC_SEQ_CG, mc_seq_cg);

drivers/gpu/drm/radeon/cypress_dpm.c

1221

WREG32(MC_SEQ_CG, mc_seq_cg);

drivers/gpu/drm/radeon/cypress_dpm.c

125

WREG32(GRBM_GFX_INDEX, 0xC0000000);

drivers/gpu/drm/radeon/cypress_dpm.c

152

WREG32(GRBM_GFX_INDEX, 0xC0000000);

drivers/gpu/drm/radeon/cypress_dpm.c

1742

WREG32(CG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/radeon/cypress_dpm.c

1761

WREG32(CG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/radeon/cypress_dpm.c

1780

WREG32(DCCG_DISP_SLOW_SELECT_REG, tmp);

drivers/gpu/drm/radeon/cypress_dpm.c

186

WREG32(GRBM_GFX_INDEX, 0xC0000000);

drivers/gpu/drm/radeon/cypress_dpm.c

194

WREG32(CGTS_SM_CTRL_REG, cgts_sm_ctrl_reg);

drivers/gpu/drm/radeon/cypress_dpm.c

207

WREG32(GRBM_GFX_INDEX, 0xC0000000);

drivers/gpu/drm/radeon/cypress_dpm.c

215

WREG32(CGTS_SM_CTRL_REG, 0x81f44bc0);

drivers/gpu/drm/radeon/cypress_dpm.c

61

WREG32(CG_BIF_REQ_AND_RSP, bif);

drivers/gpu/drm/radeon/cypress_dpm.c

947

WREG32(MC_ARB_BURST_TIME, mc_arb_burst_time);

drivers/gpu/drm/radeon/dce3_1_afmt.c

157

WREG32(DCCG_AUDIO_DTO0_CNTL, dto_cntl);

drivers/gpu/drm/radeon/dce3_1_afmt.c

158

WREG32(DCCG_AUDIO_DTO0_PHASE, dto_phase);

drivers/gpu/drm/radeon/dce3_1_afmt.c

159

WREG32(DCCG_AUDIO_DTO0_MODULE, clock);

drivers/gpu/drm/radeon/dce3_1_afmt.c

160

WREG32(DCCG_AUDIO_DTO_SELECT, 0); /* select DTO0 */

drivers/gpu/drm/radeon/dce3_1_afmt.c

164

WREG32(DCCG_AUDIO_DTO1_CNTL, dto_cntl);

drivers/gpu/drm/radeon/dce3_1_afmt.c

165

WREG32(DCCG_AUDIO_DTO1_PHASE, dto_phase);

drivers/gpu/drm/radeon/dce3_1_afmt.c

166

WREG32(DCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/radeon/dce3_1_afmt.c

167

WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */

drivers/gpu/drm/radeon/dce3_1_afmt.c

177

WREG32(DCE3_HDMI0_ACR_PACKET_CONTROL + offset,

drivers/gpu/drm/radeon/dce3_1_afmt.c

208

WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,

drivers/gpu/drm/radeon/dce3_1_afmt.c

212

WREG32(AFMT_AUDIO_PACKET_CONTROL + offset,

drivers/gpu/drm/radeon/dce6_afmt.c

121

WREG32(AFMT_AUDIO_SRC_CONTROL + dig->afmt->offset,

drivers/gpu/drm/radeon/dce6_afmt.c

279

WREG32(DCCG_AUDIO_DTO_SOURCE, value);

drivers/gpu/drm/radeon/dce6_afmt.c

285

WREG32(DCCG_AUDIO_DTO0_PHASE, 24000);

drivers/gpu/drm/radeon/dce6_afmt.c

286

WREG32(DCCG_AUDIO_DTO0_MODULE, clock);

drivers/gpu/drm/radeon/dce6_afmt.c

299

WREG32(DCCG_AUDIO_DTO_SOURCE, value);

drivers/gpu/drm/radeon/dce6_afmt.c

314

WREG32(DCE8_DCCG_AUDIO_DTO1_PHASE, 24000);

drivers/gpu/drm/radeon/dce6_afmt.c

315

WREG32(DCE8_DCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/radeon/dce6_afmt.c

317

WREG32(DCCG_AUDIO_DTO1_PHASE, 24000);

drivers/gpu/drm/radeon/dce6_afmt.c

318

WREG32(DCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/radeon/dce6_afmt.c

41

WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, reg);

drivers/gpu/drm/radeon/dce6_afmt.c

55

WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset, reg);

drivers/gpu/drm/radeon/dce6_afmt.c

57

WREG32(AZ_F0_CODEC_ENDPOINT_INDEX + block_offset,

drivers/gpu/drm/radeon/dce6_afmt.c

59

WREG32(AZ_F0_CODEC_ENDPOINT_DATA + block_offset, v);

drivers/gpu/drm/radeon/evergreen.c

107

WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff));

drivers/gpu/drm/radeon/evergreen.c

118

WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff));

drivers/gpu/drm/radeon/evergreen.c

1184

WREG32(CG_SCRATCH1, cg_scratch);

drivers/gpu/drm/radeon/evergreen.c

119

WREG32(EVERGREEN_PIF_PHY1_DATA, (v));

drivers/gpu/drm/radeon/evergreen.c

1345

WREG32(FMT_BIT_DEPTH_CONTROL + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/evergreen.c

1423

WREG32(EVERGREEN_GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/evergreen.c

1426

WREG32(EVERGREEN_GRPH_PITCH + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/evergreen.c

1429

WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/evergreen.c

1431

WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/evergreen.c

1688

WREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/evergreen.c

1713

WREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/evergreen.c

1790

WREG32(DC_HPDx_CONTROL(hpd), tmp);

drivers/gpu/drm/radeon/evergreen.c

1819

WREG32(DC_HPDx_CONTROL(hpd), 0);

drivers/gpu/drm/radeon/evergreen.c

1871

WREG32(DC_LB_MEMORY_SPLIT + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/evergreen.c

1874

WREG32(PIPE0_DMIF_BUFFER_CONTROL + pipe_offset,

drivers/gpu/drm/radeon/evergreen.c

2293

WREG32(PIPE0_ARBITRATION_CONTROL3 + pipe_offset, tmp);

drivers/gpu/drm/radeon/evergreen.c

2294

WREG32(PIPE0_LATENCY_CONTROL + pipe_offset,

drivers/gpu/drm/radeon/evergreen.c

2301

WREG32(PIPE0_ARBITRATION_CONTROL3 + pipe_offset, tmp);

drivers/gpu/drm/radeon/evergreen.c

2302

WREG32(PIPE0_LATENCY_CONTROL + pipe_offset,

drivers/gpu/drm/radeon/evergreen.c

2306

WREG32(PIPE0_ARBITRATION_CONTROL3 + pipe_offset, arb_control3);

drivers/gpu/drm/radeon/evergreen.c

2309

WREG32(PRIORITY_A_CNT + radeon_crtc->crtc_offset, priority_a_cnt);

drivers/gpu/drm/radeon/evergreen.c

2310

WREG32(PRIORITY_B_CNT + radeon_crtc->crtc_offset, priority_b_cnt);

drivers/gpu/drm/radeon/evergreen.c

2384

WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);

drivers/gpu/drm/radeon/evergreen.c

2386

WREG32(VM_CONTEXT0_REQUEST_RESPONSE, REQUEST_TYPE(1));

drivers/gpu/drm/radeon/evergreen.c

2416

WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/evergreen.c

2419

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/evergreen.c

2420

WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));

drivers/gpu/drm/radeon/evergreen.c

2427

WREG32(FUS_MC_VM_MD_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2428

WREG32(FUS_MC_VM_MD_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2429

WREG32(FUS_MC_VM_MD_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2431

WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2432

WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2433

WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2438

WREG32(MC_VM_MD_L1_TLB3_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2440

WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2441

WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2442

WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2443

WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2444

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

drivers/gpu/drm/radeon/evergreen.c

2445

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

drivers/gpu/drm/radeon/evergreen.c

2446

WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);

drivers/gpu/drm/radeon/evergreen.c

2447

WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |

drivers/gpu/drm/radeon/evergreen.c

2449

WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/radeon/evergreen.c

2451

WREG32(VM_CONTEXT1_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

2466

WREG32(VM_CONTEXT0_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

2467

WREG32(VM_CONTEXT1_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

2470

WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/evergreen.c

2472

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/evergreen.c

2473

WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));

drivers/gpu/drm/radeon/evergreen.c

2476

WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2477

WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2478

WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2479

WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2480

WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2481

WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2482

WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2499

WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/evergreen.c

2502

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/evergreen.c

2503

WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));

drivers/gpu/drm/radeon/evergreen.c

2509

WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2510

WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2511

WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2512

WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2513

WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2514

WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2515

WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2516

WREG32(VM_CONTEXT0_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

2517

WREG32(VM_CONTEXT1_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

2647

WREG32(EVERGREEN_DP_VID_STREAM_CNTL +

drivers/gpu/drm/radeon/evergreen.c

2663

WREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe], fifo_ctrl);

drivers/gpu/drm/radeon/evergreen.c

2678

WREG32(VGA_RENDER_CONTROL, 0);

drivers/gpu/drm/radeon/evergreen.c

2689

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/radeon/evergreen.c

2691

WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2692

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/evergreen.c

2698

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/radeon/evergreen.c

2700

WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2701

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/evergreen.c

2723

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/radeon/evergreen.c

2726

WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2727

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/evergreen.c

2740

WREG32(BIF_FB_EN, 0);

drivers/gpu/drm/radeon/evergreen.c

2743

WREG32(MC_SHARED_BLACKOUT_CNTL, blackout | 1);

drivers/gpu/drm/radeon/evergreen.c

2754

WREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2759

WREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2772

WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + crtc_offsets[i],

drivers/gpu/drm/radeon/evergreen.c

2774

WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + crtc_offsets[i],

drivers/gpu/drm/radeon/evergreen.c

2776

WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + crtc_offsets[i],

drivers/gpu/drm/radeon/evergreen.c

2778

WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + crtc_offsets[i],

drivers/gpu/drm/radeon/evergreen.c

2783

WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH, upper_32_bits(rdev->mc.vram_start));

drivers/gpu/drm/radeon/evergreen.c

2784

WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start);

drivers/gpu/drm/radeon/evergreen.c

2793

WREG32(EVERGREEN_MASTER_UPDATE_MODE + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2798

WREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2803

WREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2817

WREG32(MC_SHARED_BLACKOUT_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

2819

WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN);

drivers/gpu/drm/radeon/evergreen.c

2826

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/radeon/evergreen.c

2827

WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2828

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/evergreen.c

2832

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/radeon/evergreen.c

2833

WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/evergreen.c

2834

WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/evergreen.c

2847

WREG32(VGA_HDP_CONTROL, save->vga_hdp_control);

drivers/gpu/drm/radeon/evergreen.c

2849

WREG32(VGA_RENDER_CONTROL, save->vga_render_control);

drivers/gpu/drm/radeon/evergreen.c

2861

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

2862

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

2863

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

2864

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

2865

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

2867

WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

2874

WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE);

drivers/gpu/drm/radeon/evergreen.c

2879

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/evergreen.c

2881

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/evergreen.c

2885

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/evergreen.c

2887

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/evergreen.c

2891

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/evergreen.c

2893

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/evergreen.c

2896

WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, rdev->vram_scratch.gpu_addr >> 12);

drivers/gpu/drm/radeon/evergreen.c

2904

WREG32(MC_FUS_VM_FB_OFFSET, tmp);

drivers/gpu/drm/radeon/evergreen.c

2908

WREG32(MC_VM_FB_LOCATION, tmp);

drivers/gpu/drm/radeon/evergreen.c

2909

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

drivers/gpu/drm/radeon/evergreen.c

2910

WREG32(HDP_NONSURFACE_INFO, (2 << 7) | (1 << 30));

drivers/gpu/drm/radeon/evergreen.c

2911

WREG32(HDP_NONSURFACE_SIZE, 0x3FFFFFFF);

drivers/gpu/drm/radeon/evergreen.c

2913

WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16);

drivers/gpu/drm/radeon/evergreen.c

2914

WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16);

drivers/gpu/drm/radeon/evergreen.c

2915

WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

drivers/gpu/drm/radeon/evergreen.c

2917

WREG32(MC_VM_AGP_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

2918

WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF);

drivers/gpu/drm/radeon/evergreen.c

2919

WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF);

drivers/gpu/drm/radeon/evergreen.c

2977

WREG32(CP_RB_CNTL,

drivers/gpu/drm/radeon/evergreen.c

2984

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

2986

WREG32(CP_PFP_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/evergreen.c

2987

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

2990

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

2992

WREG32(CP_ME_RAM_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/evergreen.c

2994

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

2995

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

2996

WREG32(CP_ME_RAM_RADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

3022

WREG32(CP_ME_CNTL, cp_me);

drivers/gpu/drm/radeon/evergreen.c

3075

WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP |

drivers/gpu/drm/radeon/evergreen.c

3083

WREG32(GRBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/evergreen.c

3092

WREG32(CP_RB_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

3093

WREG32(CP_SEM_WAIT_TIMER, 0x0);

drivers/gpu/drm/radeon/evergreen.c

3094

WREG32(CP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);

drivers/gpu/drm/radeon/evergreen.c

3097

WREG32(CP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/radeon/evergreen.c

3100

WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA);

drivers/gpu/drm/radeon/evergreen.c

3101

WREG32(CP_RB_RPTR_WR, 0);

drivers/gpu/drm/radeon/evergreen.c

3103

WREG32(CP_RB_WPTR, ring->wptr);

drivers/gpu/drm/radeon/evergreen.c

3106

WREG32(CP_RB_RPTR_ADDR,

drivers/gpu/drm/radeon/evergreen.c

3108

WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF);

drivers/gpu/drm/radeon/evergreen.c

3109

WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF);

drivers/gpu/drm/radeon/evergreen.c

3112

WREG32(SCRATCH_UMSK, 0xff);

drivers/gpu/drm/radeon/evergreen.c

3115

WREG32(SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/evergreen.c

3119

WREG32(CP_RB_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

3121

WREG32(CP_RB_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/radeon/evergreen.c

3122

WREG32(CP_DEBUG, (1 << 27) | (1 << 28));

drivers/gpu/drm/radeon/evergreen.c

3391

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

3392

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

3393

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

3394

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

3395

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

3398

WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));

drivers/gpu/drm/radeon/evergreen.c

3399

WREG32(SRBM_INT_CNTL, 0x1);

drivers/gpu/drm/radeon/evergreen.c

3400

WREG32(SRBM_INT_ACK, 0x1);

drivers/gpu/drm/radeon/evergreen.c

3469

WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));

drivers/gpu/drm/radeon/evergreen.c

3470

WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));

drivers/gpu/drm/radeon/evergreen.c

3490

WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));

drivers/gpu/drm/radeon/evergreen.c

3491

WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));

drivers/gpu/drm/radeon/evergreen.c

3499

WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);

drivers/gpu/drm/radeon/evergreen.c

3500

WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);

drivers/gpu/drm/radeon/evergreen.c

3502

WREG32(GB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/evergreen.c

3503

WREG32(DMIF_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/evergreen.c

3504

WREG32(HDP_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/evergreen.c

3505

WREG32(DMA_TILING_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/evergreen.c

3506

WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/evergreen.c

3507

WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/evergreen.c

3508

WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/evergreen.c

3525

WREG32(GB_BACKEND_MAP, tmp);

drivers/gpu/drm/radeon/evergreen.c

3527

WREG32(CGTS_SYS_TCC_DISABLE, 0);

drivers/gpu/drm/radeon/evergreen.c

3528

WREG32(CGTS_TCC_DISABLE, 0);

drivers/gpu/drm/radeon/evergreen.c

3529

WREG32(CGTS_USER_SYS_TCC_DISABLE, 0);

drivers/gpu/drm/radeon/evergreen.c

3530

WREG32(CGTS_USER_TCC_DISABLE, 0);

drivers/gpu/drm/radeon/evergreen.c

3533

WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) |

drivers/gpu/drm/radeon/evergreen.c

3536

WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30));

drivers/gpu/drm/radeon/evergreen.c

3538

WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO |

drivers/gpu/drm/radeon/evergreen.c

3545

WREG32(SX_DEBUG_1, sx_debug_1);

drivers/gpu/drm/radeon/evergreen.c

3551

WREG32(SMX_DC_CTL0, smx_dc_ctl0);

drivers/gpu/drm/radeon/evergreen.c

3554

WREG32(SMX_SAR_CTL0, 0x00010000);

drivers/gpu/drm/radeon/evergreen.c

3556

WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_size / 4) - 1) |

drivers/gpu/drm/radeon/evergreen.c

3560

WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.evergreen.sc_prim_fifo_size) |

drivers/gpu/drm/radeon/evergreen.c

3564

WREG32(VGT_NUM_INSTANCES, 1);

drivers/gpu/drm/radeon/evergreen.c

3565

WREG32(SPI_CONFIG_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

3566

WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4));

drivers/gpu/drm/radeon/evergreen.c

3567

WREG32(CP_PERFMON_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

3569

WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.evergreen.sq_num_cf_insts) |

drivers/gpu/drm/radeon/evergreen.c

3635

WREG32(SQ_CONFIG, sq_config);

drivers/gpu/drm/radeon/evergreen.c

3636

WREG32(SQ_GPR_RESOURCE_MGMT_1, sq_gpr_resource_mgmt_1);

drivers/gpu/drm/radeon/evergreen.c

3637

WREG32(SQ_GPR_RESOURCE_MGMT_2, sq_gpr_resource_mgmt_2);

drivers/gpu/drm/radeon/evergreen.c

3638

WREG32(SQ_GPR_RESOURCE_MGMT_3, sq_gpr_resource_mgmt_3);

drivers/gpu/drm/radeon/evergreen.c

3639

WREG32(SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt);

drivers/gpu/drm/radeon/evergreen.c

3640

WREG32(SQ_THREAD_RESOURCE_MGMT_2, sq_thread_resource_mgmt_2);

drivers/gpu/drm/radeon/evergreen.c

3641

WREG32(SQ_STACK_RESOURCE_MGMT_1, sq_stack_resource_mgmt_1);

drivers/gpu/drm/radeon/evergreen.c

3642

WREG32(SQ_STACK_RESOURCE_MGMT_2, sq_stack_resource_mgmt_2);

drivers/gpu/drm/radeon/evergreen.c

3643

WREG32(SQ_STACK_RESOURCE_MGMT_3, sq_stack_resource_mgmt_3);

drivers/gpu/drm/radeon/evergreen.c

3644

WREG32(SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0);

drivers/gpu/drm/radeon/evergreen.c

3645

WREG32(SQ_LDS_RESOURCE_MGMT, sq_lds_resource_mgmt);

drivers/gpu/drm/radeon/evergreen.c

3647

WREG32(PA_SC_FORCE_EOV_MAX_CNTS, (FORCE_EOV_MAX_CLK_CNT(4095) |

drivers/gpu/drm/radeon/evergreen.c

3663

WREG32(VGT_CACHE_INVALIDATION, vgt_cache_invalidation);

drivers/gpu/drm/radeon/evergreen.c

3665

WREG32(VGT_GS_VERTEX_REUSE, 16);

drivers/gpu/drm/radeon/evergreen.c

3666

WREG32(PA_SU_LINE_STIPPLE_VALUE, 0);

drivers/gpu/drm/radeon/evergreen.c

3667

WREG32(PA_SC_LINE_STIPPLE_STATE, 0);

drivers/gpu/drm/radeon/evergreen.c

3669

WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, 14);

drivers/gpu/drm/radeon/evergreen.c

3670

WREG32(VGT_OUT_DEALLOC_CNTL, 16);

drivers/gpu/drm/radeon/evergreen.c

3672

WREG32(CB_PERF_CTR0_SEL_0, 0);

drivers/gpu/drm/radeon/evergreen.c

3673

WREG32(CB_PERF_CTR0_SEL_1, 0);

drivers/gpu/drm/radeon/evergreen.c

3674

WREG32(CB_PERF_CTR1_SEL_0, 0);

drivers/gpu/drm/radeon/evergreen.c

3675

WREG32(CB_PERF_CTR1_SEL_1, 0);

drivers/gpu/drm/radeon/evergreen.c

3676

WREG32(CB_PERF_CTR2_SEL_0, 0);

drivers/gpu/drm/radeon/evergreen.c

3677

WREG32(CB_PERF_CTR2_SEL_1, 0);

drivers/gpu/drm/radeon/evergreen.c

3678

WREG32(CB_PERF_CTR3_SEL_0, 0);

drivers/gpu/drm/radeon/evergreen.c

3679

WREG32(CB_PERF_CTR3_SEL_1, 0);

drivers/gpu/drm/radeon/evergreen.c

3682

WREG32(CB_COLOR0_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3683

WREG32(CB_COLOR1_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3684

WREG32(CB_COLOR2_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3685

WREG32(CB_COLOR3_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3686

WREG32(CB_COLOR4_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3687

WREG32(CB_COLOR5_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3688

WREG32(CB_COLOR6_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3689

WREG32(CB_COLOR7_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3690

WREG32(CB_COLOR8_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3691

WREG32(CB_COLOR9_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3692

WREG32(CB_COLOR10_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3693

WREG32(CB_COLOR11_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

3697

WREG32(i, 0);

drivers/gpu/drm/radeon/evergreen.c

3699

WREG32(i, 0);

drivers/gpu/drm/radeon/evergreen.c

3703

WREG32(HDP_MISC_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

3706

WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl);

drivers/gpu/drm/radeon/evergreen.c

3708

WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3));

drivers/gpu/drm/radeon/evergreen.c

3914

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);

drivers/gpu/drm/radeon/evergreen.c

3920

WREG32(DMA_RB_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

3981

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/evergreen.c

3987

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/evergreen.c

3995

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/evergreen.c

4001

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/evergreen.c

4024

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);

drivers/gpu/drm/radeon/evergreen.c

4029

WREG32(DMA_RB_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

4383

WREG32(RLC_CNTL, mask);

drivers/gpu/drm/radeon/evergreen.c

4396

WREG32(RLC_HB_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

4407

WREG32(TN_RLC_LB_ALWAYS_ACTIVE_SIMD_MASK, always_on_bitmap);

drivers/gpu/drm/radeon/evergreen.c

4408

WREG32(TN_RLC_LB_PARAMS, 0x00601004);

drivers/gpu/drm/radeon/evergreen.c

4409

WREG32(TN_RLC_LB_INIT_SIMD_MASK, 0xffffffff);

drivers/gpu/drm/radeon/evergreen.c

4410

WREG32(TN_RLC_LB_CNTR_INIT, 0x00000000);

drivers/gpu/drm/radeon/evergreen.c

4411

WREG32(TN_RLC_LB_CNTR_MAX, 0x00002000);

drivers/gpu/drm/radeon/evergreen.c

4414

WREG32(RLC_HB_WPTR_LSB_ADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

4415

WREG32(RLC_HB_WPTR_MSB_ADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

4417

WREG32(TN_RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);

drivers/gpu/drm/radeon/evergreen.c

4418

WREG32(TN_RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);

drivers/gpu/drm/radeon/evergreen.c

4420

WREG32(RLC_HB_BASE, 0);

drivers/gpu/drm/radeon/evergreen.c

4421

WREG32(RLC_HB_RPTR, 0);

drivers/gpu/drm/radeon/evergreen.c

4422

WREG32(RLC_HB_WPTR, 0);

drivers/gpu/drm/radeon/evergreen.c

4423

WREG32(RLC_HB_WPTR_LSB_ADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

4424

WREG32(RLC_HB_WPTR_MSB_ADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

4426

WREG32(RLC_MC_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

4427

WREG32(RLC_UCODE_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

4432

WREG32(RLC_UCODE_ADDR, i);

drivers/gpu/drm/radeon/evergreen.c

4433

WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/evergreen.c

4437

WREG32(RLC_UCODE_ADDR, i);

drivers/gpu/drm/radeon/evergreen.c

4438

WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/evergreen.c

4442

WREG32(RLC_UCODE_ADDR, i);

drivers/gpu/drm/radeon/evergreen.c

4443

WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/evergreen.c

4446

WREG32(RLC_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/evergreen.c

4474

WREG32(CAYMAN_DMA1_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

4476

WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);

drivers/gpu/drm/radeon/evergreen.c

4478

WREG32(DMA_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

4479

WREG32(GRBM_INT_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

4480

WREG32(SRBM_INT_CNTL, 0);

drivers/gpu/drm/radeon/evergreen.c

4482

WREG32(INT_MASK + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/evergreen.c

4484

WREG32(GRPH_INT_CONTROL + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/evergreen.c

4488

WREG32(DACA_AUTODETECT_INT_CONTROL, 0);

drivers/gpu/drm/radeon/evergreen.c

4489

WREG32(DACB_AUTODETECT_INT_CONTROL, 0);

drivers/gpu/drm/radeon/evergreen.c

4572

WREG32(CP_INT_CNTL, cp_int_cntl);

drivers/gpu/drm/radeon/evergreen.c

4574

WREG32(DMA_CNTL, dma_cntl);

drivers/gpu/drm/radeon/evergreen.c

4577

WREG32(CAYMAN_DMA1_CNTL, dma_cntl1);

drivers/gpu/drm/radeon/evergreen.c

4579

WREG32(GRBM_INT_CNTL, grbm_int_cntl);

drivers/gpu/drm/radeon/evergreen.c

4590

WREG32(GRPH_INT_CONTROL + crtc_offsets[i], GRPH_PFLIP_INT_MASK);

drivers/gpu/drm/radeon/evergreen.c

4600

WREG32(TN_CG_THERMAL_INT_CTRL, thermal_int);

drivers/gpu/drm/radeon/evergreen.c

4602

WREG32(CG_THERMAL_INT, thermal_int);

drivers/gpu/drm/radeon/evergreen.c

4636

WREG32(GRPH_INT_STATUS + crtc_offsets[j],

drivers/gpu/drm/radeon/evergreen.c

4642

WREG32(VBLANK_STATUS + crtc_offsets[j],

drivers/gpu/drm/radeon/evergreen.c

4645

WREG32(VLINE_STATUS + crtc_offsets[j],

drivers/gpu/drm/radeon/evergreen.c

4702

WREG32(IH_RB_CNTL, tmp);

drivers/gpu/drm/radeon/evergreen.c

4844

WREG32(SRBM_INT_ACK, 0x1);

drivers/gpu/drm/radeon/evergreen.c

4919

WREG32(IH_RB_RPTR, rptr);

drivers/gpu/drm/radeon/evergreen.c

63

WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff));

drivers/gpu/drm/radeon/evergreen.c

74

WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff));

drivers/gpu/drm/radeon/evergreen.c

75

WREG32(EVERGREEN_CG_IND_DATA, (v));

drivers/gpu/drm/radeon/evergreen.c

85

WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff));

drivers/gpu/drm/radeon/evergreen.c

96

WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff));

drivers/gpu/drm/radeon/evergreen.c

97

WREG32(EVERGREEN_PIF_PHY0_DATA, (v));

drivers/gpu/drm/radeon/evergreen_hdmi.c

215

WREG32(AFMT_AVI_INFO0 + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

217

WREG32(AFMT_AVI_INFO1 + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

219

WREG32(AFMT_AVI_INFO2 + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

221

WREG32(AFMT_AVI_INFO3 + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

254

WREG32(DCCG_AUDIO_DTO0_CNTL, value);

drivers/gpu/drm/radeon/evergreen_hdmi.c

262

WREG32(DCCG_AUDIO_DTO_SOURCE, value);

drivers/gpu/drm/radeon/evergreen_hdmi.c

268

WREG32(DCCG_AUDIO_DTO0_PHASE, dto_phase);

drivers/gpu/drm/radeon/evergreen_hdmi.c

269

WREG32(DCCG_AUDIO_DTO0_MODULE, clock);

drivers/gpu/drm/radeon/evergreen_hdmi.c

279

WREG32(DCCG_AUDIO_DTO1_CNTL, value);

drivers/gpu/drm/radeon/evergreen_hdmi.c

288

WREG32(DCCG_AUDIO_DTO_SOURCE, value);

drivers/gpu/drm/radeon/evergreen_hdmi.c

304

WREG32(DCCG_AUDIO_DTO1_PHASE, 24000);

drivers/gpu/drm/radeon/evergreen_hdmi.c

305

WREG32(DCCG_AUDIO_DTO1_MODULE, clock);

drivers/gpu/drm/radeon/evergreen_hdmi.c

313

WREG32(HDMI_VBI_PACKET_CONTROL + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

353

WREG32(HDMI_CONTROL + offset, val);

drivers/gpu/drm/radeon/evergreen_hdmi.c

361

WREG32(AFMT_INFOFRAME_CONTROL0 + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

364

WREG32(AFMT_60958_0 + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

367

WREG32(AFMT_60958_1 + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

370

WREG32(AFMT_60958_2 + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

378

WREG32(AFMT_AUDIO_PACKET_CONTROL2 + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

381

WREG32(HDMI_AUDIO_PACKET_CONTROL + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

416

WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

424

WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

433

WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0);

drivers/gpu/drm/radeon/evergreen_hdmi.c

462

WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

475

WREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset, val);

drivers/gpu/drm/radeon/evergreen_hdmi.c

478

WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

484

WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);

drivers/gpu/drm/radeon/evergreen_hdmi.c

66

WREG32(AZ_HOT_PLUG_CONTROL, tmp);

drivers/gpu/drm/radeon/evergreen_hdmi.c

82

WREG32(HDMI_ACR_PACKET_CONTROL + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

85

WREG32(HDMI_ACR_PACKET_CONTROL + offset,

drivers/gpu/drm/radeon/evergreen_hdmi.c

89

WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz));

drivers/gpu/drm/radeon/evergreen_hdmi.c

90

WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz);

drivers/gpu/drm/radeon/evergreen_hdmi.c

92

WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz));

drivers/gpu/drm/radeon/evergreen_hdmi.c

93

WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz);

drivers/gpu/drm/radeon/evergreen_hdmi.c

95

WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz));

drivers/gpu/drm/radeon/evergreen_hdmi.c

96

WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz);

drivers/gpu/drm/radeon/kv_dpm.c

196

WREG32(config_regs->offset << 2, data);

drivers/gpu/drm/radeon/kv_smc.c

164

WREG32(SMC_IND_DATA_0, data);

drivers/gpu/drm/radeon/kv_smc.c

177

WREG32(SMC_IND_DATA_0, data);

drivers/gpu/drm/radeon/kv_smc.c

210

WREG32(SMC_IND_DATA_0, data);

drivers/gpu/drm/radeon/kv_smc.c

34

WREG32(SMC_MESSAGE_0, id & SMC_MSG_MASK);

drivers/gpu/drm/radeon/kv_smc.c

69

WREG32(SMC_MSG_ARG_0, parameter);

drivers/gpu/drm/radeon/kv_smc.c

82

WREG32(SMC_IND_INDEX_0, smc_address);

drivers/gpu/drm/radeon/ni.c

1069

WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));

drivers/gpu/drm/radeon/ni.c

1070

WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));

drivers/gpu/drm/radeon/ni.c

1089

WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));

drivers/gpu/drm/radeon/ni.c

1090

WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i));

drivers/gpu/drm/radeon/ni.c

1098

WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);

drivers/gpu/drm/radeon/ni.c

1099

WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);

drivers/gpu/drm/radeon/ni.c

1101

WREG32(GB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/ni.c

1102

WREG32(DMIF_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/ni.c

1104

WREG32(DMIF_ADDR_CALC, gb_addr_config);

drivers/gpu/drm/radeon/ni.c

1105

WREG32(HDP_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/ni.c

1106

WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);

drivers/gpu/drm/radeon/ni.c

1107

WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);

drivers/gpu/drm/radeon/ni.c

1108

WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/ni.c

1109

WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/ni.c

1110

WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/ni.c

1129

WREG32(GB_BACKEND_MAP, tmp);

drivers/gpu/drm/radeon/ni.c

1134

WREG32(CGTS_TCC_DISABLE, cgts_tcc_disable);

drivers/gpu/drm/radeon/ni.c

1135

WREG32(CGTS_SYS_TCC_DISABLE, cgts_tcc_disable);

drivers/gpu/drm/radeon/ni.c

1136

WREG32(CGTS_USER_SYS_TCC_DISABLE, cgts_tcc_disable);

drivers/gpu/drm/radeon/ni.c

1137

WREG32(CGTS_USER_TCC_DISABLE, cgts_tcc_disable);

drivers/gpu/drm/radeon/ni.c

1142

WREG32(CGTS_SM_CTRL_REG, OVERRIDE);

drivers/gpu/drm/radeon/ni.c

1143

WREG32(CGTS_SM_CTRL_REG, cgts_sm_ctrl_reg);

drivers/gpu/drm/radeon/ni.c

1146

WREG32(CP_MEQ_THRESHOLDS, MEQ1_START(0x30) | MEQ2_START(0x60));

drivers/gpu/drm/radeon/ni.c

1150

WREG32(SX_DEBUG_1, sx_debug_1);

drivers/gpu/drm/radeon/ni.c

1155

WREG32(SMX_DC_CTL0, smx_dc_ctl0);

drivers/gpu/drm/radeon/ni.c

1157

WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4) | CRC_SIMD_ID_WADDR_DISABLE);

drivers/gpu/drm/radeon/ni.c

1160

WREG32(VGT_OFFCHIP_LDS_BASE, 0);

drivers/gpu/drm/radeon/ni.c

1161

WREG32(SQ_LSTMP_RING_BASE, 0);

drivers/gpu/drm/radeon/ni.c

1162

WREG32(SQ_HSTMP_RING_BASE, 0);

drivers/gpu/drm/radeon/ni.c

1163

WREG32(SQ_ESTMP_RING_BASE, 0);

drivers/gpu/drm/radeon/ni.c

1164

WREG32(SQ_GSTMP_RING_BASE, 0);

drivers/gpu/drm/radeon/ni.c

1165

WREG32(SQ_VSTMP_RING_BASE, 0);

drivers/gpu/drm/radeon/ni.c

1166

WREG32(SQ_PSTMP_RING_BASE, 0);

drivers/gpu/drm/radeon/ni.c

1168

WREG32(TA_CNTL_AUX, DISABLE_CUBE_ANISO);

drivers/gpu/drm/radeon/ni.c

1170

WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.cayman.sx_max_export_size / 4) - 1) |

drivers/gpu/drm/radeon/ni.c

1174

WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.cayman.sc_prim_fifo_size) |

drivers/gpu/drm/radeon/ni.c

1179

WREG32(VGT_NUM_INSTANCES, 1);

drivers/gpu/drm/radeon/ni.c

1181

WREG32(CP_PERFMON_CNTL, 0);

drivers/gpu/drm/radeon/ni.c

1183

WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.cayman.sq_num_cf_insts) |

drivers/gpu/drm/radeon/ni.c

1188

WREG32(SQ_GPR_RESOURCE_MGMT_1, NUM_CLAUSE_TEMP_GPRS(4));

drivers/gpu/drm/radeon/ni.c

1189

WREG32(SQ_CONFIG, (VC_ENABLE |

drivers/gpu/drm/radeon/ni.c

1194

WREG32(SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, DYN_GPR_ENABLE);

drivers/gpu/drm/radeon/ni.c

1196

WREG32(PA_SC_FORCE_EOV_MAX_CNTS, (FORCE_EOV_MAX_CLK_CNT(4095) |

drivers/gpu/drm/radeon/ni.c

1199

WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) |

drivers/gpu/drm/radeon/ni.c

1202

WREG32(VGT_GS_VERTEX_REUSE, 16);

drivers/gpu/drm/radeon/ni.c

1203

WREG32(PA_SC_LINE_STIPPLE_STATE, 0);

drivers/gpu/drm/radeon/ni.c

1205

WREG32(CB_PERF_CTR0_SEL_0, 0);

drivers/gpu/drm/radeon/ni.c

1206

WREG32(CB_PERF_CTR0_SEL_1, 0);

drivers/gpu/drm/radeon/ni.c

1207

WREG32(CB_PERF_CTR1_SEL_0, 0);

drivers/gpu/drm/radeon/ni.c

1208

WREG32(CB_PERF_CTR1_SEL_1, 0);

drivers/gpu/drm/radeon/ni.c

1209

WREG32(CB_PERF_CTR2_SEL_0, 0);

drivers/gpu/drm/radeon/ni.c

1210

WREG32(CB_PERF_CTR2_SEL_1, 0);

drivers/gpu/drm/radeon/ni.c

1211

WREG32(CB_PERF_CTR3_SEL_0, 0);

drivers/gpu/drm/radeon/ni.c

1212

WREG32(CB_PERF_CTR3_SEL_1, 0);

drivers/gpu/drm/radeon/ni.c

1216

WREG32(HDP_MISC_CNTL, tmp);

drivers/gpu/drm/radeon/ni.c

1219

WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl);

drivers/gpu/drm/radeon/ni.c

1221

WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3));

drivers/gpu/drm/radeon/ni.c

1242

WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);

drivers/gpu/drm/radeon/ni.c

1245

WREG32(VM_INVALIDATE_REQUEST, 1);

drivers/gpu/drm/radeon/ni.c

1260

WREG32(MC_VM_MX_L1_TLB_CNTL,

drivers/gpu/drm/radeon/ni.c

1268

WREG32(VM_L2_CNTL, ENABLE_L2_CACHE |

drivers/gpu/drm/radeon/ni.c

1274

WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE);

drivers/gpu/drm/radeon/ni.c

1275

WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY |

drivers/gpu/drm/radeon/ni.c

1279

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

drivers/gpu/drm/radeon/ni.c

1280

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

drivers/gpu/drm/radeon/ni.c

1281

WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);

drivers/gpu/drm/radeon/ni.c

1282

WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/radeon/ni.c

1284

WREG32(VM_CONTEXT0_CNTL2, 0);

drivers/gpu/drm/radeon/ni.c

1285

WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |

drivers/gpu/drm/radeon/ni.c

1288

WREG32(0x15D4, 0);

drivers/gpu/drm/radeon/ni.c

1289

WREG32(0x15D8, 0);

drivers/gpu/drm/radeon/ni.c

1290

WREG32(0x15DC, 0);

drivers/gpu/drm/radeon/ni.c

1298

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR + (i << 2), 0);

drivers/gpu/drm/radeon/ni.c

1299

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR + (i << 2),

drivers/gpu/drm/radeon/ni.c

1301

WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),

drivers/gpu/drm/radeon/ni.c

1306

WREG32(VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/radeon/ni.c

1308

WREG32(VM_CONTEXT1_CNTL2, 4);

drivers/gpu/drm/radeon/ni.c

1309

WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) |

drivers/gpu/drm/radeon/ni.c

1342

WREG32(VM_CONTEXT0_CNTL, 0);

drivers/gpu/drm/radeon/ni.c

1343

WREG32(VM_CONTEXT1_CNTL, 0);

drivers/gpu/drm/radeon/ni.c

1345

WREG32(MC_VM_MX_L1_TLB_CNTL, ENABLE_L1_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/ni.c

1349

WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |

drivers/gpu/drm/radeon/ni.c

1353

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/ni.c

1354

WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY |

drivers/gpu/drm/radeon/ni.c

1369

WREG32(SRBM_GFX_CNTL, RINGID(ring));

drivers/gpu/drm/radeon/ni.c

1370

WREG32(CP_INT_CNTL, cp_int_cntl);

drivers/gpu/drm/radeon/ni.c

1438

WREG32(CP_ME_CNTL, 0);

drivers/gpu/drm/radeon/ni.c

1442

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));

drivers/gpu/drm/radeon/ni.c

1443

WREG32(SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/ni.c

1486

WREG32(CP_RB0_WPTR, ring->wptr);

drivers/gpu/drm/radeon/ni.c

1489

WREG32(CP_RB1_WPTR, ring->wptr);

drivers/gpu/drm/radeon/ni.c

1492

WREG32(CP_RB2_WPTR, ring->wptr);

drivers/gpu/drm/radeon/ni.c

1508

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/ni.c

1510

WREG32(CP_PFP_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/ni.c

1511

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/ni.c

1514

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/ni.c

1516

WREG32(CP_ME_RAM_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/ni.c

1518

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/ni.c

1519

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/ni.c

1520

WREG32(CP_ME_RAM_RADDR, 0);

drivers/gpu/drm/radeon/ni.c

1639

WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP |

drivers/gpu/drm/radeon/ni.c

1647

WREG32(GRBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/ni.c

1650

WREG32(CP_SEM_WAIT_TIMER, 0x0);

drivers/gpu/drm/radeon/ni.c

1651

WREG32(CP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);

drivers/gpu/drm/radeon/ni.c

1654

WREG32(CP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/radeon/ni.c

1656

WREG32(CP_DEBUG, (1 << 27));

drivers/gpu/drm/radeon/ni.c

1659

WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF);

drivers/gpu/drm/radeon/ni.c

1660

WREG32(SCRATCH_UMSK, 0xff);

drivers/gpu/drm/radeon/ni.c

1673

WREG32(cp_rb_cntl[i], rb_cntl);

drivers/gpu/drm/radeon/ni.c

1677

WREG32(cp_rb_rptr_addr[i], addr & 0xFFFFFFFC);

drivers/gpu/drm/radeon/ni.c

1678

WREG32(cp_rb_rptr_addr_hi[i], upper_32_bits(addr) & 0xFF);

drivers/gpu/drm/radeon/ni.c

1684

WREG32(cp_rb_base[i], ring->gpu_addr >> 8);

drivers/gpu/drm/radeon/ni.c

1693

WREG32(cp_rb_rptr[i], 0);

drivers/gpu/drm/radeon/ni.c

1694

WREG32(cp_rb_wptr[i], ring->wptr);

drivers/gpu/drm/radeon/ni.c

1820

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT);

drivers/gpu/drm/radeon/ni.c

1826

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/ni.c

1833

WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/ni.c

1897

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/ni.c

1903

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/ni.c

1911

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/ni.c

1917

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/ni.c

53

WREG32(TN_SMC_IND_INDEX_0, (reg));

drivers/gpu/drm/radeon/ni.c

64

WREG32(TN_SMC_IND_INDEX_0, (reg));

drivers/gpu/drm/radeon/ni.c

65

WREG32(TN_SMC_IND_DATA_0, (v));

drivers/gpu/drm/radeon/ni.c

657

WREG32(MC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/radeon/ni.c

658

WREG32(MC_SEQ_SUP_CNTL, 0x00000010);

drivers/gpu/drm/radeon/ni.c

662

WREG32(MC_SEQ_IO_DEBUG_INDEX, io_mc_regs[(i << 1)]);

drivers/gpu/drm/radeon/ni.c

663

WREG32(MC_SEQ_IO_DEBUG_DATA, io_mc_regs[(i << 1) + 1]);

drivers/gpu/drm/radeon/ni.c

668

WREG32(MC_SEQ_SUP_PGM, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/ni.c

671

WREG32(MC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/radeon/ni.c

672

WREG32(MC_SEQ_SUP_CNTL, 0x00000004);

drivers/gpu/drm/radeon/ni.c

673

WREG32(MC_SEQ_SUP_CNTL, 0x00000001);

drivers/gpu/drm/radeon/ni.c

980

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/ni.c

981

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/ni.c

982

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/ni.c

983

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/ni.c

984

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/ni.c

987

WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));

drivers/gpu/drm/radeon/ni.c

988

WREG32(SRBM_INT_CNTL, 0x1);

drivers/gpu/drm/radeon/ni.c

989

WREG32(SRBM_INT_ACK, 0x1);

drivers/gpu/drm/radeon/ni_dma.c

110

WREG32(reg, (ring->wptr << 2) & 0x3fffc);

drivers/gpu/drm/radeon/ni_dma.c

167

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, rb_cntl);

drivers/gpu/drm/radeon/ni_dma.c

172

WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, rb_cntl);

drivers/gpu/drm/radeon/ni_dma.c

205

WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL + reg_offset, 0);

drivers/gpu/drm/radeon/ni_dma.c

206

WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL + reg_offset, 0);

drivers/gpu/drm/radeon/ni_dma.c

214

WREG32(DMA_RB_CNTL + reg_offset, rb_cntl);

drivers/gpu/drm/radeon/ni_dma.c

217

WREG32(DMA_RB_RPTR + reg_offset, 0);

drivers/gpu/drm/radeon/ni_dma.c

218

WREG32(DMA_RB_WPTR + reg_offset, 0);

drivers/gpu/drm/radeon/ni_dma.c

221

WREG32(DMA_RB_RPTR_ADDR_HI + reg_offset,

drivers/gpu/drm/radeon/ni_dma.c

223

WREG32(DMA_RB_RPTR_ADDR_LO + reg_offset,

drivers/gpu/drm/radeon/ni_dma.c

229

WREG32(DMA_RB_BASE + reg_offset, ring->gpu_addr >> 8);

drivers/gpu/drm/radeon/ni_dma.c

236

WREG32(DMA_IB_CNTL + reg_offset, ib_cntl);

drivers/gpu/drm/radeon/ni_dma.c

240

WREG32(DMA_CNTL + reg_offset, dma_cntl);

drivers/gpu/drm/radeon/ni_dma.c

243

WREG32(DMA_RB_WPTR + reg_offset, ring->wptr << 2);

drivers/gpu/drm/radeon/ni_dma.c

245

WREG32(DMA_RB_CNTL + reg_offset, rb_cntl | DMA_RB_ENABLE);

drivers/gpu/drm/radeon/ni_dpm.c

1039

WREG32(SMC_SCRATCH0, parameter);

drivers/gpu/drm/radeon/ni_dpm.c

1539

WREG32(MC_ARB_DRAM_TIMING, mc_arb_dram_timing);

drivers/gpu/drm/radeon/ni_dpm.c

1540

WREG32(MC_ARB_DRAM_TIMING2, mc_arb_dram_timing2);

drivers/gpu/drm/radeon/ni_dpm.c

1544

WREG32(MC_ARB_DRAM_TIMING_1, mc_arb_dram_timing);

drivers/gpu/drm/radeon/ni_dpm.c

1545

WREG32(MC_ARB_DRAM_TIMING2_1, mc_arb_dram_timing2);

drivers/gpu/drm/radeon/ni_dpm.c

1549

WREG32(MC_ARB_DRAM_TIMING_2, mc_arb_dram_timing);

drivers/gpu/drm/radeon/ni_dpm.c

1550

WREG32(MC_ARB_DRAM_TIMING2_2, mc_arb_dram_timing2);

drivers/gpu/drm/radeon/ni_dpm.c

1554

WREG32(MC_ARB_DRAM_TIMING_3, mc_arb_dram_timing);

drivers/gpu/drm/radeon/ni_dpm.c

1555

WREG32(MC_ARB_DRAM_TIMING2_3, mc_arb_dram_timing2);

drivers/gpu/drm/radeon/ni_dpm.c

1563

WREG32(MC_CG_CONFIG, mc_cg_config);

drivers/gpu/drm/radeon/ni_dpm.c

2886

WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));

drivers/gpu/drm/radeon/ni_dpm.c

2887

WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));

drivers/gpu/drm/radeon/ni_dpm.c

2888

WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING));

drivers/gpu/drm/radeon/ni_dpm.c

2889

WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2));

drivers/gpu/drm/radeon/ni_dpm.c

2890

WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));

drivers/gpu/drm/radeon/ni_dpm.c

2891

WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS));

drivers/gpu/drm/radeon/ni_dpm.c

2892

WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));

drivers/gpu/drm/radeon/ni_dpm.c

2893

WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));

drivers/gpu/drm/radeon/ni_dpm.c

2894

WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1));

drivers/gpu/drm/radeon/ni_dpm.c

2895

WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));

drivers/gpu/drm/radeon/ni_dpm.c

2896

WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));

drivers/gpu/drm/radeon/ni_dpm.c

2897

WREG32(MC_SEQ_PMG_TIMING_LP, RREG32(MC_SEQ_PMG_TIMING));

drivers/gpu/drm/radeon/ni_dpm.c

2898

WREG32(MC_SEQ_PMG_CMD_MRS2_LP, RREG32(MC_PMG_CMD_MRS2));

drivers/gpu/drm/radeon/ni_dpm.c

3157

WREG32(CG_CAC_CTRL, reg);

drivers/gpu/drm/radeon/ni_dpm.c

3360

WREG32(SQ_CAC_THRESHOLD, reg);

drivers/gpu/drm/radeon/ni_dpm.c

3367

WREG32(MC_CG_CONFIG, reg);

drivers/gpu/drm/radeon/ni_dpm.c

3372

WREG32(MC_CG_DATAPORT, reg);

drivers/gpu/drm/radeon/ni_dpm.c

3472

WREG32(CG_BIF_REQ_AND_RSP, bif);

drivers/gpu/drm/radeon/ni_dpm.c

3487

WREG32(CG_BIF_REQ_AND_RSP, bif);

drivers/gpu/drm/radeon/r100.c

1115

WREG32(RADEON_CP_RB_WPTR, ring->wptr);

drivers/gpu/drm/radeon/r100.c

1131

WREG32(RADEON_CP_ME_RAM_ADDR, 0);

drivers/gpu/drm/radeon/r100.c

1133

WREG32(RADEON_CP_ME_RAM_DATAH,

drivers/gpu/drm/radeon/r100.c

1135

WREG32(RADEON_CP_ME_RAM_DATAL,

drivers/gpu/drm/radeon/r100.c

1197

WREG32(0x718, pre_write_timer | (pre_write_limit << 28));

drivers/gpu/drm/radeon/r100.c

1204

WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_NO_UPDATE);

drivers/gpu/drm/radeon/r100.c

1208

WREG32(RADEON_CP_RB_BASE, ring->gpu_addr);

drivers/gpu/drm/radeon/r100.c

1210

WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA | RADEON_RB_NO_UPDATE);

drivers/gpu/drm/radeon/r100.c

1211

WREG32(RADEON_CP_RB_RPTR_WR, 0);

drivers/gpu/drm/radeon/r100.c

1213

WREG32(RADEON_CP_RB_WPTR, ring->wptr);

drivers/gpu/drm/radeon/r100.c

1216

WREG32(R_00070C_CP_RB_RPTR_ADDR,

drivers/gpu/drm/radeon/r100.c

1218

WREG32(R_000774_SCRATCH_ADDR, rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET);

drivers/gpu/drm/radeon/r100.c

1221

WREG32(R_000770_SCRATCH_UMSK, 0xff);

drivers/gpu/drm/radeon/r100.c

1224

WREG32(R_000770_SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/r100.c

1227

WREG32(RADEON_CP_RB_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

1230

WREG32(RADEON_CP_CSQ_MODE,

drivers/gpu/drm/radeon/r100.c

1233

WREG32(RADEON_CP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/radeon/r100.c

1234

WREG32(RADEON_CP_CSQ_MODE, 0x00004D4D);

drivers/gpu/drm/radeon/r100.c

1235

WREG32(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIBM_INDBM);

drivers/gpu/drm/radeon/r100.c

1277

WREG32(RADEON_CP_CSQ_MODE, 0);

drivers/gpu/drm/radeon/r100.c

1278

WREG32(RADEON_CP_CSQ_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

1279

WREG32(R_000770_SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/r100.c

174

WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/r100.c

181

WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch);

drivers/gpu/drm/radeon/r100.c

193

WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/r100.c

2566

WREG32(RADEON_BUS_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

2575

WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000044);

drivers/gpu/drm/radeon/r100.c

2577

WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000042);

drivers/gpu/drm/radeon/r100.c

2579

WREG32(R_000030_BUS_CNTL, (tmp & 0xFFFFFFFF) | 0x00000040);

drivers/gpu/drm/radeon/r100.c

2600

WREG32(RADEON_CP_CSQ_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

2602

WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA);

drivers/gpu/drm/radeon/r100.c

2603

WREG32(RADEON_CP_RB_RPTR_WR, 0);

drivers/gpu/drm/radeon/r100.c

2604

WREG32(RADEON_CP_RB_WPTR, 0);

drivers/gpu/drm/radeon/r100.c

2605

WREG32(RADEON_CP_RB_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

2610

WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_SE(1) |

drivers/gpu/drm/radeon/r100.c

2616

WREG32(R_0000F0_RBBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/r100.c

2621

WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_CP(1));

drivers/gpu/drm/radeon/r100.c

2624

WREG32(R_0000F0_RBBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/r100.c

2648

WREG32(RADEON_OV0_SCALE_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

2649

WREG32(RADEON_SUBPIC_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

2650

WREG32(RADEON_VIPH_CONTROL, 0);

drivers/gpu/drm/radeon/r100.c

2651

WREG32(RADEON_I2C_CNTL_1, 0);

drivers/gpu/drm/radeon/r100.c

2652

WREG32(RADEON_DVI_I2C_CNTL_1, 0);

drivers/gpu/drm/radeon/r100.c

2653

WREG32(RADEON_CAP0_TRIG_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

2654

WREG32(RADEON_CAP1_TRIG_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

2713

WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);

drivers/gpu/drm/radeon/r100.c

2714

WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);

drivers/gpu/drm/radeon/r100.c

2715

WREG32(RADEON_DAC_CNTL2, dac2_cntl);

drivers/gpu/drm/radeon/r100.c

2818

WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

drivers/gpu/drm/radeon/r100.c

2827

WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

drivers/gpu/drm/radeon/r100.c

2853

WREG32(RADEON_CONFIG_CNTL, temp);

drivers/gpu/drm/radeon/r100.c

2903

WREG32(RADEON_CLOCK_CNTL_INDEX, tmp);

drivers/gpu/drm/radeon/r100.c

2905

WREG32(RADEON_CLOCK_CNTL_INDEX, save);

drivers/gpu/drm/radeon/r100.c

2930

WREG32(RADEON_CLOCK_CNTL_DATA, v);

drivers/gpu/drm/radeon/r100.c

2962

WREG32(RADEON_RBBM_CMDFIFO_ADDR, i | 0x100);

drivers/gpu/drm/radeon/r100.c

2964

WREG32(RADEON_RBBM_CMDFIFO_ADDR, i);

drivers/gpu/drm/radeon/r100.c

3026

WREG32(RADEON_CP_CSQ_ADDR, i << 2);

drivers/gpu/drm/radeon/r100.c

3032

WREG32(RADEON_CP_CSQ_ADDR, i << 2);

drivers/gpu/drm/radeon/r100.c

3038

WREG32(RADEON_CP_CSQ_ADDR, i << 2);

drivers/gpu/drm/radeon/r100.c

3154

WREG32(RADEON_SURFACE0_INFO + surf_index, flags);

drivers/gpu/drm/radeon/r100.c

3155

WREG32(RADEON_SURFACE0_LOWER_BOUND + surf_index, offset);

drivers/gpu/drm/radeon/r100.c

3156

WREG32(RADEON_SURFACE0_UPPER_BOUND + surf_index, offset + obj_size - 1);

drivers/gpu/drm/radeon/r100.c

3163

WREG32(RADEON_SURFACE0_INFO + surf_index, 0);

drivers/gpu/drm/radeon/r100.c

3274

WREG32(R300_MC_INIT_MISC_LAT_TIMER, mc_init_misc_lat_timer);

drivers/gpu/drm/radeon/r100.c

3380

WREG32(R300_MC_IND_INDEX, temp);

drivers/gpu/drm/radeon/r100.c

3540

WREG32(RADEON_GRPH_BUFFER_CNTL, ((temp & ~RADEON_GRPH_CRITICAL_POINT_MASK) |

drivers/gpu/drm/radeon/r100.c

3550

WREG32(RS400_DISP1_REQ_CNTL1, (temp |

drivers/gpu/drm/radeon/r100.c

3556

WREG32(RS400_DMIF_MEM_CNTL1, (temp |

drivers/gpu/drm/radeon/r100.c

3632

WREG32(RADEON_GRPH2_BUFFER_CNTL, ((grph2_cntl & ~RADEON_GRPH_CRITICAL_POINT_MASK) |

drivers/gpu/drm/radeon/r100.c

3642

WREG32(RS400_DISP2_REQ_CNTL1, (temp |

drivers/gpu/drm/radeon/r100.c

3648

WREG32(RS400_DISP2_REQ_CNTL2, (temp |

drivers/gpu/drm/radeon/r100.c

3652

WREG32(RS400_DISP2_REQ_CNTL1, 0x105DC1CC);

drivers/gpu/drm/radeon/r100.c

3653

WREG32(RS400_DISP2_REQ_CNTL2, 0x2749D000);

drivers/gpu/drm/radeon/r100.c

3654

WREG32(RS400_DMIF_MEM_CNTL1, 0x29CA71DC);

drivers/gpu/drm/radeon/r100.c

3655

WREG32(RS400_DISP1_REQ_CNTL1, 0x28FBC3AC);

drivers/gpu/drm/radeon/r100.c

3682

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/radeon/r100.c

3738

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/radeon/r100.c

376

WREG32(voltage->gpio.reg, tmp);

drivers/gpu/drm/radeon/r100.c

3796

WREG32(R_000740_CP_CSQ_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

3811

WREG32(R_000260_CUR_OFFSET, save->CUR_OFFSET | S_000260_CUR_LOCK(1));

drivers/gpu/drm/radeon/r100.c

3812

WREG32(R_000054_CRTC_EXT_CNTL, save->CRTC_EXT_CNTL |

drivers/gpu/drm/radeon/r100.c

3814

WREG32(R_000050_CRTC_GEN_CNTL,

drivers/gpu/drm/radeon/r100.c

3817

WREG32(R_000420_OV0_SCALE_CNTL,

drivers/gpu/drm/radeon/r100.c

3819

WREG32(R_000260_CUR_OFFSET, C_000260_CUR_LOCK & save->CUR_OFFSET);

drivers/gpu/drm/radeon/r100.c

3821

WREG32(R_000360_CUR2_OFFSET, save->CUR2_OFFSET |

drivers/gpu/drm/radeon/r100.c

3823

WREG32(R_0003F8_CRTC2_GEN_CNTL,

drivers/gpu/drm/radeon/r100.c

3827

WREG32(R_000360_CUR2_OFFSET,

drivers/gpu/drm/radeon/r100.c

3835

WREG32(R_00023C_DISPLAY_BASE_ADDR, rdev->mc.vram_start);

drivers/gpu/drm/radeon/r100.c

3837

WREG32(R_00033C_CRTC2_DISPLAY_BASE_ADDR, rdev->mc.vram_start);

drivers/gpu/drm/radeon/r100.c

3841

WREG32(R_000054_CRTC_EXT_CNTL, save->CRTC_EXT_CNTL);

drivers/gpu/drm/radeon/r100.c

3842

WREG32(R_000050_CRTC_GEN_CNTL, save->CRTC_GEN_CNTL);

drivers/gpu/drm/radeon/r100.c

3844

WREG32(R_0003F8_CRTC2_GEN_CNTL, save->CRTC2_GEN_CNTL);

drivers/gpu/drm/radeon/r100.c

385

WREG32(voltage->gpio.reg, tmp);

drivers/gpu/drm/radeon/r100.c

3863

WREG32(R_00014C_MC_AGP_LOCATION,

drivers/gpu/drm/radeon/r100.c

3866

WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

drivers/gpu/drm/radeon/r100.c

3868

WREG32(R_00015C_AGP_BASE_2,

drivers/gpu/drm/radeon/r100.c

3871

WREG32(R_00014C_MC_AGP_LOCATION, 0x0FFFFFFF);

drivers/gpu/drm/radeon/r100.c

3872

WREG32(R_000170_AGP_BASE, 0);

drivers/gpu/drm/radeon/r100.c

3874

WREG32(R_00015C_AGP_BASE_2, 0);

drivers/gpu/drm/radeon/r100.c

3880

WREG32(R_000148_MC_FB_LOCATION,

drivers/gpu/drm/radeon/r100.c

4027

WREG32(RADEON_CP_CSQ_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

4031

WREG32(RADEON_CP_RB_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

4035

WREG32(RADEON_SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/r100.c

474

WREG32(RADEON_CRTC2_GEN_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

478

WREG32(RADEON_CRTC_GEN_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

505

WREG32(RADEON_CRTC2_GEN_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

509

WREG32(RADEON_CRTC_GEN_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

581

WREG32(RADEON_FP_GEN_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

589

WREG32(RADEON_FP2_GEN_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

677

WREG32(RADEON_AIC_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

679

WREG32(RADEON_AIC_LO_ADDR, rdev->mc.gtt_start);

drivers/gpu/drm/radeon/r100.c

680

WREG32(RADEON_AIC_HI_ADDR, rdev->mc.gtt_end);

drivers/gpu/drm/radeon/r100.c

682

WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr);

drivers/gpu/drm/radeon/r100.c

684

WREG32(RADEON_AIC_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

699

WREG32(RADEON_AIC_CNTL, tmp & ~RADEON_PCIGART_TRANSLATE_EN);

drivers/gpu/drm/radeon/r100.c

700

WREG32(RADEON_AIC_LO_ADDR, 0);

drivers/gpu/drm/radeon/r100.c

701

WREG32(RADEON_AIC_HI_ADDR, 0);

drivers/gpu/drm/radeon/r100.c

729

WREG32(R_000040_GEN_INT_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

749

WREG32(RADEON_GEN_INT_CNTL, tmp);

drivers/gpu/drm/radeon/r100.c

761

WREG32(R_000040_GEN_INT_CNTL, 0);

drivers/gpu/drm/radeon/r100.c

765

WREG32(R_000044_GEN_INT_STATUS, tmp);

drivers/gpu/drm/radeon/r100.c

776

WREG32(RADEON_GEN_INT_STATUS, irqs);

drivers/gpu/drm/radeon/r100.c

834

WREG32(RADEON_AIC_CNTL, msi_rearm);

drivers/gpu/drm/radeon/r100.c

835

WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM);

drivers/gpu/drm/radeon/r100.c

838

WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN);

drivers/gpu/drm/radeon/r300.c

1336

WREG32(R_00014C_MC_AGP_LOCATION,

drivers/gpu/drm/radeon/r300.c

1339

WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

drivers/gpu/drm/radeon/r300.c

1340

WREG32(R_00015C_AGP_BASE_2,

drivers/gpu/drm/radeon/r300.c

1343

WREG32(R_00014C_MC_AGP_LOCATION, 0x0FFFFFFF);

drivers/gpu/drm/radeon/r300.c

1344

WREG32(R_000170_AGP_BASE, 0);

drivers/gpu/drm/radeon/r300.c

1345

WREG32(R_00015C_AGP_BASE_2, 0);

drivers/gpu/drm/radeon/r300.c

1351

WREG32(R_000148_MC_FB_LOCATION,

drivers/gpu/drm/radeon/r300.c

392

WREG32(R300_GB_TILE_CONFIG, gb_tile_config);

drivers/gpu/drm/radeon/r300.c

399

WREG32(R300_DST_PIPE_CONFIG, tmp | R300_PIPE_AUTO_CONFIG);

drivers/gpu/drm/radeon/r300.c

401

WREG32(R300_RB2D_DSTCACHE_MODE,

drivers/gpu/drm/radeon/r300.c

429

WREG32(RADEON_CP_CSQ_CNTL, 0);

drivers/gpu/drm/radeon/r300.c

431

WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA);

drivers/gpu/drm/radeon/r300.c

432

WREG32(RADEON_CP_RB_RPTR_WR, 0);

drivers/gpu/drm/radeon/r300.c

433

WREG32(RADEON_CP_RB_WPTR, 0);

drivers/gpu/drm/radeon/r300.c

434

WREG32(RADEON_CP_RB_CNTL, tmp);

drivers/gpu/drm/radeon/r300.c

439

WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_VAP(1) |

drivers/gpu/drm/radeon/r300.c

443

WREG32(R_0000F0_RBBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/r300.c

452

WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_CP(1));

drivers/gpu/drm/radeon/r300.c

455

WREG32(R_0000F0_RBBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/r300.c

66

WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask));

drivers/gpu/drm/radeon/r300.c

77

WREG32(RADEON_PCIE_INDEX, ((reg) & rdev->pcie_reg_mask));

drivers/gpu/drm/radeon/r300.c

78

WREG32(RADEON_PCIE_DATA, (v));

drivers/gpu/drm/radeon/r420.c

132

WREG32(R500_SU_REG_DEST, (1 << num_pipes) - 1);

drivers/gpu/drm/radeon/r420.c

135

WREG32(R300_GB_TILE_CONFIG, tmp);

drivers/gpu/drm/radeon/r420.c

141

WREG32(R300_DST_PIPE_CONFIG, tmp | R300_PIPE_AUTO_CONFIG);

drivers/gpu/drm/radeon/r420.c

143

WREG32(R300_RB2D_DSTCACHE_MODE,

drivers/gpu/drm/radeon/r420.c

171

WREG32(R_0001F8_MC_IND_INDEX, S_0001F8_MC_IND_ADDR(reg));

drivers/gpu/drm/radeon/r420.c

182

WREG32(R_0001F8_MC_IND_INDEX, S_0001F8_MC_IND_ADDR(reg) |

drivers/gpu/drm/radeon/r420.c

184

WREG32(R_0001FC_MC_IND_DATA, v);

drivers/gpu/drm/radeon/r420.c

97

WREG32(R300_GA_ENHANCE, R300_GA_DEADLOCK_CNTL | R300_GA_FASTSYNC_CNTL |

drivers/gpu/drm/radeon/r520.c

144

WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

drivers/gpu/drm/radeon/r520.c

149

WREG32(R_000134_HDP_FB_LOCATION,

drivers/gpu/drm/radeon/r520.c

79

WREG32(0x4128, 0xFF);

drivers/gpu/drm/radeon/r600.c

1002

WREG32(DC_HOT_PLUG_DETECT2_CONTROL, DC_HOT_PLUG_DETECTx_EN);

drivers/gpu/drm/radeon/r600.c

1005

WREG32(DC_HOT_PLUG_DETECT3_CONTROL, DC_HOT_PLUG_DETECTx_EN);

drivers/gpu/drm/radeon/r600.c

1029

WREG32(DC_HPD1_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

1032

WREG32(DC_HPD2_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

1035

WREG32(DC_HPD3_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

1038

WREG32(DC_HPD4_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

1042

WREG32(DC_HPD5_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

1045

WREG32(DC_HPD6_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

1053

WREG32(DC_HOT_PLUG_DETECT1_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

1056

WREG32(DC_HOT_PLUG_DETECT2_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

1059

WREG32(DC_HOT_PLUG_DETECT3_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

1089

WREG32(HDP_DEBUG1, 0);

drivers/gpu/drm/radeon/r600.c

1092

WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);

drivers/gpu/drm/radeon/r600.c

1094

WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12);

drivers/gpu/drm/radeon/r600.c

1095

WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12);

drivers/gpu/drm/radeon/r600.c

1096

WREG32(VM_CONTEXT0_REQUEST_RESPONSE, REQUEST_TYPE(1));

drivers/gpu/drm/radeon/r600.c

1142

WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/r600.c

1145

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/r600.c

1146

WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1));

drivers/gpu/drm/radeon/r600.c

1152

WREG32(MC_VM_L1_TLB_MCB_RD_SYS_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1153

WREG32(MC_VM_L1_TLB_MCB_WR_SYS_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1154

WREG32(MC_VM_L1_TLB_MCB_RD_HDP_CNTL, tmp | ENABLE_L1_STRICT_ORDERING);

drivers/gpu/drm/radeon/r600.c

1155

WREG32(MC_VM_L1_TLB_MCB_WR_HDP_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1156

WREG32(MC_VM_L1_TLB_MCD_RD_A_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1157

WREG32(MC_VM_L1_TLB_MCD_WR_A_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1158

WREG32(MC_VM_L1_TLB_MCD_RD_B_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1159

WREG32(MC_VM_L1_TLB_MCD_WR_B_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1160

WREG32(MC_VM_L1_TLB_MCB_RD_GFX_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1161

WREG32(MC_VM_L1_TLB_MCB_WR_GFX_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1162

WREG32(MC_VM_L1_TLB_MCB_RD_PDMA_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1163

WREG32(MC_VM_L1_TLB_MCB_WR_PDMA_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1164

WREG32(MC_VM_L1_TLB_MCB_RD_UVD_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1165

WREG32(MC_VM_L1_TLB_MCB_WR_UVD_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1166

WREG32(MC_VM_L1_TLB_MCB_RD_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);

drivers/gpu/drm/radeon/r600.c

1167

WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);

drivers/gpu/drm/radeon/r600.c

1168

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

drivers/gpu/drm/radeon/r600.c

1169

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

drivers/gpu/drm/radeon/r600.c

1170

WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);

drivers/gpu/drm/radeon/r600.c

1171

WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |

drivers/gpu/drm/radeon/r600.c

1173

WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/radeon/r600.c

1176

WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);

drivers/gpu/drm/radeon/r600.c

1193

WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);

drivers/gpu/drm/radeon/r600.c

1196

WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/r600.c

1198

WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1));

drivers/gpu/drm/radeon/r600.c

1202

WREG32(MC_VM_L1_TLB_MCD_RD_A_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1203

WREG32(MC_VM_L1_TLB_MCD_WR_A_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1204

WREG32(MC_VM_L1_TLB_MCD_RD_B_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1205

WREG32(MC_VM_L1_TLB_MCD_WR_B_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1206

WREG32(MC_VM_L1_TLB_MCB_RD_GFX_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1207

WREG32(MC_VM_L1_TLB_MCB_WR_GFX_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1208

WREG32(MC_VM_L1_TLB_MCB_RD_PDMA_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1209

WREG32(MC_VM_L1_TLB_MCB_WR_PDMA_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1210

WREG32(MC_VM_L1_TLB_MCB_RD_SEM_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1211

WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1212

WREG32(MC_VM_L1_TLB_MCB_RD_SYS_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1213

WREG32(MC_VM_L1_TLB_MCB_WR_SYS_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1214

WREG32(MC_VM_L1_TLB_MCB_RD_HDP_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1215

WREG32(MC_VM_L1_TLB_MCB_WR_HDP_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1216

WREG32(MC_VM_L1_TLB_MCB_RD_UVD_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1217

WREG32(MC_VM_L1_TLB_MCB_WR_UVD_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1234

WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/r600.c

1237

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/r600.c

1238

WREG32(VM_L2_CNTL3, BANK_SELECT_0(0) | BANK_SELECT_1(1));

drivers/gpu/drm/radeon/r600.c

1244

WREG32(MC_VM_L1_TLB_MCB_RD_SYS_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1245

WREG32(MC_VM_L1_TLB_MCB_WR_SYS_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1246

WREG32(MC_VM_L1_TLB_MCB_RD_HDP_CNTL, tmp | ENABLE_L1_STRICT_ORDERING);

drivers/gpu/drm/radeon/r600.c

1247

WREG32(MC_VM_L1_TLB_MCB_WR_HDP_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1248

WREG32(MC_VM_L1_TLB_MCD_RD_A_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1249

WREG32(MC_VM_L1_TLB_MCD_WR_A_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1250

WREG32(MC_VM_L1_TLB_MCD_RD_B_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1251

WREG32(MC_VM_L1_TLB_MCD_WR_B_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1252

WREG32(MC_VM_L1_TLB_MCB_RD_GFX_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1253

WREG32(MC_VM_L1_TLB_MCB_WR_GFX_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1254

WREG32(MC_VM_L1_TLB_MCB_RD_PDMA_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1255

WREG32(MC_VM_L1_TLB_MCB_WR_PDMA_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1256

WREG32(MC_VM_L1_TLB_MCB_RD_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);

drivers/gpu/drm/radeon/r600.c

1257

WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);

drivers/gpu/drm/radeon/r600.c

1259

WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);

drivers/gpu/drm/radeon/r600.c

126

WREG32(R600_RCU_INDEX, ((reg) & 0x1fff));

drivers/gpu/drm/radeon/r600.c

1283

WREG32(R_0028F8_MC_INDEX, S_0028F8_MC_IND_ADDR(reg));

drivers/gpu/drm/radeon/r600.c

1285

WREG32(R_0028F8_MC_INDEX, ~C_0028F8_MC_IND_ADDR);

drivers/gpu/drm/radeon/r600.c

1295

WREG32(R_0028F8_MC_INDEX, S_0028F8_MC_IND_ADDR(reg) |

drivers/gpu/drm/radeon/r600.c

1297

WREG32(R_0028FC_MC_DATA, v);

drivers/gpu/drm/radeon/r600.c

1298

WREG32(R_0028F8_MC_INDEX, 0x7F);

drivers/gpu/drm/radeon/r600.c

1310

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

1311

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

1312

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

1313

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

1314

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

1316

WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

1323

WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE);

drivers/gpu/drm/radeon/r600.c

1328

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/r600.c

1330

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/r600.c

1334

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/r600.c

1336

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/r600.c

1340

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start >> 12);

drivers/gpu/drm/radeon/r600.c

1341

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end >> 12);

drivers/gpu/drm/radeon/r600.c

1343

WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, rdev->vram_scratch.gpu_addr >> 12);

drivers/gpu/drm/radeon/r600.c

1346

WREG32(MC_VM_FB_LOCATION, tmp);

drivers/gpu/drm/radeon/r600.c

1347

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

drivers/gpu/drm/radeon/r600.c

1348

WREG32(HDP_NONSURFACE_INFO, (2 << 7));

drivers/gpu/drm/radeon/r600.c

1349

WREG32(HDP_NONSURFACE_SIZE, 0x3FFFFFFF);

drivers/gpu/drm/radeon/r600.c

1351

WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 22);

drivers/gpu/drm/radeon/r600.c

1352

WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 22);

drivers/gpu/drm/radeon/r600.c

1353

WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

drivers/gpu/drm/radeon/r600.c

1355

WREG32(MC_VM_AGP_BASE, 0);

drivers/gpu/drm/radeon/r600.c

1356

WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF);

drivers/gpu/drm/radeon/r600.c

1357

WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF);

drivers/gpu/drm/radeon/r600.c

137

WREG32(R600_RCU_INDEX, ((reg) & 0x1fff));

drivers/gpu/drm/radeon/r600.c

138

WREG32(R600_RCU_DATA, (v));

drivers/gpu/drm/radeon/r600.c

148

WREG32(R600_UVD_CTX_INDEX, ((reg) & 0x1ff));

drivers/gpu/drm/radeon/r600.c

1563

WREG32(R600_BIOS_3_SCRATCH, tmp);

drivers/gpu/drm/radeon/r600.c

159

WREG32(R600_UVD_CTX_INDEX, ((reg) & 0x1ff));

drivers/gpu/drm/radeon/r600.c

160

WREG32(R600_UVD_CTX_DATA, (v));

drivers/gpu/drm/radeon/r600.c

1699

WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1) | S_0086D8_CP_PFP_HALT(1));

drivers/gpu/drm/radeon/r600.c

1701

WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));

drivers/gpu/drm/radeon/r600.c

1704

WREG32(RLC_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

1710

WREG32(DMA_RB_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1787

WREG32(R_008020_GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/r600.c

1793

WREG32(R_008020_GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/r600.c

1801

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/r600.c

1807

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/r600.c

1831

WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1) | S_0086D8_CP_PFP_HALT(1));

drivers/gpu/drm/radeon/r600.c

1833

WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));

drivers/gpu/drm/radeon/r600.c

1836

WREG32(RLC_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

1841

WREG32(DMA_RB_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1859

WREG32(BUS_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

1869

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/r600.c

1871

WREG32(SRBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/r600.c

2076

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

2077

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

2078

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

2079

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

2080

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/r600.c

2083

WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));

drivers/gpu/drm/radeon/r600.c

2140

WREG32(GB_TILING_CONFIG, tiling_config);

drivers/gpu/drm/radeon/r600.c

2141

WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff);

drivers/gpu/drm/radeon/r600.c

2142

WREG32(HDP_TILING_CONFIG, tiling_config & 0xffff);

drivers/gpu/drm/radeon/r600.c

2143

WREG32(DMA_TILING_CONFIG, tiling_config & 0xffff);

drivers/gpu/drm/radeon/r600.c

2146

WREG32(VGT_OUT_DEALLOC_CNTL, (tmp * 4) & DEALLOC_DIST_MASK);

drivers/gpu/drm/radeon/r600.c

2147

WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, ((tmp * 4) - 2) & VTX_REUSE_DEPTH_MASK);

drivers/gpu/drm/radeon/r600.c

2150

WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) | ROQ_IB2_START(0x2b)));

drivers/gpu/drm/radeon/r600.c

2151

WREG32(CP_MEQ_THRESHOLDS, (MEQ_END(0x40) | ROQ_END(0x40)));

drivers/gpu/drm/radeon/r600.c

2153

WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO | SYNC_GRADIENT |

drivers/gpu/drm/radeon/r600.c

2157

WREG32(ARB_GDEC_RD_CNTL, 0x00000021);

drivers/gpu/drm/radeon/r600.c

2163

WREG32(SX_DEBUG_1, tmp);

drivers/gpu/drm/radeon/r600.c

2171

WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE);

drivers/gpu/drm/radeon/r600.c

2173

WREG32(DB_DEBUG, 0);

drivers/gpu/drm/radeon/r600.c

2175

WREG32(DB_WATERMARKS, (DEPTH_FREE(4) | DEPTH_CACHELINE_FREE(16) |

drivers/gpu/drm/radeon/r600.c

2178

WREG32(PA_SC_MULTI_CHIP_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

2179

WREG32(VGT_NUM_INSTANCES, 0);

drivers/gpu/drm/radeon/r600.c

2181

WREG32(SPI_CONFIG_CNTL, GPR_WRITE_PRIORITY(0));

drivers/gpu/drm/radeon/r600.c

2182

WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(0));

drivers/gpu/drm/radeon/r600.c

2198

WREG32(SQ_MS_FIFO_SIZES, tmp);

drivers/gpu/drm/radeon/r600.c

2280

WREG32(SQ_CONFIG, sq_config);

drivers/gpu/drm/radeon/r600.c

2281

WREG32(SQ_GPR_RESOURCE_MGMT_1, sq_gpr_resource_mgmt_1);

drivers/gpu/drm/radeon/r600.c

2282

WREG32(SQ_GPR_RESOURCE_MGMT_2, sq_gpr_resource_mgmt_2);

drivers/gpu/drm/radeon/r600.c

2283

WREG32(SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt);

drivers/gpu/drm/radeon/r600.c

2284

WREG32(SQ_STACK_RESOURCE_MGMT_1, sq_stack_resource_mgmt_1);

drivers/gpu/drm/radeon/r600.c

2285

WREG32(SQ_STACK_RESOURCE_MGMT_2, sq_stack_resource_mgmt_2);

drivers/gpu/drm/radeon/r600.c

2291

WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY));

drivers/gpu/drm/radeon/r600.c

2293

WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC));

drivers/gpu/drm/radeon/r600.c

2297

WREG32(PA_SC_AA_SAMPLE_LOCS_2S, (S0_X(0xc) | S0_Y(0x4) |

drivers/gpu/drm/radeon/r600.c

2299

WREG32(PA_SC_AA_SAMPLE_LOCS_4S, (S0_X(0xe) | S0_Y(0xe) |

drivers/gpu/drm/radeon/r600.c

2303

WREG32(PA_SC_AA_SAMPLE_LOCS_8S_WD0, (S0_X(0xe) | S0_Y(0xb) |

drivers/gpu/drm/radeon/r600.c

2307

WREG32(PA_SC_AA_SAMPLE_LOCS_8S_WD1, (S4_X(0x6) | S4_Y(0x1) |

drivers/gpu/drm/radeon/r600.c

2312

WREG32(VGT_STRMOUT_EN, 0);

drivers/gpu/drm/radeon/r600.c

2330

WREG32(VGT_ES_PER_GS, 128);

drivers/gpu/drm/radeon/r600.c

2331

WREG32(VGT_GS_PER_ES, tmp);

drivers/gpu/drm/radeon/r600.c

2332

WREG32(VGT_GS_PER_VS, 2);

drivers/gpu/drm/radeon/r600.c

2333

WREG32(VGT_GS_VERTEX_REUSE, 16);

drivers/gpu/drm/radeon/r600.c

2336

WREG32(PA_SC_LINE_STIPPLE_STATE, 0);

drivers/gpu/drm/radeon/r600.c

2337

WREG32(VGT_STRMOUT_EN, 0);

drivers/gpu/drm/radeon/r600.c

2338

WREG32(SX_MISC, 0);

drivers/gpu/drm/radeon/r600.c

2339

WREG32(PA_SC_MODE_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

2340

WREG32(PA_SC_AA_CONFIG, 0);

drivers/gpu/drm/radeon/r600.c

2341

WREG32(PA_SC_LINE_STIPPLE, 0);

drivers/gpu/drm/radeon/r600.c

2342

WREG32(SPI_INPUT_Z, 0);

drivers/gpu/drm/radeon/r600.c

2343

WREG32(SPI_PS_IN_CONTROL_0, NUM_INTERP(2));

drivers/gpu/drm/radeon/r600.c

2344

WREG32(CB_COLOR7_FRAG, 0);

drivers/gpu/drm/radeon/r600.c

2347

WREG32(CB_COLOR0_BASE, 0);

drivers/gpu/drm/radeon/r600.c

2348

WREG32(CB_COLOR1_BASE, 0);

drivers/gpu/drm/radeon/r600.c

2349

WREG32(CB_COLOR2_BASE, 0);

drivers/gpu/drm/radeon/r600.c

2350

WREG32(CB_COLOR3_BASE, 0);

drivers/gpu/drm/radeon/r600.c

2351

WREG32(CB_COLOR4_BASE, 0);

drivers/gpu/drm/radeon/r600.c

2352

WREG32(CB_COLOR5_BASE, 0);

drivers/gpu/drm/radeon/r600.c

2353

WREG32(CB_COLOR6_BASE, 0);

drivers/gpu/drm/radeon/r600.c

2354

WREG32(CB_COLOR7_BASE, 0);

drivers/gpu/drm/radeon/r600.c

2355

WREG32(CB_COLOR7_FRAG, 0);

drivers/gpu/drm/radeon/r600.c

2375

WREG32(TC_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

2378

WREG32(HDP_HOST_PATH_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

2382

WREG32(ARB_POP, tmp);

drivers/gpu/drm/radeon/r600.c

2384

WREG32(PA_SC_MULTI_CHIP_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

2385

WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA |

drivers/gpu/drm/radeon/r600.c

2387

WREG32(PA_SC_ENHANCE, FORCE_EOV_MAX_CLK_CNT(4095));

drivers/gpu/drm/radeon/r600.c

2388

WREG32(VC_ENHANCE, 0);

drivers/gpu/drm/radeon/r600.c

2401

WREG32(PCIE_PORT_INDEX, ((reg) & 0xff));

drivers/gpu/drm/radeon/r600.c

2413

WREG32(PCIE_PORT_INDEX, ((reg) & 0xff));

drivers/gpu/drm/radeon/r600.c

2415

WREG32(PCIE_PORT_DATA, (v));

drivers/gpu/drm/radeon/r600.c

2427

WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));

drivers/gpu/drm/radeon/r600.c

2428

WREG32(SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/r600.c

2640

WREG32(R600_CP_RB_WPTR, ring->wptr);

drivers/gpu/drm/radeon/r600.c

2654

WREG32(CP_RB_CNTL,

drivers/gpu/drm/radeon/r600.c

2661

WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP);

drivers/gpu/drm/radeon/r600.c

2664

WREG32(GRBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/r600.c

2666

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/r600.c

2669

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/r600.c

2671

WREG32(CP_ME_RAM_DATA,

drivers/gpu/drm/radeon/r600.c

2675

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/r600.c

2677

WREG32(CP_PFP_UCODE_DATA,

drivers/gpu/drm/radeon/r600.c

2680

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/r600.c

2681

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/r600.c

2682

WREG32(CP_ME_RAM_RADDR, 0);

drivers/gpu/drm/radeon/r600.c

2712

WREG32(R_0086D8_CP_ME_CNTL, cp_me);

drivers/gpu/drm/radeon/r600.c

2724

WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP);

drivers/gpu/drm/radeon/r600.c

2727

WREG32(GRBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/r600.c

2735

WREG32(CP_RB_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

2736

WREG32(CP_SEM_WAIT_TIMER, 0x0);

drivers/gpu/drm/radeon/r600.c

2739

WREG32(CP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/radeon/r600.c

2742

WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA);

drivers/gpu/drm/radeon/r600.c

2743

WREG32(CP_RB_RPTR_WR, 0);

drivers/gpu/drm/radeon/r600.c

2745

WREG32(CP_RB_WPTR, ring->wptr);

drivers/gpu/drm/radeon/r600.c

2748

WREG32(CP_RB_RPTR_ADDR,

drivers/gpu/drm/radeon/r600.c

2750

WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF);

drivers/gpu/drm/radeon/r600.c

2751

WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF);

drivers/gpu/drm/radeon/r600.c

2754

WREG32(SCRATCH_UMSK, 0xff);

drivers/gpu/drm/radeon/r600.c

2757

WREG32(SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/r600.c

2761

WREG32(CP_RB_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

2763

WREG32(CP_RB_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/radeon/r600.c

2764

WREG32(CP_DEBUG, (1 << 27) | (1 << 28));

drivers/gpu/drm/radeon/r600.c

2835

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/radeon/r600.c

3201

WREG32(CONFIG_CNTL, temp);

drivers/gpu/drm/radeon/r600.c

3409

WREG32(scratch, 0xCAFEDEAD);

drivers/gpu/drm/radeon/r600.c

346

WREG32(FMT_BIT_DEPTH_CONTROL + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/r600.c

3536

WREG32(SRBM_SOFT_RESET, SOFT_RESET_RLC);

drivers/gpu/drm/radeon/r600.c

3539

WREG32(SRBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/r600.c

3543

WREG32(RLC_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

3548

WREG32(RLC_CNTL, RLC_ENABLE);

drivers/gpu/drm/radeon/r600.c

3561

WREG32(RLC_HB_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

3563

WREG32(RLC_HB_BASE, 0);

drivers/gpu/drm/radeon/r600.c

3564

WREG32(RLC_HB_RPTR, 0);

drivers/gpu/drm/radeon/r600.c

3565

WREG32(RLC_HB_WPTR, 0);

drivers/gpu/drm/radeon/r600.c

3566

WREG32(RLC_HB_WPTR_LSB_ADDR, 0);

drivers/gpu/drm/radeon/r600.c

3567

WREG32(RLC_HB_WPTR_MSB_ADDR, 0);

drivers/gpu/drm/radeon/r600.c

3568

WREG32(RLC_MC_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

3569

WREG32(RLC_UCODE_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

3574

WREG32(RLC_UCODE_ADDR, i);

drivers/gpu/drm/radeon/r600.c

3575

WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/r600.c

3579

WREG32(RLC_UCODE_ADDR, i);

drivers/gpu/drm/radeon/r600.c

3580

WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/r600.c

3583

WREG32(RLC_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/r600.c

3597

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/radeon/r600.c

3598

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/radeon/r600.c

3609

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/radeon/r600.c

3610

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/radeon/r600.c

3612

WREG32(IH_RB_RPTR, 0);

drivers/gpu/drm/radeon/r600.c

3613

WREG32(IH_RB_WPTR, 0);

drivers/gpu/drm/radeon/r600.c

3622

WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);

drivers/gpu/drm/radeon/r600.c

3624

WREG32(DMA_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

3625

WREG32(GRBM_INT_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

3626

WREG32(DxMODE_INT_MASK, 0);

drivers/gpu/drm/radeon/r600.c

3627

WREG32(D1GRPH_INTERRUPT_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

3628

WREG32(D2GRPH_INTERRUPT_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

3630

WREG32(DCE3_DACA_AUTODETECT_INT_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

3631

WREG32(DCE3_DACB_AUTODETECT_INT_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

3633

WREG32(DC_HPD1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3635

WREG32(DC_HPD2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3637

WREG32(DC_HPD3_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3639

WREG32(DC_HPD4_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3642

WREG32(DC_HPD5_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3644

WREG32(DC_HPD6_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3646

WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp);

drivers/gpu/drm/radeon/r600.c

3648

WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, tmp);

drivers/gpu/drm/radeon/r600.c

3651

WREG32(HDMI0_AUDIO_PACKET_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3653

WREG32(DCE3_HDMI1_AUDIO_PACKET_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3656

WREG32(DACA_AUTODETECT_INT_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

3657

WREG32(DACB_AUTODETECT_INT_CONTROL, 0);

drivers/gpu/drm/radeon/r600.c

3659

WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3661

WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3663

WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3665

WREG32(HDMI0_AUDIO_PACKET_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3667

WREG32(HDMI1_AUDIO_PACKET_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3697

WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);

drivers/gpu/drm/radeon/r600.c

3705

WREG32(INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/radeon/r600.c

3707

WREG32(IH_RB_BASE, rdev->ih.gpu_addr >> 8);

drivers/gpu/drm/radeon/r600.c

3718

WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC);

drivers/gpu/drm/radeon/r600.c

3719

WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF);

drivers/gpu/drm/radeon/r600.c

3721

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/radeon/r600.c

3724

WREG32(IH_RB_RPTR, 0);

drivers/gpu/drm/radeon/r600.c

3725

WREG32(IH_RB_WPTR, 0);

drivers/gpu/drm/radeon/r600.c

3732

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/radeon/r600.c

3873

WREG32(CP_INT_CNTL, cp_int_cntl);

drivers/gpu/drm/radeon/r600.c

3874

WREG32(DMA_CNTL, dma_cntl);

drivers/gpu/drm/radeon/r600.c

3875

WREG32(DxMODE_INT_MASK, mode_int);

drivers/gpu/drm/radeon/r600.c

3876

WREG32(D1GRPH_INTERRUPT_CONTROL, DxGRPH_PFLIP_INT_MASK);

drivers/gpu/drm/radeon/r600.c

3877

WREG32(D2GRPH_INTERRUPT_CONTROL, DxGRPH_PFLIP_INT_MASK);

drivers/gpu/drm/radeon/r600.c

3878

WREG32(GRBM_INT_CNTL, grbm_int_cntl);

drivers/gpu/drm/radeon/r600.c

3880

WREG32(DC_HPD1_INT_CONTROL, hpd1);

drivers/gpu/drm/radeon/r600.c

3881

WREG32(DC_HPD2_INT_CONTROL, hpd2);

drivers/gpu/drm/radeon/r600.c

3882

WREG32(DC_HPD3_INT_CONTROL, hpd3);

drivers/gpu/drm/radeon/r600.c

3883

WREG32(DC_HPD4_INT_CONTROL, hpd4);

drivers/gpu/drm/radeon/r600.c

3885

WREG32(DC_HPD5_INT_CONTROL, hpd5);

drivers/gpu/drm/radeon/r600.c

3886

WREG32(DC_HPD6_INT_CONTROL, hpd6);

drivers/gpu/drm/radeon/r600.c

3887

WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, hdmi0);

drivers/gpu/drm/radeon/r600.c

3888

WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, hdmi1);

drivers/gpu/drm/radeon/r600.c

3890

WREG32(HDMI0_AUDIO_PACKET_CONTROL, hdmi0);

drivers/gpu/drm/radeon/r600.c

3891

WREG32(DCE3_HDMI1_AUDIO_PACKET_CONTROL, hdmi1);

drivers/gpu/drm/radeon/r600.c

3894

WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, hpd1);

drivers/gpu/drm/radeon/r600.c

3895

WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, hpd2);

drivers/gpu/drm/radeon/r600.c

3896

WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, hpd3);

drivers/gpu/drm/radeon/r600.c

3897

WREG32(HDMI0_AUDIO_PACKET_CONTROL, hdmi0);

drivers/gpu/drm/radeon/r600.c

3898

WREG32(HDMI1_AUDIO_PACKET_CONTROL, hdmi1);

drivers/gpu/drm/radeon/r600.c

3901

WREG32(CG_THERMAL_INT, thermal_int);

drivers/gpu/drm/radeon/r600.c

3903

WREG32(RV770_CG_THERMAL_INT, thermal_int);

drivers/gpu/drm/radeon/r600.c

3938

WREG32(D1GRPH_INTERRUPT_STATUS, DxGRPH_PFLIP_INT_CLEAR);

drivers/gpu/drm/radeon/r600.c

3940

WREG32(D2GRPH_INTERRUPT_STATUS, DxGRPH_PFLIP_INT_CLEAR);

drivers/gpu/drm/radeon/r600.c

3942

WREG32(D1MODE_VBLANK_STATUS, DxMODE_VBLANK_ACK);

drivers/gpu/drm/radeon/r600.c

3944

WREG32(D1MODE_VLINE_STATUS, DxMODE_VLINE_ACK);

drivers/gpu/drm/radeon/r600.c

3946

WREG32(D2MODE_VBLANK_STATUS, DxMODE_VBLANK_ACK);

drivers/gpu/drm/radeon/r600.c

3948

WREG32(D2MODE_VLINE_STATUS, DxMODE_VLINE_ACK);

drivers/gpu/drm/radeon/r600.c

3953

WREG32(DC_HPD1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3957

WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3964

WREG32(DC_HPD2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3968

WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3975

WREG32(DC_HPD3_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3979

WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3985

WREG32(DC_HPD4_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3991

WREG32(DC_HPD5_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

3996

WREG32(DC_HPD6_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

4001

WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET0, tmp);

drivers/gpu/drm/radeon/r600.c

4006

WREG32(AFMT_AUDIO_PACKET_CONTROL + DCE3_HDMI_OFFSET1, tmp);

drivers/gpu/drm/radeon/r600.c

4012

WREG32(HDMI0_AUDIO_PACKET_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

4018

WREG32(DCE3_HDMI1_AUDIO_PACKET_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

4022

WREG32(HDMI1_AUDIO_PACKET_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

4057

WREG32(IH_RB_CNTL, tmp);

drivers/gpu/drm/radeon/r600.c

4322

WREG32(IH_RB_RPTR, rptr);

drivers/gpu/drm/radeon/r600.c

4389

WREG32(HDP_DEBUG1, 0);

drivers/gpu/drm/radeon/r600.c

4392

WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);

drivers/gpu/drm/radeon/r600.c

4548

WREG32(MM_CFGREGS_CNTL, 0x8);

drivers/gpu/drm/radeon/r600.c

4550

WREG32(MM_CFGREGS_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

4564

WREG32(0x541c, tmp | 0x8);

drivers/gpu/drm/radeon/r600.c

4565

WREG32(MM_CFGREGS_CNTL, MM_WR_TO_CFG_EN);

drivers/gpu/drm/radeon/r600.c

4570

WREG32(MM_CFGREGS_CNTL, 0);

drivers/gpu/drm/radeon/r600.c

4612

WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);

drivers/gpu/drm/radeon/r600.c

873

WREG32(DC_HPD1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

881

WREG32(DC_HPD2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

889

WREG32(DC_HPD3_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

897

WREG32(DC_HPD4_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

905

WREG32(DC_HPD5_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

914

WREG32(DC_HPD6_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

927

WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

935

WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

943

WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

975

WREG32(DC_HPD1_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

978

WREG32(DC_HPD2_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

981

WREG32(DC_HPD3_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

984

WREG32(DC_HPD4_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

988

WREG32(DC_HPD5_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

991

WREG32(DC_HPD6_CONTROL, tmp);

drivers/gpu/drm/radeon/r600.c

999

WREG32(DC_HOT_PLUG_DETECT1_CONTROL, DC_HOT_PLUG_DETECTx_EN);

drivers/gpu/drm/radeon/r600_dma.c

106

WREG32(DMA_RB_CNTL, rb_cntl);

drivers/gpu/drm/radeon/r600_dma.c

126

WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL, 0);

drivers/gpu/drm/radeon/r600_dma.c

127

WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL, 0);

drivers/gpu/drm/radeon/r600_dma.c

135

WREG32(DMA_RB_CNTL, rb_cntl);

drivers/gpu/drm/radeon/r600_dma.c

138

WREG32(DMA_RB_RPTR, 0);

drivers/gpu/drm/radeon/r600_dma.c

139

WREG32(DMA_RB_WPTR, 0);

drivers/gpu/drm/radeon/r600_dma.c

142

WREG32(DMA_RB_RPTR_ADDR_HI,

drivers/gpu/drm/radeon/r600_dma.c

144

WREG32(DMA_RB_RPTR_ADDR_LO,

drivers/gpu/drm/radeon/r600_dma.c

150

WREG32(DMA_RB_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/radeon/r600_dma.c

157

WREG32(DMA_IB_CNTL, ib_cntl);

drivers/gpu/drm/radeon/r600_dma.c

161

WREG32(DMA_CNTL, dma_cntl);

drivers/gpu/drm/radeon/r600_dma.c

164

WREG32(DMA_MODE, 1);

drivers/gpu/drm/radeon/r600_dma.c

167

WREG32(DMA_RB_WPTR, ring->wptr << 2);

drivers/gpu/drm/radeon/r600_dma.c

169

WREG32(DMA_RB_CNTL, rb_cntl | DMA_RB_ENABLE);

drivers/gpu/drm/radeon/r600_dma.c

88

WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc);

drivers/gpu/drm/radeon/r600_dpm.c

249

WREG32(CG_RLC_REQ_AND_RSP, 0x2);

drivers/gpu/drm/radeon/r600_dpm.c

257

WREG32(CG_RLC_REQ_AND_RSP, 0x0);

drivers/gpu/drm/radeon/r600_dpm.c

259

WREG32(GRBM_PWR_CNTL, 0x1);

drivers/gpu/drm/radeon/r600_dpm.c

338

WREG32(CG_BSP, BSP(p) | BSU(u));

drivers/gpu/drm/radeon/r600_dpm.c

345

WREG32(CG_RT, FLS(l_to_m) | FMS(m_to_h));

drivers/gpu/drm/radeon/r600_dpm.c

346

WREG32(CG_LT, FHS(h_to_m) | FMS(m_to_l));

drivers/gpu/drm/radeon/r600_dpm.c

352

WREG32(CG_FFCT_0 + (index * 4), UTC_0(u_t) | DTC_0(d_t));

drivers/gpu/drm/radeon/r600_dpm.c

370

WREG32(CG_FTV, vrv);

drivers/gpu/drm/radeon/r600_dpm.c

522

WREG32(LOWER_GPIO_ENABLE, mask & 0xffffffff);

drivers/gpu/drm/radeon/r600_dpm.c

523

WREG32(UPPER_GPIO_ENABLE, upper_32_bits(mask));

drivers/gpu/drm/radeon/r600_dpm.c

533

WREG32(CTXSW_VID_LOWER_GPIO_CNTL + (ix * 4), pins & 0xffffffff);

drivers/gpu/drm/radeon/r600_dpm.c

538

WREG32(VID_UPPER_GPIO_CNTL, tmp);

drivers/gpu/drm/radeon/r600_dpm.c

548

WREG32(GPIOPAD_MASK, gpio);

drivers/gpu/drm/radeon/r600_dpm.c

552

WREG32(GPIOPAD_EN, gpio);

drivers/gpu/drm/radeon/r600_dpm.c

556

WREG32(GPIOPAD_A, gpio);

drivers/gpu/drm/radeon/r600_hdmi.c

169

WREG32(AZ_HOT_PLUG_CONTROL, tmp);

drivers/gpu/drm/radeon/r600_hdmi.c

223

WREG32(HDMI0_AVI_INFO0 + offset,

drivers/gpu/drm/radeon/r600_hdmi.c

225

WREG32(HDMI0_AVI_INFO1 + offset,

drivers/gpu/drm/radeon/r600_hdmi.c

227

WREG32(HDMI0_AVI_INFO2 + offset,

drivers/gpu/drm/radeon/r600_hdmi.c

229

WREG32(HDMI0_AVI_INFO3 + offset,

drivers/gpu/drm/radeon/r600_hdmi.c

254

WREG32(HDMI0_AUDIO_INFO0 + offset,

drivers/gpu/drm/radeon/r600_hdmi.c

256

WREG32(HDMI0_AUDIO_INFO1 + offset,

drivers/gpu/drm/radeon/r600_hdmi.c

309

WREG32(DCCG_AUDIO_DTO0_PHASE, 24000 * 100);

drivers/gpu/drm/radeon/r600_hdmi.c

310

WREG32(DCCG_AUDIO_DTO0_MODULE, clock * 100);

drivers/gpu/drm/radeon/r600_hdmi.c

311

WREG32(DCCG_AUDIO_DTO_SELECT, 0); /* select DTO0 */

drivers/gpu/drm/radeon/r600_hdmi.c

313

WREG32(DCCG_AUDIO_DTO1_PHASE, 24000 * 100);

drivers/gpu/drm/radeon/r600_hdmi.c

314

WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100);

drivers/gpu/drm/radeon/r600_hdmi.c

315

WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */

drivers/gpu/drm/radeon/r600_hdmi.c

429

WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,

drivers/gpu/drm/radeon/r600_hdmi.c

497

WREG32(HDMI0_CONTROL + dig->afmt->offset, hdmi);

drivers/gpu/drm/radeon/radeon.h

2540

WREG32(reg, tmp_); \

drivers/gpu/drm/radeon/radeon_agp.c

346

WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000);

drivers/gpu/drm/radeon/radeon_atombios.c

4088

WREG32(R600_BIOS_2_SCRATCH, bios_2_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4089

WREG32(R600_BIOS_6_SCRATCH, bios_6_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4091

WREG32(RADEON_BIOS_2_SCRATCH, bios_2_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4092

WREG32(RADEON_BIOS_6_SCRATCH, bios_6_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4122

WREG32(scratch_reg + (i * 4), rdev->bios_scratch[i]);

drivers/gpu/drm/radeon/radeon_atombios.c

4145

WREG32(R600_BIOS_6_SCRATCH, bios_6_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4147

WREG32(RADEON_BIOS_6_SCRATCH, bios_6_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4327

WREG32(R600_BIOS_0_SCRATCH, bios_0_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4328

WREG32(R600_BIOS_3_SCRATCH, bios_3_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4329

WREG32(R600_BIOS_6_SCRATCH, bios_6_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4331

WREG32(RADEON_BIOS_0_SCRATCH, bios_0_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4332

WREG32(RADEON_BIOS_3_SCRATCH, bios_3_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4333

WREG32(RADEON_BIOS_6_SCRATCH, bios_6_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4387

WREG32(R600_BIOS_3_SCRATCH, bios_3_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4389

WREG32(RADEON_BIOS_3_SCRATCH, bios_3_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4470

WREG32(R600_BIOS_2_SCRATCH, bios_2_scratch);

drivers/gpu/drm/radeon/radeon_atombios.c

4472

WREG32(RADEON_BIOS_2_SCRATCH, bios_2_scratch);

drivers/gpu/drm/radeon/radeon_audio.c

65

WREG32(reg, v);

drivers/gpu/drm/radeon/radeon_bios.c

266

WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));

drivers/gpu/drm/radeon/radeon_bios.c

269

WREG32(AVIVO_D1VGA_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

272

WREG32(AVIVO_D2VGA_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

275

WREG32(AVIVO_VGA_RENDER_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

278

WREG32(R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE);

drivers/gpu/drm/radeon/radeon_bios.c

283

WREG32(R600_BUS_CNTL, bus_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

285

WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);

drivers/gpu/drm/radeon/radeon_bios.c

286

WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);

drivers/gpu/drm/radeon/radeon_bios.c

287

WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);

drivers/gpu/drm/radeon/radeon_bios.c

289

WREG32(R600_ROM_CNTL, rom_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

313

WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));

drivers/gpu/drm/radeon/radeon_bios.c

315

WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));

drivers/gpu/drm/radeon/radeon_bios.c

317

WREG32(AVIVO_D1VGA_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

320

WREG32(AVIVO_D2VGA_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

323

WREG32(AVIVO_VGA_RENDER_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

330

WREG32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl |

drivers/gpu/drm/radeon/radeon_bios.c

338

WREG32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));

drivers/gpu/drm/radeon/radeon_bios.c

340

WREG32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));

drivers/gpu/drm/radeon/radeon_bios.c

346

WREG32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

353

WREG32(RADEON_VIPH_CONTROL, viph_control);

drivers/gpu/drm/radeon/radeon_bios.c

354

WREG32(R600_BUS_CNTL, bus_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

355

WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);

drivers/gpu/drm/radeon/radeon_bios.c

356

WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);

drivers/gpu/drm/radeon/radeon_bios.c

357

WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);

drivers/gpu/drm/radeon/radeon_bios.c

358

WREG32(R600_ROM_CNTL, rom_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

392

WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));

drivers/gpu/drm/radeon/radeon_bios.c

394

WREG32(R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));

drivers/gpu/drm/radeon/radeon_bios.c

396

WREG32(AVIVO_D1VGA_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

399

WREG32(AVIVO_D2VGA_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

402

WREG32(AVIVO_VGA_RENDER_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

405

WREG32(R600_ROM_CNTL,

drivers/gpu/drm/radeon/radeon_bios.c

410

WREG32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));

drivers/gpu/drm/radeon/radeon_bios.c

411

WREG32(R600_LOW_VID_LOWER_GPIO_CNTL,

drivers/gpu/drm/radeon/radeon_bios.c

413

WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL,

drivers/gpu/drm/radeon/radeon_bios.c

415

WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL,

drivers/gpu/drm/radeon/radeon_bios.c

417

WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL,

drivers/gpu/drm/radeon/radeon_bios.c

419

WREG32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));

drivers/gpu/drm/radeon/radeon_bios.c

424

WREG32(RADEON_VIPH_CONTROL, viph_control);

drivers/gpu/drm/radeon/radeon_bios.c

425

WREG32(R600_BUS_CNTL, bus_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

426

WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);

drivers/gpu/drm/radeon/radeon_bios.c

427

WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);

drivers/gpu/drm/radeon/radeon_bios.c

428

WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);

drivers/gpu/drm/radeon/radeon_bios.c

429

WREG32(R600_ROM_CNTL, rom_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

430

WREG32(R600_GENERAL_PWRMGT, general_pwrmgt);

drivers/gpu/drm/radeon/radeon_bios.c

431

WREG32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

432

WREG32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

433

WREG32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

434

WREG32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

435

WREG32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);

drivers/gpu/drm/radeon/radeon_bios.c

462

WREG32(RADEON_SEPROM_CNTL1,

drivers/gpu/drm/radeon/radeon_bios.c

465

WREG32(RADEON_GPIOPAD_A, 0);

drivers/gpu/drm/radeon/radeon_bios.c

466

WREG32(RADEON_GPIOPAD_EN, 0);

drivers/gpu/drm/radeon/radeon_bios.c

467

WREG32(RADEON_GPIOPAD_MASK, 0);

drivers/gpu/drm/radeon/radeon_bios.c

470

WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));

drivers/gpu/drm/radeon/radeon_bios.c

473

WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));

drivers/gpu/drm/radeon/radeon_bios.c

476

WREG32(AVIVO_D1VGA_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

479

WREG32(AVIVO_D2VGA_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

482

WREG32(AVIVO_VGA_RENDER_CONTROL,

drivers/gpu/drm/radeon/radeon_bios.c

488

WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1);

drivers/gpu/drm/radeon/radeon_bios.c

489

WREG32(RADEON_VIPH_CONTROL, viph_control);

drivers/gpu/drm/radeon/radeon_bios.c

490

WREG32(RV370_BUS_CNTL, bus_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

491

WREG32(AVIVO_D1VGA_CONTROL, d1vga_control);

drivers/gpu/drm/radeon/radeon_bios.c

492

WREG32(AVIVO_D2VGA_CONTROL, d2vga_control);

drivers/gpu/drm/radeon/radeon_bios.c

493

WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);

drivers/gpu/drm/radeon/radeon_bios.c

494

WREG32(RADEON_GPIOPAD_A, gpiopad_a);

drivers/gpu/drm/radeon/radeon_bios.c

495

WREG32(RADEON_GPIOPAD_EN, gpiopad_en);

drivers/gpu/drm/radeon/radeon_bios.c

496

WREG32(RADEON_GPIOPAD_MASK, gpiopad_mask);

drivers/gpu/drm/radeon/radeon_bios.c

530

WREG32(RADEON_SEPROM_CNTL1,

drivers/gpu/drm/radeon/radeon_bios.c

535

WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));

drivers/gpu/drm/radeon/radeon_bios.c

539

WREG32(RV370_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));

drivers/gpu/drm/radeon/radeon_bios.c

541

WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));

drivers/gpu/drm/radeon/radeon_bios.c

544

WREG32(RADEON_CRTC_GEN_CNTL,

drivers/gpu/drm/radeon/radeon_bios.c

549

WREG32(RADEON_CRTC2_GEN_CNTL,

drivers/gpu/drm/radeon/radeon_bios.c

554

WREG32(RADEON_CRTC_EXT_CNTL,

drivers/gpu/drm/radeon/radeon_bios.c

560

WREG32(RADEON_FP2_GEN_CNTL, (fp2_gen_cntl & ~RADEON_FP2_ON));

drivers/gpu/drm/radeon/radeon_bios.c

566

WREG32(RADEON_SEPROM_CNTL1, seprom_cntl1);

drivers/gpu/drm/radeon/radeon_bios.c

567

WREG32(RADEON_VIPH_CONTROL, viph_control);

drivers/gpu/drm/radeon/radeon_bios.c

569

WREG32(RV370_BUS_CNTL, bus_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

571

WREG32(RADEON_BUS_CNTL, bus_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

572

WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

574

WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

576

WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);

drivers/gpu/drm/radeon/radeon_bios.c

578

WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);

drivers/gpu/drm/radeon/radeon_combios.c

2894

WREG32(reg, val);

drivers/gpu/drm/radeon/radeon_combios.c

2904

WREG32(reg, val);

drivers/gpu/drm/radeon/radeon_combios.c

2948

WREG32(reg, val);

drivers/gpu/drm/radeon/radeon_combios.c

2958

WREG32(reg, val);

drivers/gpu/drm/radeon/radeon_combios.c

3011

WREG32(addr, val);

drivers/gpu/drm/radeon/radeon_combios.c

3016

WREG32(addr, val);

drivers/gpu/drm/radeon/radeon_combios.c

3026

WREG32(addr, tmp);

drivers/gpu/drm/radeon/radeon_combios.c

3036

WREG32(addr, tmp);

drivers/gpu/drm/radeon/radeon_combios.c

3198

WREG32(RADEON_MEM_SDRAM_MODE_REG, tmp);

drivers/gpu/drm/radeon/radeon_combios.c

3204

WREG32(RADEON_MEM_SDRAM_MODE_REG, tmp);

drivers/gpu/drm/radeon/radeon_combios.c

3225

WREG32(RADEON_MEM_CNTL, mem_cntl);

drivers/gpu/drm/radeon/radeon_combios.c

3264

WREG32(RADEON_MEM_CNTL, mem_cntl);

drivers/gpu/drm/radeon/radeon_combios.c

3302

WREG32(RADEON_CONFIG_MEMSIZE, mem_size);

drivers/gpu/drm/radeon/radeon_combios.c

3416

WREG32(RADEON_BIOS_0_SCRATCH, bios_0_scratch);

drivers/gpu/drm/radeon/radeon_combios.c

3417

WREG32(RADEON_BIOS_6_SCRATCH, bios_6_scratch);

drivers/gpu/drm/radeon/radeon_combios.c

3418

WREG32(RADEON_BIOS_7_SCRATCH, bios_7_scratch);

drivers/gpu/drm/radeon/radeon_combios.c

3434

WREG32(RADEON_BIOS_6_SCRATCH, bios_6_scratch);

drivers/gpu/drm/radeon/radeon_combios.c

3536

WREG32(RADEON_BIOS_4_SCRATCH, bios_4_scratch);

drivers/gpu/drm/radeon/radeon_combios.c

3537

WREG32(RADEON_BIOS_5_SCRATCH, bios_5_scratch);

drivers/gpu/drm/radeon/radeon_combios.c

3572

WREG32(RADEON_BIOS_5_SCRATCH, bios_5_scratch);

drivers/gpu/drm/radeon/radeon_combios.c

3607

WREG32(RADEON_BIOS_6_SCRATCH, bios_6_scratch);

drivers/gpu/drm/radeon/radeon_cursor.c

101

WREG32(EVERGREEN_CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_cursor.c

103

WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset);

drivers/gpu/drm/radeon/radeon_cursor.c

104

WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN |

drivers/gpu/drm/radeon/radeon_cursor.c

110

WREG32(R700_D2CUR_SURFACE_ADDRESS_HIGH,

drivers/gpu/drm/radeon/radeon_cursor.c

113

WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH,

drivers/gpu/drm/radeon/radeon_cursor.c

117

WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_cursor.c

119

WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);

drivers/gpu/drm/radeon/radeon_cursor.c

120

WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |

drivers/gpu/drm/radeon/radeon_cursor.c

124

WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_cursor.c

129

WREG32(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);

drivers/gpu/drm/radeon/radeon_cursor.c

132

WREG32(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);

drivers/gpu/drm/radeon/radeon_cursor.c

218

WREG32(EVERGREEN_CUR_POSITION + radeon_crtc->crtc_offset, (x << 16) | y);

drivers/gpu/drm/radeon/radeon_cursor.c

219

WREG32(EVERGREEN_CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin);

drivers/gpu/drm/radeon/radeon_cursor.c

220

WREG32(EVERGREEN_CUR_SIZE + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_cursor.c

223

WREG32(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset, (x << 16) | y);

drivers/gpu/drm/radeon/radeon_cursor.c

224

WREG32(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin);

drivers/gpu/drm/radeon/radeon_cursor.c

225

WREG32(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_cursor.c

234

WREG32(RADEON_CUR_HORZ_VERT_OFF + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_cursor.c

238

WREG32(RADEON_CUR_HORZ_VERT_POSN + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_cursor.c

243

WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_cursor.c

44

WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);

drivers/gpu/drm/radeon/radeon_cursor.c

51

WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);

drivers/gpu/drm/radeon/radeon_cursor.c

58

WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock);

drivers/gpu/drm/radeon/radeon_cursor.c

99

WREG32(EVERGREEN_CUR_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_device.c

224

WREG32(reg, tmp);

drivers/gpu/drm/radeon/radeon_device.c

253

WREG32(RADEON_SURFACE_CNTL, 0);

drivers/gpu/drm/radeon/radeon_device.c

909

WREG32(reg*4, val);

drivers/gpu/drm/radeon/radeon_display.c

100

WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

101

WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

103

WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/radeon/radeon_display.c

104

WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/radeon/radeon_display.c

105

WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/radeon/radeon_display.c

107

WREG32(EVERGREEN_DC_LUT_RW_MODE + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

108

WREG32(EVERGREEN_DC_LUT_WRITE_EN_MASK + radeon_crtc->crtc_offset, 0x00000007);

drivers/gpu/drm/radeon/radeon_display.c

110

WREG32(EVERGREEN_DC_LUT_RW_INDEX + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

115

WREG32(EVERGREEN_DC_LUT_30_COLOR + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

134

WREG32(NI_INPUT_CSC_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

137

WREG32(NI_PRESCALE_GRPH_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

139

WREG32(NI_PRESCALE_OVL_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

141

WREG32(NI_INPUT_GAMMA_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

145

WREG32(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

147

WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

148

WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

149

WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

151

WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/radeon/radeon_display.c

152

WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/radeon/radeon_display.c

153

WREG32(EVERGREEN_DC_LUT_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/radeon/radeon_display.c

155

WREG32(EVERGREEN_DC_LUT_RW_MODE + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

156

WREG32(EVERGREEN_DC_LUT_WRITE_EN_MASK + radeon_crtc->crtc_offset, 0x00000007);

drivers/gpu/drm/radeon/radeon_display.c

158

WREG32(EVERGREEN_DC_LUT_RW_INDEX + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

163

WREG32(EVERGREEN_DC_LUT_30_COLOR + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

169

WREG32(NI_DEGAMMA_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

174

WREG32(NI_GAMUT_REMAP_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

177

WREG32(NI_REGAMMA_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

180

WREG32(NI_OUTPUT_CSC_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

184

WREG32(0x6940 + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

189

WREG32(CIK_ALPHA_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/radeon_display.c

208

WREG32(RADEON_DAC_CNTL2, dac2_cntl);

drivers/gpu/drm/radeon/radeon_display.c

215

WREG32(RADEON_PALETTE_30_DATA,

drivers/gpu/drm/radeon/radeon_display.c

59

WREG32(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

61

WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

62

WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

63

WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

65

WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/radeon/radeon_display.c

66

WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/radeon/radeon_display.c

67

WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff);

drivers/gpu/drm/radeon/radeon_display.c

69

WREG32(AVIVO_DC_LUT_RW_SELECT, radeon_crtc->crtc_id);

drivers/gpu/drm/radeon/radeon_display.c

70

WREG32(AVIVO_DC_LUT_RW_MODE, 0);

drivers/gpu/drm/radeon/radeon_display.c

71

WREG32(AVIVO_DC_LUT_WRITE_EN_MASK, 0x0000003f);

drivers/gpu/drm/radeon/radeon_display.c

78

WREG32(AVIVO_DC_LUT_30_COLOR,

drivers/gpu/drm/radeon/radeon_display.c

97

WREG32(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_display.c

99

WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_dp_auxch.c

101

WREG32(chan->rec.mask_clk_reg, tmp);

drivers/gpu/drm/radeon/radeon_dp_auxch.c

110

WREG32(AUX_CONTROL + aux_offset[instance], tmp);

drivers/gpu/drm/radeon/radeon_dp_auxch.c

113

WREG32(AUX_SW_CONTROL + aux_offset[instance],

drivers/gpu/drm/radeon/radeon_dp_auxch.c

115

WREG32(AUX_SW_CONTROL + aux_offset[instance],

drivers/gpu/drm/radeon/radeon_dp_auxch.c

121

WREG32(AUX_SW_DATA + aux_offset[instance],

drivers/gpu/drm/radeon/radeon_dp_auxch.c

125

WREG32(AUX_SW_DATA + aux_offset[instance],

drivers/gpu/drm/radeon/radeon_dp_auxch.c

129

WREG32(AUX_SW_DATA + aux_offset[instance],

drivers/gpu/drm/radeon/radeon_dp_auxch.c

133

WREG32(AUX_SW_DATA + aux_offset[instance],

drivers/gpu/drm/radeon/radeon_dp_auxch.c

139

WREG32(AUX_SW_DATA + aux_offset[instance],

drivers/gpu/drm/radeon/radeon_dp_auxch.c

145

WREG32(AUX_SW_INTERRUPT_CONTROL + aux_offset[instance], AUX_SW_DONE_ACK);

drivers/gpu/drm/radeon/radeon_dp_auxch.c

148

WREG32(AUX_SW_CONTROL + aux_offset[instance],

drivers/gpu/drm/radeon/radeon_dp_auxch.c

178

WREG32(AUX_SW_DATA + aux_offset[instance],

drivers/gpu/drm/radeon/radeon_dp_auxch.c

193

WREG32(AUX_SW_INTERRUPT_CONTROL + aux_offset[instance], AUX_SW_DONE_ACK);

drivers/gpu/drm/radeon/radeon_fence.c

75

WREG32(drv->scratch_reg, seq);

drivers/gpu/drm/radeon/radeon_i2c.c

112

WREG32(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |

drivers/gpu/drm/radeon/radeon_i2c.c

115

WREG32(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |

drivers/gpu/drm/radeon/radeon_i2c.c

126

WREG32(rec->mask_clk_reg, temp);

drivers/gpu/drm/radeon/radeon_i2c.c

131

WREG32(rec->a_clk_reg, temp);

drivers/gpu/drm/radeon/radeon_i2c.c

134

WREG32(rec->a_data_reg, temp);

drivers/gpu/drm/radeon/radeon_i2c.c

138

WREG32(rec->en_clk_reg, temp);

drivers/gpu/drm/radeon/radeon_i2c.c

141

WREG32(rec->en_data_reg, temp);

drivers/gpu/drm/radeon/radeon_i2c.c

145

WREG32(rec->mask_clk_reg, temp);

drivers/gpu/drm/radeon/radeon_i2c.c

149

WREG32(rec->mask_data_reg, temp);

drivers/gpu/drm/radeon/radeon_i2c.c

164

WREG32(rec->mask_clk_reg, temp);

drivers/gpu/drm/radeon/radeon_i2c.c

168

WREG32(rec->mask_data_reg, temp);

drivers/gpu/drm/radeon/radeon_i2c.c

213

WREG32(rec->en_clk_reg, val);

drivers/gpu/drm/radeon/radeon_i2c.c

226

WREG32(rec->en_data_reg, val);

drivers/gpu/drm/radeon/radeon_i2c.c

347

WREG32(RADEON_BIOS_6_SCRATCH, tmp | ATOM_S6_HW_I2C_BUSY_STATE);

drivers/gpu/drm/radeon/radeon_i2c.c

461

WREG32(i2c_cntl_0, (RADEON_I2C_DONE |

drivers/gpu/drm/radeon/radeon_i2c.c

465

WREG32(i2c_data, (p->addr << 1) & 0xff);

drivers/gpu/drm/radeon/radeon_i2c.c

466

WREG32(i2c_data, 0);

drivers/gpu/drm/radeon/radeon_i2c.c

467

WREG32(i2c_cntl_1, ((1 << RADEON_I2C_DATA_COUNT_SHIFT) |

drivers/gpu/drm/radeon/radeon_i2c.c

471

WREG32(i2c_cntl_0, reg);

drivers/gpu/drm/radeon/radeon_i2c.c

482

WREG32(i2c_cntl_0, tmp | RADEON_I2C_ABORT);

drivers/gpu/drm/radeon/radeon_i2c.c

494

WREG32(i2c_cntl_0, (RADEON_I2C_DONE |

drivers/gpu/drm/radeon/radeon_i2c.c

498

WREG32(i2c_data, ((p->addr << 1) & 0xff) | 0x1);

drivers/gpu/drm/radeon/radeon_i2c.c

499

WREG32(i2c_cntl_1, ((1 << RADEON_I2C_DATA_COUNT_SHIFT) |

drivers/gpu/drm/radeon/radeon_i2c.c

503

WREG32(i2c_cntl_0, reg | RADEON_I2C_RECEIVE);

drivers/gpu/drm/radeon/radeon_i2c.c

514

WREG32(i2c_cntl_0, tmp | RADEON_I2C_ABORT);

drivers/gpu/drm/radeon/radeon_i2c.c

521

WREG32(i2c_cntl_0, (RADEON_I2C_DONE |

drivers/gpu/drm/radeon/radeon_i2c.c

525

WREG32(i2c_data, (p->addr << 1) & 0xff);

drivers/gpu/drm/radeon/radeon_i2c.c

526

WREG32(i2c_data, p->buf[j]);

drivers/gpu/drm/radeon/radeon_i2c.c

527

WREG32(i2c_cntl_1, ((1 << RADEON_I2C_DATA_COUNT_SHIFT) |

drivers/gpu/drm/radeon/radeon_i2c.c

531

WREG32(i2c_cntl_0, reg);

drivers/gpu/drm/radeon/radeon_i2c.c

542

WREG32(i2c_cntl_0, tmp | RADEON_I2C_ABORT);

drivers/gpu/drm/radeon/radeon_i2c.c

552

WREG32(i2c_cntl_0, 0);

drivers/gpu/drm/radeon/radeon_i2c.c

553

WREG32(i2c_cntl_1, 0);

drivers/gpu/drm/radeon/radeon_i2c.c

554

WREG32(i2c_cntl_0, (RADEON_I2C_DONE |

drivers/gpu/drm/radeon/radeon_i2c.c

562

WREG32(RADEON_BIOS_6_SCRATCH, tmp);

drivers/gpu/drm/radeon/radeon_i2c.c

595

WREG32(rec->mask_clk_reg, tmp);

drivers/gpu/drm/radeon/radeon_i2c.c

600

WREG32(rec->mask_data_reg, tmp);

drivers/gpu/drm/radeon/radeon_i2c.c

606

WREG32(rec->a_clk_reg, tmp);

drivers/gpu/drm/radeon/radeon_i2c.c

611

WREG32(rec->a_data_reg, tmp);

drivers/gpu/drm/radeon/radeon_i2c.c

617

WREG32(rec->en_clk_reg, tmp);

drivers/gpu/drm/radeon/radeon_i2c.c

622

WREG32(rec->en_data_reg, tmp);

drivers/gpu/drm/radeon/radeon_i2c.c

627

WREG32(RADEON_BIOS_6_SCRATCH, tmp | ATOM_S6_HW_I2C_BUSY_STATE);

drivers/gpu/drm/radeon/radeon_i2c.c

630

WREG32(0x494, saved2 | 0x1);

drivers/gpu/drm/radeon/radeon_i2c.c

632

WREG32(AVIVO_DC_I2C_ARBITRATION, AVIVO_DC_I2C_SW_WANTS_TO_USE_I2C);

drivers/gpu/drm/radeon/radeon_i2c.c

664

WREG32(AVIVO_DC_I2C_STATUS1, (AVIVO_DC_I2C_DONE |

drivers/gpu/drm/radeon/radeon_i2c.c

667

WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_SOFT_RESET);

drivers/gpu/drm/radeon/radeon_i2c.c

669

WREG32(AVIVO_DC_I2C_RESET, 0);

drivers/gpu/drm/radeon/radeon_i2c.c

671

WREG32(AVIVO_DC_I2C_DATA, (p->addr << 1) & 0xff);

drivers/gpu/drm/radeon/radeon_i2c.c

672

WREG32(AVIVO_DC_I2C_DATA, 0);

drivers/gpu/drm/radeon/radeon_i2c.c

674

WREG32(AVIVO_DC_I2C_CONTROL3, AVIVO_DC_I2C_TIME_LIMIT(48));

drivers/gpu/drm/radeon/radeon_i2c.c

675

WREG32(AVIVO_DC_I2C_CONTROL2, (AVIVO_DC_I2C_ADDR_COUNT(1) |

drivers/gpu/drm/radeon/radeon_i2c.c

678

WREG32(AVIVO_DC_I2C_CONTROL1, reg);

drivers/gpu/drm/radeon/radeon_i2c.c

679

WREG32(AVIVO_DC_I2C_STATUS1, AVIVO_DC_I2C_GO);

drivers/gpu/drm/radeon/radeon_i2c.c

690

WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_ABORT);

drivers/gpu/drm/radeon/radeon_i2c.c

708

WREG32(AVIVO_DC_I2C_STATUS1, (AVIVO_DC_I2C_DONE |

drivers/gpu/drm/radeon/radeon_i2c.c

711

WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_SOFT_RESET);

drivers/gpu/drm/radeon/radeon_i2c.c

713

WREG32(AVIVO_DC_I2C_RESET, 0);

drivers/gpu/drm/radeon/radeon_i2c.c

715

WREG32(AVIVO_DC_I2C_DATA, ((p->addr << 1) & 0xff) | 0x1);

drivers/gpu/drm/radeon/radeon_i2c.c

716

WREG32(AVIVO_DC_I2C_CONTROL3, AVIVO_DC_I2C_TIME_LIMIT(48));

drivers/gpu/drm/radeon/radeon_i2c.c

717

WREG32(AVIVO_DC_I2C_CONTROL2, (AVIVO_DC_I2C_ADDR_COUNT(1) |

drivers/gpu/drm/radeon/radeon_i2c.c

720

WREG32(AVIVO_DC_I2C_CONTROL1, reg | AVIVO_DC_I2C_RECEIVE);

drivers/gpu/drm/radeon/radeon_i2c.c

721

WREG32(AVIVO_DC_I2C_STATUS1, AVIVO_DC_I2C_GO);

drivers/gpu/drm/radeon/radeon_i2c.c

732

WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_ABORT);

drivers/gpu/drm/radeon/radeon_i2c.c

748

WREG32(AVIVO_DC_I2C_STATUS1, (AVIVO_DC_I2C_DONE |

drivers/gpu/drm/radeon/radeon_i2c.c

751

WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_SOFT_RESET);

drivers/gpu/drm/radeon/radeon_i2c.c

753

WREG32(AVIVO_DC_I2C_RESET, 0);

drivers/gpu/drm/radeon/radeon_i2c.c

755

WREG32(AVIVO_DC_I2C_DATA, (p->addr << 1) & 0xff);

drivers/gpu/drm/radeon/radeon_i2c.c

757

WREG32(AVIVO_DC_I2C_DATA, p->buf[buffer_offset + j]);

drivers/gpu/drm/radeon/radeon_i2c.c

759

WREG32(AVIVO_DC_I2C_CONTROL3, AVIVO_DC_I2C_TIME_LIMIT(48));

drivers/gpu/drm/radeon/radeon_i2c.c

760

WREG32(AVIVO_DC_I2C_CONTROL2, (AVIVO_DC_I2C_ADDR_COUNT(1) |

drivers/gpu/drm/radeon/radeon_i2c.c

763

WREG32(AVIVO_DC_I2C_CONTROL1, reg);

drivers/gpu/drm/radeon/radeon_i2c.c

764

WREG32(AVIVO_DC_I2C_STATUS1, AVIVO_DC_I2C_GO);

drivers/gpu/drm/radeon/radeon_i2c.c

775

WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_ABORT);

drivers/gpu/drm/radeon/radeon_i2c.c

787

WREG32(AVIVO_DC_I2C_STATUS1, (AVIVO_DC_I2C_DONE |

drivers/gpu/drm/radeon/radeon_i2c.c

790

WREG32(AVIVO_DC_I2C_RESET, AVIVO_DC_I2C_SOFT_RESET);

drivers/gpu/drm/radeon/radeon_i2c.c

792

WREG32(AVIVO_DC_I2C_RESET, 0);

drivers/gpu/drm/radeon/radeon_i2c.c

794

WREG32(AVIVO_DC_I2C_ARBITRATION, AVIVO_DC_I2C_SW_DONE_USING_I2C);

drivers/gpu/drm/radeon/radeon_i2c.c

795

WREG32(AVIVO_DC_I2C_CONTROL1, saved1);

drivers/gpu/drm/radeon/radeon_i2c.c

796

WREG32(0x494, saved2);

drivers/gpu/drm/radeon/radeon_i2c.c

799

WREG32(RADEON_BIOS_6_SCRATCH, tmp);

drivers/gpu/drm/radeon/radeon_irq_kms.c

600

WREG32(reg, tmp |= mask);

drivers/gpu/drm/radeon/radeon_irq_kms.c

603

WREG32(reg, tmp & ~mask);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

203

WREG32(RADEON_FP_HORZ_STRETCH, fp_horz_stretch);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

204

WREG32(RADEON_FP_VERT_STRETCH, fp_vert_stretch);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

205

WREG32(RADEON_CRTC_MORE_CNTL, crtc_more_cntl);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

206

WREG32(RADEON_FP_HORZ_VERT_ACTIVE, fp_horz_vert_active);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

207

WREG32(RADEON_FP_H_SYNC_STRT_WID, fp_h_sync_strt_wid);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

208

WREG32(RADEON_FP_V_SYNC_STRT_WID, fp_v_sync_strt_wid);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

209

WREG32(RADEON_FP_CRTC_H_TOTAL_DISP, fp_crtc_h_total_disp);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

210

WREG32(RADEON_FP_CRTC_V_TOTAL_DISP, fp_crtc_v_total_disp);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

44

WREG32(RADEON_OVR_CLR + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

45

WREG32(RADEON_OVR_WID_LEFT_RIGHT + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

46

WREG32(RADEON_OVR_WID_TOP_BOTTOM + radeon_crtc->crtc_offset, 0);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

532

WREG32(gen_cntl_reg, gen_cntl_val);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

536

WREG32(RADEON_DISPLAY_BASE_ADDR + radeon_crtc->crtc_offset, radeon_crtc->legacy_display_base_addr);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

540

WREG32(R300_CRTC2_TILE_X0_Y0, crtc_tile_x0_y0);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

542

WREG32(R300_CRTC_TILE_X0_Y0, crtc_tile_x0_y0);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

544

WREG32(RADEON_CRTC_OFFSET_CNTL + radeon_crtc->crtc_offset, crtc_offset_cntl);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

545

WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, crtc_offset);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

546

WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

668

WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

669

WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

671

WREG32(RADEON_FP_H2_SYNC_STRT_WID, crtc_h_sync_strt_wid);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

672

WREG32(RADEON_FP_V2_SYNC_STRT_WID, crtc_v_sync_strt_wid);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

705

WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

706

WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

707

WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

715

WREG32(RADEON_CRTC_H_TOTAL_DISP + radeon_crtc->crtc_offset, crtc_h_total_disp);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

716

WREG32(RADEON_CRTC_H_SYNC_STRT_WID + radeon_crtc->crtc_offset, crtc_h_sync_strt_wid);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

717

WREG32(RADEON_CRTC_V_TOTAL_DISP + radeon_crtc->crtc_offset, crtc_v_total_disp);

drivers/gpu/drm/radeon/radeon_legacy_crtc.c

718

WREG32(RADEON_CRTC_V_SYNC_STRT_WID + radeon_crtc->crtc_offset, crtc_v_sync_strt_wid);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

100

WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1000

WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

105

WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1105

WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1108

WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1111

WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1112

WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

115

WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1203

WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1222

WREG32(RADEON_DAC_CNTL, dac_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

125

WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1250

WREG32(RADEON_DAC_CNTL2, dac2_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1275

WREG32(RADEON_DAC_CNTL2, dac2_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

128

WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1280

WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1282

WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1284

WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1287

WREG32(RADEON_DISP_TV_OUT_CNTL, disp_tv_out_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1318

WREG32(RADEON_DAC_CNTL2, RADEON_DAC2_DAC2_CLK_SEL);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

132

WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1320

WREG32(RADEON_CRTC2_GEN_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1325

WREG32(RADEON_DISP_OUTPUT_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1327

WREG32(RADEON_DAC_EXT_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1333

WREG32(RADEON_TV_DAC_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1341

WREG32(RADEON_TV_DAC_CNTL,

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1361

WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1362

WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1363

WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1364

WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1365

WREG32(RADEON_DAC_CNTL2, dac_cntl2);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1389

WREG32(RADEON_DAC_CNTL2, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1398

WREG32(RADEON_TV_MASTER_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1408

WREG32(RADEON_TV_DAC_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1415

WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1427

WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tv_pre_dac_mux_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1428

WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1429

WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1430

WREG32(RADEON_DAC_CNTL2, dac_cntl2);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1465

WREG32(RADEON_GPIO_MONID, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1467

WREG32(RADEON_FP2_GEN_CNTL, (RADEON_FP2_ON |

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1473

WREG32(RADEON_DISP_OUTPUT_CNTL, (RADEON_DISP_DAC_SOURCE_RMX |

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1476

WREG32(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_EN |

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1479

WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, 0x00000000);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1480

WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, 0x000003f0);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1481

WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, 0x00000000);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1482

WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, 0x000003f0);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1483

WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, 0x00000000);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1484

WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, 0x000003f0);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1486

WREG32(RADEON_CRTC2_H_TOTAL_DISP, 0x01000008);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1487

WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, 0x00000800);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1488

WREG32(RADEON_CRTC2_V_TOTAL_DISP, 0x00080001);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1489

WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, 0x00000080);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1506

WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, disp_lin_trans_grph_a);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1507

WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, disp_lin_trans_grph_b);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1508

WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, disp_lin_trans_grph_c);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1509

WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, disp_lin_trans_grph_d);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1510

WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, disp_lin_trans_grph_e);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1511

WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, disp_lin_trans_grph_f);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1512

WREG32(RADEON_CRTC2_H_TOTAL_DISP, crtc2_h_total_disp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1513

WREG32(RADEON_CRTC2_V_TOTAL_DISP, crtc2_v_total_disp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1514

WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, crtc2_h_sync_strt_wid);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1515

WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, crtc2_v_sync_strt_wid);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1516

WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1517

WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1518

WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1519

WREG32(RADEON_GPIO_MONID, gpio_monid);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1599

WREG32(RADEON_CRTC_EXT_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1604

WREG32(RADEON_CRTC2_GEN_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1610

WREG32(RADEON_DISP_OUTPUT_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1613

WREG32(RADEON_DISP_HW_DEBUG, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1622

WREG32(RADEON_TV_DAC_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1637

WREG32(RADEON_DAC_EXT_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1640

WREG32(RADEON_DAC_CNTL2, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1653

WREG32(RADEON_DAC_CNTL2, dac_cntl2);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1654

WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1655

WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1658

WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1660

WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1662

WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

1665

WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

243

WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

244

WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

245

WREG32(RADEON_LVDS_SS_GEN_CNTL, lvds_ss_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

248

WREG32(RADEON_CLOCK_CNTL_INDEX, 0);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

543

WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

544

WREG32(RADEON_DAC_CNTL, dac_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

545

WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

593

WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

596

WREG32(RADEON_DAC_CNTL2, dac2_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

603

WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

606

WREG32(RADEON_DAC_CNTL2, dac2_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

626

WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

664

WREG32(RADEON_CRTC_EXT_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

681

WREG32(RADEON_DAC_EXT_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

685

WREG32(RADEON_DAC_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

692

WREG32(RADEON_DAC_MACRO_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

700

WREG32(RADEON_DAC_CNTL, dac_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

701

WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

702

WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

703

WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

742

WREG32(RADEON_FP_GEN_CNTL, fp_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

864

WREG32(RADEON_TMDS_PLL_CNTL, tmds_pll_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

865

WREG32(RADEON_TMDS_TRANSMITTER_CNTL, tmds_transmitter_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

866

WREG32(RADEON_FP_GEN_CNTL, fp_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

908

WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);

drivers/gpu/drm/radeon/radeon_legacy_encoders.c

97

WREG32(RADEON_DISP_PWR_MAN, disp_pwr_man);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

284

WREG32(RADEON_TEST_DEBUG_MUX, (RREG32(RADEON_TEST_DEBUG_MUX) & 0xffff60ff) | 0x100);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

296

WREG32(RADEON_TEST_DEBUG_MUX, RREG32(RADEON_TEST_DEBUG_MUX) & 0xffffe0ff);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

308

WREG32(RADEON_TV_HOST_WRITE_DATA, value);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

310

WREG32(RADEON_TV_HOST_RD_WT_CNTL, addr);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

311

WREG32(RADEON_TV_HOST_RD_WT_CNTL, addr | RADEON_HOST_FIFO_WT);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

319

WREG32(RADEON_TV_HOST_RD_WT_CNTL, 0);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

330

WREG32(RADEON_TV_HOST_RD_WT_CNTL, addr);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

331

WREG32(RADEON_TV_HOST_RD_WT_CNTL, addr | RADEON_HOST_FIFO_RD);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

339

WREG32(RADEON_TV_HOST_RD_WT_CNTL, 0);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

395

WREG32(RADEON_TV_UV_ADR, tv_dac->tv.tv_uv_adr);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

418

WREG32(RADEON_TV_FRESTART, tv_dac->tv.frestart);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

419

WREG32(RADEON_TV_HRESTART, tv_dac->tv.hrestart);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

420

WREG32(RADEON_TV_VRESTART, tv_dac->tv.vrestart);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

746

WREG32(RADEON_TV_MASTER_CNTL, (tv_master_cntl | RADEON_TV_ASYNC_RST |

drivers/gpu/drm/radeon/radeon_legacy_tv.c

755

WREG32(RADEON_TV_DAC_CNTL, tmp);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

776

WREG32(RADEON_TV_RGB_CNTL, tv_rgb_cntl);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

777

WREG32(RADEON_TV_HTOTAL, const_ptr->hor_total - 1);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

778

WREG32(RADEON_TV_HDISP, const_ptr->hor_resolution - 1);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

779

WREG32(RADEON_TV_HSTART, const_ptr->hor_start);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

781

WREG32(RADEON_TV_VTOTAL, const_ptr->ver_total - 1);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

782

WREG32(RADEON_TV_VDISP, const_ptr->ver_resolution - 1);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

783

WREG32(RADEON_TV_FTOTAL, tv_ftotal);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

784

WREG32(RADEON_TV_VSCALER_CNTL1, tv_vscaler_cntl1);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

785

WREG32(RADEON_TV_VSCALER_CNTL2, tv_vscaler_cntl2);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

787

WREG32(RADEON_TV_Y_FALL_CNTL, tv_y_fall_cntl);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

788

WREG32(RADEON_TV_Y_RISE_CNTL, tv_y_rise_cntl);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

789

WREG32(RADEON_TV_Y_SAW_TOOTH_CNTL, tv_y_saw_tooth_cntl);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

791

WREG32(RADEON_TV_MASTER_CNTL, (tv_master_cntl | RADEON_TV_ASYNC_RST |

drivers/gpu/drm/radeon/radeon_legacy_tv.c

800

WREG32(RADEON_TV_MASTER_CNTL, (tv_master_cntl | RADEON_TV_ASYNC_RST));

drivers/gpu/drm/radeon/radeon_legacy_tv.c

803

WREG32(RADEON_TV_SYNC_CNTL, (RADEON_SYNC_PUB | RADEON_TV_SYNC_IO_DRIVE));

drivers/gpu/drm/radeon/radeon_legacy_tv.c

804

WREG32(RADEON_TV_TIMING_CNTL, tv_dac->tv.timing_cntl);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

805

WREG32(RADEON_TV_MODULATOR_CNTL1, tv_modulator_cntl1);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

806

WREG32(RADEON_TV_MODULATOR_CNTL2, tv_modulator_cntl2);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

807

WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, (RADEON_Y_RED_EN |

drivers/gpu/drm/radeon/radeon_legacy_tv.c

812

WREG32(RADEON_TV_CRC_CNTL, 0);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

814

WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

816

WREG32(RADEON_TV_GAIN_LIMIT_SETTINGS, ((0x17f << RADEON_UV_GAIN_LIMIT_SHIFT) |

drivers/gpu/drm/radeon/radeon_legacy_tv.c

818

WREG32(RADEON_TV_LINEAR_GAIN_SETTINGS, ((0x100 << RADEON_UV_GAIN_SHIFT) |

drivers/gpu/drm/radeon/radeon_legacy_tv.c

821

WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl);

drivers/gpu/drm/radeon/radeon_ttm.c

809

WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);

drivers/gpu/drm/radeon/radeon_ttm.c

811

WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);

drivers/gpu/drm/radeon/rs400.c

150

WREG32(RADEON_AGP_BASE, 0xFFFFFFFF);

drivers/gpu/drm/radeon/rs400.c

151

WREG32(RS480_AGP_BASE_2, 0);

drivers/gpu/drm/radeon/rs400.c

158

WREG32(RADEON_BUS_CNTL, tmp);

drivers/gpu/drm/radeon/rs400.c

160

WREG32(RADEON_MC_AGP_LOCATION, tmp);

drivers/gpu/drm/radeon/rs400.c

162

WREG32(RADEON_BUS_CNTL, tmp);

drivers/gpu/drm/radeon/rs400.c

304

WREG32(RS480_NB_MC_INDEX, reg & 0xff);

drivers/gpu/drm/radeon/rs400.c

306

WREG32(RS480_NB_MC_INDEX, 0xff);

drivers/gpu/drm/radeon/rs400.c

316

WREG32(RS480_NB_MC_INDEX, ((reg) & 0xff) | RS480_NB_MC_IND_WR_EN);

drivers/gpu/drm/radeon/rs400.c

317

WREG32(RS480_NB_MC_DATA, (v));

drivers/gpu/drm/radeon/rs400.c

318

WREG32(RS480_NB_MC_INDEX, 0xff);

drivers/gpu/drm/radeon/rs400.c

413

WREG32(R_000148_MC_FB_LOCATION,

drivers/gpu/drm/radeon/rs600.c

128

WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/rs600.c

131

WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/rs600.c

134

WREG32(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/rs600.c

137

WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/rs600.c

139

WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/rs600.c

152

WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/rs600.c

212

WREG32(AVIVO_TMDSA_BIT_DEPTH_CONTROL, tmp);

drivers/gpu/drm/radeon/rs600.c

215

WREG32(AVIVO_LVTMA_BIT_DEPTH_CONTROL, tmp);

drivers/gpu/drm/radeon/rs600.c

218

WREG32(AVIVO_DVOA_BIT_DEPTH_CONTROL, tmp);

drivers/gpu/drm/radeon/rs600.c

221

WREG32(AVIVO_DDIA_BIT_DEPTH_CONTROL, tmp);

drivers/gpu/drm/radeon/rs600.c

243

WREG32(voltage->gpio.reg, tmp);

drivers/gpu/drm/radeon/rs600.c

252

WREG32(voltage->gpio.reg, tmp);

drivers/gpu/drm/radeon/rs600.c

335

WREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/rs600.c

353

WREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/rs600.c

394

WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/rs600.c

402

WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/rs600.c

419

WREG32(R_007D00_DC_HOT_PLUG_DETECT1_CONTROL,

drivers/gpu/drm/radeon/rs600.c

423

WREG32(R_007D10_DC_HOT_PLUG_DETECT2_CONTROL,

drivers/gpu/drm/radeon/rs600.c

446

WREG32(R_007D00_DC_HOT_PLUG_DETECT1_CONTROL,

drivers/gpu/drm/radeon/rs600.c

450

WREG32(R_007D10_DC_HOT_PLUG_DETECT2_CONTROL,

drivers/gpu/drm/radeon/rs600.c

477

WREG32(RADEON_CP_CSQ_CNTL, 0);

drivers/gpu/drm/radeon/rs600.c

479

WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA);

drivers/gpu/drm/radeon/rs600.c

480

WREG32(RADEON_CP_RB_RPTR_WR, 0);

drivers/gpu/drm/radeon/rs600.c

481

WREG32(RADEON_CP_RB_WPTR, 0);

drivers/gpu/drm/radeon/rs600.c

482

WREG32(RADEON_CP_RB_CNTL, tmp);

drivers/gpu/drm/radeon/rs600.c

488

WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_VAP(1) |

drivers/gpu/drm/radeon/rs600.c

492

WREG32(R_0000F0_RBBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/rs600.c

497

WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_CP(1));

drivers/gpu/drm/radeon/rs600.c

500

WREG32(R_0000F0_RBBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/rs600.c

505

WREG32(R_0000F0_RBBM_SOFT_RESET, S_0000F0_SOFT_RESET_MC(1));

drivers/gpu/drm/radeon/rs600.c

508

WREG32(R_0000F0_RBBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/rs600.c

576

WREG32(RADEON_BUS_CNTL, tmp);

drivers/gpu/drm/radeon/rs600.c

683

WREG32(R_000040_GEN_INT_CNTL, 0);

drivers/gpu/drm/radeon/rs600.c

706

WREG32(R_000040_GEN_INT_CNTL, tmp);

drivers/gpu/drm/radeon/rs600.c

707

WREG32(R_006540_DxMODE_INT_MASK, mode_int);

drivers/gpu/drm/radeon/rs600.c

708

WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, hpd1);

drivers/gpu/drm/radeon/rs600.c

709

WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, hpd2);

drivers/gpu/drm/radeon/rs600.c

711

WREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL, hdmi0);

drivers/gpu/drm/radeon/rs600.c

728

WREG32(R_006534_D1MODE_VBLANK_STATUS,

drivers/gpu/drm/radeon/rs600.c

732

WREG32(R_006D34_D2MODE_VBLANK_STATUS,

drivers/gpu/drm/radeon/rs600.c

738

WREG32(R_007D08_DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/rs600.c

743

WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);

drivers/gpu/drm/radeon/rs600.c

755

WREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL, tmp);

drivers/gpu/drm/radeon/rs600.c

761

WREG32(R_000044_GEN_INT_STATUS, irqs);

drivers/gpu/drm/radeon/rs600.c

770

WREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL, hdmi0);

drivers/gpu/drm/radeon/rs600.c

771

WREG32(R_000040_GEN_INT_CNTL, 0);

drivers/gpu/drm/radeon/rs600.c

772

WREG32(R_006540_DxMODE_INT_MASK, 0);

drivers/gpu/drm/radeon/rs600.c

840

WREG32(RADEON_BUS_CNTL, msi_rearm);

drivers/gpu/drm/radeon/rs600.c

841

WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);

drivers/gpu/drm/radeon/rs600.c

844

WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN);

drivers/gpu/drm/radeon/rs600.c

923

WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);

drivers/gpu/drm/radeon/rs600.c

924

WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);

drivers/gpu/drm/radeon/rs600.c

925

WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);

drivers/gpu/drm/radeon/rs600.c

926

WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);

drivers/gpu/drm/radeon/rs600.c

936

WREG32(R_000070_MC_IND_INDEX, S_000070_MC_IND_ADDR(reg) |

drivers/gpu/drm/radeon/rs600.c

948

WREG32(R_000070_MC_IND_INDEX, S_000070_MC_IND_ADDR(reg) |

drivers/gpu/drm/radeon/rs600.c

950

WREG32(R_000074_MC_IND_DATA, v);

drivers/gpu/drm/radeon/rs600.c

979

WREG32(R_000134_HDP_FB_LOCATION,

drivers/gpu/drm/radeon/rs690.c

249

WREG32(R_006520_DC_LB_MEMORY_SPLIT, tmp);

drivers/gpu/drm/radeon/rs690.c

622

WREG32(R_006C9C_DCP_CONTROL, 0);

drivers/gpu/drm/radeon/rs690.c

624

WREG32(R_006C9C_DCP_CONTROL, 2);

drivers/gpu/drm/radeon/rs690.c

634

WREG32(R_006D58_LB_MAX_REQ_OUTSTANDING, tmp);

drivers/gpu/drm/radeon/rs690.c

645

WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);

drivers/gpu/drm/radeon/rs690.c

646

WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_b_cnt);

drivers/gpu/drm/radeon/rs690.c

647

WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);

drivers/gpu/drm/radeon/rs690.c

648

WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_b_cnt);

drivers/gpu/drm/radeon/rs690.c

657

WREG32(R_000078_MC_INDEX, S_000078_MC_IND_ADDR(reg));

drivers/gpu/drm/radeon/rs690.c

659

WREG32(R_000078_MC_INDEX, ~C_000078_MC_IND_ADDR);

drivers/gpu/drm/radeon/rs690.c

669

WREG32(R_000078_MC_INDEX, S_000078_MC_IND_ADDR(reg) |

drivers/gpu/drm/radeon/rs690.c

671

WREG32(R_00007C_MC_DATA, v);

drivers/gpu/drm/radeon/rs690.c

672

WREG32(R_000078_MC_INDEX, 0x7F);

drivers/gpu/drm/radeon/rs690.c

690

WREG32(R_000134_HDP_FB_LOCATION,

drivers/gpu/drm/radeon/rs780_dpm.c

278

WREG32(FVTHROT_PWM_CTRL_REG1,

drivers/gpu/drm/radeon/rs780_dpm.c

282

WREG32(FVTHROT_PWM_US_REG0, RS780_FVTHROTPWMUSREG0_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

283

WREG32(FVTHROT_PWM_US_REG1, RS780_FVTHROTPWMUSREG1_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

284

WREG32(FVTHROT_PWM_DS_REG0, RS780_FVTHROTPWMDSREG0_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

285

WREG32(FVTHROT_PWM_DS_REG1, RS780_FVTHROTPWMDSREG1_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

291

WREG32(FVTHROT_PWM_FEEDBACK_DIV_REG2,

drivers/gpu/drm/radeon/rs780_dpm.c

295

WREG32(FVTHROT_PWM_FEEDBACK_DIV_REG3,

drivers/gpu/drm/radeon/rs780_dpm.c

298

WREG32(FVTHROT_PWM_FEEDBACK_DIV_REG4,

drivers/gpu/drm/radeon/rs780_dpm.c

323

WREG32(FVTHROT_UTC0, RS780_FVTHROTUTC0_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

324

WREG32(FVTHROT_UTC1, RS780_FVTHROTUTC1_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

325

WREG32(FVTHROT_UTC2, RS780_FVTHROTUTC2_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

326

WREG32(FVTHROT_UTC3, RS780_FVTHROTUTC3_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

327

WREG32(FVTHROT_UTC4, RS780_FVTHROTUTC4_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

329

WREG32(FVTHROT_DTC0, RS780_FVTHROTDTC0_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

330

WREG32(FVTHROT_DTC1, RS780_FVTHROTDTC1_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

331

WREG32(FVTHROT_DTC2, RS780_FVTHROTDTC2_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

332

WREG32(FVTHROT_DTC3, RS780_FVTHROTDTC3_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

333

WREG32(FVTHROT_DTC4, RS780_FVTHROTDTC4_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

354

WREG32(FVTHROT_FB_US_REG0, RS780_FVTHROTFBUSREG0_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

355

WREG32(FVTHROT_FB_US_REG1, RS780_FVTHROTFBUSREG1_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

356

WREG32(FVTHROT_FB_DS_REG0, RS780_FVTHROTFBDSREG0_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

357

WREG32(FVTHROT_FB_DS_REG1, RS780_FVTHROTFBDSREG1_DFLT);

drivers/gpu/drm/radeon/rs780_dpm.c

366

WREG32(FVTHROT_TARGET_REG, 30000000 / pi->refresh_rate);

drivers/gpu/drm/radeon/rs780_dpm.c

367

WREG32(FVTHROT_CB1, 1000000 * 5 / pi->refresh_rate);

drivers/gpu/drm/radeon/rs780_dpm.c

368

WREG32(FVTHROT_CB2, 1000000 * 10 / pi->refresh_rate);

drivers/gpu/drm/radeon/rs780_dpm.c

369

WREG32(FVTHROT_CB3, 1000000 * 30 / pi->refresh_rate);

drivers/gpu/drm/radeon/rs780_dpm.c

370

WREG32(FVTHROT_CB4, 1000000 * 50 / pi->refresh_rate);

drivers/gpu/drm/radeon/rv515.c

1227

WREG32(LB_MAX_REQ_OUTSTANDING, tmp);

drivers/gpu/drm/radeon/rv515.c

1238

WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);

drivers/gpu/drm/radeon/rv515.c

1239

WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_b_cnt);

drivers/gpu/drm/radeon/rv515.c

1240

WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);

drivers/gpu/drm/radeon/rv515.c

1241

WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_b_cnt);

drivers/gpu/drm/radeon/rv515.c

137

WREG32(R_000300_VGA_RENDER_CONTROL,

drivers/gpu/drm/radeon/rv515.c

202

WREG32(MC_IND_INDEX, 0x7f0000 | (reg & 0xffff));

drivers/gpu/drm/radeon/rv515.c

204

WREG32(MC_IND_INDEX, 0);

drivers/gpu/drm/radeon/rv515.c

215

WREG32(MC_IND_INDEX, 0xff0000 | ((reg) & 0xffff));

drivers/gpu/drm/radeon/rv515.c

216

WREG32(MC_IND_DATA, (v));

drivers/gpu/drm/radeon/rv515.c

217

WREG32(MC_IND_INDEX, 0);

drivers/gpu/drm/radeon/rv515.c

277

WREG32(R_000300_VGA_RENDER_CONTROL, 0);

drivers/gpu/drm/radeon/rv515.c

286

WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/radeon/rv515.c

288

WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/rv515.c

289

WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/rv515.c

300

WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 1);

drivers/gpu/drm/radeon/rv515.c

303

WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/rv515.c

304

WREG32(AVIVO_D1CRTC_UPDATE_LOCK + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/rv515.c

321

WREG32(R600_BIF_FB_EN, 0);

drivers/gpu/drm/radeon/rv515.c

325

WREG32(R700_MC_CITF_CNTL, blackout);

drivers/gpu/drm/radeon/rv515.c

327

WREG32(R600_CITF_CNTL, blackout);

drivers/gpu/drm/radeon/rv515.c

339

WREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/rv515.c

344

WREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/rv515.c

359

WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH,

drivers/gpu/drm/radeon/rv515.c

361

WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH,

drivers/gpu/drm/radeon/rv515.c

364

WREG32(R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH,

drivers/gpu/drm/radeon/rv515.c

366

WREG32(R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH,

drivers/gpu/drm/radeon/rv515.c

370

WREG32(R_006110_D1GRPH_PRIMARY_SURFACE_ADDRESS + crtc_offsets[i],

drivers/gpu/drm/radeon/rv515.c

372

WREG32(R_006118_D1GRPH_SECONDARY_SURFACE_ADDRESS + crtc_offsets[i],

drivers/gpu/drm/radeon/rv515.c

375

WREG32(R_000310_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start);

drivers/gpu/drm/radeon/rv515.c

384

WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/rv515.c

389

WREG32(AVIVO_D1GRPH_UPDATE + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/rv515.c

394

WREG32(AVIVO_D1MODE_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/rv515.c

413

WREG32(R700_MC_CITF_CNTL, tmp);

drivers/gpu/drm/radeon/rv515.c

415

WREG32(R600_CITF_CNTL, tmp);

drivers/gpu/drm/radeon/rv515.c

417

WREG32(R600_BIF_FB_EN, R600_FB_READ_EN | R600_FB_WRITE_EN);

drivers/gpu/drm/radeon/rv515.c

424

WREG32(AVIVO_D1CRTC_CONTROL + crtc_offsets[i], tmp);

drivers/gpu/drm/radeon/rv515.c

435

WREG32(R_000328_VGA_HDP_CONTROL, save->vga_hdp_control);

drivers/gpu/drm/radeon/rv515.c

437

WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control);

drivers/gpu/drm/radeon/rv515.c

451

WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

drivers/gpu/drm/radeon/rv515.c

456

WREG32(R_000134_HDP_FB_LOCATION,

drivers/gpu/drm/radeon/rv515.c

685

WREG32(0x659C + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

686

WREG32(0x6594 + crtc->crtc_offset, 0x705);

drivers/gpu/drm/radeon/rv515.c

687

WREG32(0x65A4 + crtc->crtc_offset, 0x10001);

drivers/gpu/drm/radeon/rv515.c

688

WREG32(0x65D8 + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

689

WREG32(0x65B0 + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

690

WREG32(0x65C0 + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

691

WREG32(0x65D4 + crtc->crtc_offset, 0x0);

drivers/gpu/drm/radeon/rv515.c

692

WREG32(index_reg, 0x0);

drivers/gpu/drm/radeon/rv515.c

693

WREG32(data_reg, 0x841880A8);

drivers/gpu/drm/radeon/rv515.c

694

WREG32(index_reg, 0x1);

drivers/gpu/drm/radeon/rv515.c

695

WREG32(data_reg, 0x84208680);

drivers/gpu/drm/radeon/rv515.c

696

WREG32(index_reg, 0x2);

drivers/gpu/drm/radeon/rv515.c

697

WREG32(data_reg, 0xBFF880B0);

drivers/gpu/drm/radeon/rv515.c

698

WREG32(index_reg, 0x100);

drivers/gpu/drm/radeon/rv515.c

699

WREG32(data_reg, 0x83D88088);

drivers/gpu/drm/radeon/rv515.c

700

WREG32(index_reg, 0x101);

drivers/gpu/drm/radeon/rv515.c

701

WREG32(data_reg, 0x84608680);

drivers/gpu/drm/radeon/rv515.c

702

WREG32(index_reg, 0x102);

drivers/gpu/drm/radeon/rv515.c

703

WREG32(data_reg, 0xBFF080D0);

drivers/gpu/drm/radeon/rv515.c

704

WREG32(index_reg, 0x200);

drivers/gpu/drm/radeon/rv515.c

705

WREG32(data_reg, 0x83988068);

drivers/gpu/drm/radeon/rv515.c

706

WREG32(index_reg, 0x201);

drivers/gpu/drm/radeon/rv515.c

707

WREG32(data_reg, 0x84A08680);

drivers/gpu/drm/radeon/rv515.c

708

WREG32(index_reg, 0x202);

drivers/gpu/drm/radeon/rv515.c

709

WREG32(data_reg, 0xBFF080F8);

drivers/gpu/drm/radeon/rv515.c

710

WREG32(index_reg, 0x300);

drivers/gpu/drm/radeon/rv515.c

711

WREG32(data_reg, 0x83588058);

drivers/gpu/drm/radeon/rv515.c

712

WREG32(index_reg, 0x301);

drivers/gpu/drm/radeon/rv515.c

713

WREG32(data_reg, 0x84E08660);

drivers/gpu/drm/radeon/rv515.c

714

WREG32(index_reg, 0x302);

drivers/gpu/drm/radeon/rv515.c

715

WREG32(data_reg, 0xBFF88120);

drivers/gpu/drm/radeon/rv515.c

716

WREG32(index_reg, 0x400);

drivers/gpu/drm/radeon/rv515.c

717

WREG32(data_reg, 0x83188040);

drivers/gpu/drm/radeon/rv515.c

718

WREG32(index_reg, 0x401);

drivers/gpu/drm/radeon/rv515.c

719

WREG32(data_reg, 0x85008660);

drivers/gpu/drm/radeon/rv515.c

720

WREG32(index_reg, 0x402);

drivers/gpu/drm/radeon/rv515.c

721

WREG32(data_reg, 0xBFF88150);

drivers/gpu/drm/radeon/rv515.c

722

WREG32(index_reg, 0x500);

drivers/gpu/drm/radeon/rv515.c

723

WREG32(data_reg, 0x82D88030);

drivers/gpu/drm/radeon/rv515.c

724

WREG32(index_reg, 0x501);

drivers/gpu/drm/radeon/rv515.c

725

WREG32(data_reg, 0x85408640);

drivers/gpu/drm/radeon/rv515.c

726

WREG32(index_reg, 0x502);

drivers/gpu/drm/radeon/rv515.c

727

WREG32(data_reg, 0xBFF88180);

drivers/gpu/drm/radeon/rv515.c

728

WREG32(index_reg, 0x600);

drivers/gpu/drm/radeon/rv515.c

729

WREG32(data_reg, 0x82A08018);

drivers/gpu/drm/radeon/rv515.c

730

WREG32(index_reg, 0x601);

drivers/gpu/drm/radeon/rv515.c

731

WREG32(data_reg, 0x85808620);

drivers/gpu/drm/radeon/rv515.c

732

WREG32(index_reg, 0x602);

drivers/gpu/drm/radeon/rv515.c

733

WREG32(data_reg, 0xBFF081B8);

drivers/gpu/drm/radeon/rv515.c

734

WREG32(index_reg, 0x700);

drivers/gpu/drm/radeon/rv515.c

735

WREG32(data_reg, 0x82608010);

drivers/gpu/drm/radeon/rv515.c

736

WREG32(index_reg, 0x701);

drivers/gpu/drm/radeon/rv515.c

737

WREG32(data_reg, 0x85A08600);

drivers/gpu/drm/radeon/rv515.c

738

WREG32(index_reg, 0x702);

drivers/gpu/drm/radeon/rv515.c

739

WREG32(data_reg, 0x800081F0);

drivers/gpu/drm/radeon/rv515.c

740

WREG32(index_reg, 0x800);

drivers/gpu/drm/radeon/rv515.c

741

WREG32(data_reg, 0x8228BFF8);

drivers/gpu/drm/radeon/rv515.c

742

WREG32(index_reg, 0x801);

drivers/gpu/drm/radeon/rv515.c

743

WREG32(data_reg, 0x85E085E0);

drivers/gpu/drm/radeon/rv515.c

744

WREG32(index_reg, 0x802);

drivers/gpu/drm/radeon/rv515.c

745

WREG32(data_reg, 0xBFF88228);

drivers/gpu/drm/radeon/rv515.c

746

WREG32(index_reg, 0x10000);

drivers/gpu/drm/radeon/rv515.c

747

WREG32(data_reg, 0x82A8BF00);

drivers/gpu/drm/radeon/rv515.c

748

WREG32(index_reg, 0x10001);

drivers/gpu/drm/radeon/rv515.c

749

WREG32(data_reg, 0x82A08CC0);

drivers/gpu/drm/radeon/rv515.c

750

WREG32(index_reg, 0x10002);

drivers/gpu/drm/radeon/rv515.c

751

WREG32(data_reg, 0x8008BEF8);

drivers/gpu/drm/radeon/rv515.c

752

WREG32(index_reg, 0x10100);

drivers/gpu/drm/radeon/rv515.c

753

WREG32(data_reg, 0x81F0BF28);

drivers/gpu/drm/radeon/rv515.c

754

WREG32(index_reg, 0x10101);

drivers/gpu/drm/radeon/rv515.c

755

WREG32(data_reg, 0x83608CA0);

drivers/gpu/drm/radeon/rv515.c

756

WREG32(index_reg, 0x10102);

drivers/gpu/drm/radeon/rv515.c

757

WREG32(data_reg, 0x8018BED0);

drivers/gpu/drm/radeon/rv515.c

758

WREG32(index_reg, 0x10200);

drivers/gpu/drm/radeon/rv515.c

759

WREG32(data_reg, 0x8148BF38);

drivers/gpu/drm/radeon/rv515.c

760

WREG32(index_reg, 0x10201);

drivers/gpu/drm/radeon/rv515.c

761

WREG32(data_reg, 0x84408C80);

drivers/gpu/drm/radeon/rv515.c

762

WREG32(index_reg, 0x10202);

drivers/gpu/drm/radeon/rv515.c

763

WREG32(data_reg, 0x8008BEB8);

drivers/gpu/drm/radeon/rv515.c

764

WREG32(index_reg, 0x10300);

drivers/gpu/drm/radeon/rv515.c

765

WREG32(data_reg, 0x80B0BF78);

drivers/gpu/drm/radeon/rv515.c

766

WREG32(index_reg, 0x10301);

drivers/gpu/drm/radeon/rv515.c

767

WREG32(data_reg, 0x85008C20);

drivers/gpu/drm/radeon/rv515.c

768

WREG32(index_reg, 0x10302);

drivers/gpu/drm/radeon/rv515.c

769

WREG32(data_reg, 0x8020BEA0);

drivers/gpu/drm/radeon/rv515.c

770

WREG32(index_reg, 0x10400);

drivers/gpu/drm/radeon/rv515.c

771

WREG32(data_reg, 0x8028BF90);

drivers/gpu/drm/radeon/rv515.c

772

WREG32(index_reg, 0x10401);

drivers/gpu/drm/radeon/rv515.c

773

WREG32(data_reg, 0x85E08BC0);

drivers/gpu/drm/radeon/rv515.c

774

WREG32(index_reg, 0x10402);

drivers/gpu/drm/radeon/rv515.c

775

WREG32(data_reg, 0x8018BE90);

drivers/gpu/drm/radeon/rv515.c

776

WREG32(index_reg, 0x10500);

drivers/gpu/drm/radeon/rv515.c

777

WREG32(data_reg, 0xBFB8BFB0);

drivers/gpu/drm/radeon/rv515.c

778

WREG32(index_reg, 0x10501);

drivers/gpu/drm/radeon/rv515.c

779

WREG32(data_reg, 0x86C08B40);

drivers/gpu/drm/radeon/rv515.c

780

WREG32(index_reg, 0x10502);

drivers/gpu/drm/radeon/rv515.c

781

WREG32(data_reg, 0x8010BE90);

drivers/gpu/drm/radeon/rv515.c

782

WREG32(index_reg, 0x10600);

drivers/gpu/drm/radeon/rv515.c

783

WREG32(data_reg, 0xBF58BFC8);

drivers/gpu/drm/radeon/rv515.c

784

WREG32(index_reg, 0x10601);

drivers/gpu/drm/radeon/rv515.c

785

WREG32(data_reg, 0x87A08AA0);

drivers/gpu/drm/radeon/rv515.c

786

WREG32(index_reg, 0x10602);

drivers/gpu/drm/radeon/rv515.c

787

WREG32(data_reg, 0x8010BE98);

drivers/gpu/drm/radeon/rv515.c

788

WREG32(index_reg, 0x10700);

drivers/gpu/drm/radeon/rv515.c

789

WREG32(data_reg, 0xBF10BFF0);

drivers/gpu/drm/radeon/rv515.c

790

WREG32(index_reg, 0x10701);

drivers/gpu/drm/radeon/rv515.c

791

WREG32(data_reg, 0x886089E0);

drivers/gpu/drm/radeon/rv515.c

792

WREG32(index_reg, 0x10702);

drivers/gpu/drm/radeon/rv515.c

793

WREG32(data_reg, 0x8018BEB0);

drivers/gpu/drm/radeon/rv515.c

794

WREG32(index_reg, 0x10800);

drivers/gpu/drm/radeon/rv515.c

795

WREG32(data_reg, 0xBED8BFE8);

drivers/gpu/drm/radeon/rv515.c

796

WREG32(index_reg, 0x10801);

drivers/gpu/drm/radeon/rv515.c

797

WREG32(data_reg, 0x89408940);

drivers/gpu/drm/radeon/rv515.c

798

WREG32(index_reg, 0x10802);

drivers/gpu/drm/radeon/rv515.c

799

WREG32(data_reg, 0xBFE8BED8);

drivers/gpu/drm/radeon/rv515.c

800

WREG32(index_reg, 0x20000);

drivers/gpu/drm/radeon/rv515.c

801

WREG32(data_reg, 0x80008000);

drivers/gpu/drm/radeon/rv515.c

802

WREG32(index_reg, 0x20001);

drivers/gpu/drm/radeon/rv515.c

803

WREG32(data_reg, 0x90008000);

drivers/gpu/drm/radeon/rv515.c

804

WREG32(index_reg, 0x20002);

drivers/gpu/drm/radeon/rv515.c

805

WREG32(data_reg, 0x80008000);

drivers/gpu/drm/radeon/rv515.c

806

WREG32(index_reg, 0x20003);

drivers/gpu/drm/radeon/rv515.c

807

WREG32(data_reg, 0x80008000);

drivers/gpu/drm/radeon/rv515.c

808

WREG32(index_reg, 0x20100);

drivers/gpu/drm/radeon/rv515.c

809

WREG32(data_reg, 0x80108000);

drivers/gpu/drm/radeon/rv515.c

810

WREG32(index_reg, 0x20101);

drivers/gpu/drm/radeon/rv515.c

811

WREG32(data_reg, 0x8FE0BF70);

drivers/gpu/drm/radeon/rv515.c

812

WREG32(index_reg, 0x20102);

drivers/gpu/drm/radeon/rv515.c

813

WREG32(data_reg, 0xBFE880C0);

drivers/gpu/drm/radeon/rv515.c

814

WREG32(index_reg, 0x20103);

drivers/gpu/drm/radeon/rv515.c

815

WREG32(data_reg, 0x80008000);

drivers/gpu/drm/radeon/rv515.c

816

WREG32(index_reg, 0x20200);

drivers/gpu/drm/radeon/rv515.c

817

WREG32(data_reg, 0x8018BFF8);

drivers/gpu/drm/radeon/rv515.c

818

WREG32(index_reg, 0x20201);

drivers/gpu/drm/radeon/rv515.c

819

WREG32(data_reg, 0x8F80BF08);

drivers/gpu/drm/radeon/rv515.c

820

WREG32(index_reg, 0x20202);

drivers/gpu/drm/radeon/rv515.c

821

WREG32(data_reg, 0xBFD081A0);

drivers/gpu/drm/radeon/rv515.c

822

WREG32(index_reg, 0x20203);

drivers/gpu/drm/radeon/rv515.c

823

WREG32(data_reg, 0xBFF88000);

drivers/gpu/drm/radeon/rv515.c

824

WREG32(index_reg, 0x20300);

drivers/gpu/drm/radeon/rv515.c

825

WREG32(data_reg, 0x80188000);

drivers/gpu/drm/radeon/rv515.c

826

WREG32(index_reg, 0x20301);

drivers/gpu/drm/radeon/rv515.c

827

WREG32(data_reg, 0x8EE0BEC0);

drivers/gpu/drm/radeon/rv515.c

828

WREG32(index_reg, 0x20302);

drivers/gpu/drm/radeon/rv515.c

829

WREG32(data_reg, 0xBFB082A0);

drivers/gpu/drm/radeon/rv515.c

830

WREG32(index_reg, 0x20303);

drivers/gpu/drm/radeon/rv515.c

831

WREG32(data_reg, 0x80008000);

drivers/gpu/drm/radeon/rv515.c

832

WREG32(index_reg, 0x20400);

drivers/gpu/drm/radeon/rv515.c

833

WREG32(data_reg, 0x80188000);

drivers/gpu/drm/radeon/rv515.c

834

WREG32(index_reg, 0x20401);

drivers/gpu/drm/radeon/rv515.c

835

WREG32(data_reg, 0x8E00BEA0);

drivers/gpu/drm/radeon/rv515.c

836

WREG32(index_reg, 0x20402);

drivers/gpu/drm/radeon/rv515.c

837

WREG32(data_reg, 0xBF8883C0);

drivers/gpu/drm/radeon/rv515.c

838

WREG32(index_reg, 0x20403);

drivers/gpu/drm/radeon/rv515.c

839

WREG32(data_reg, 0x80008000);

drivers/gpu/drm/radeon/rv515.c

840

WREG32(index_reg, 0x20500);

drivers/gpu/drm/radeon/rv515.c

841

WREG32(data_reg, 0x80188000);

drivers/gpu/drm/radeon/rv515.c

842

WREG32(index_reg, 0x20501);

drivers/gpu/drm/radeon/rv515.c

843

WREG32(data_reg, 0x8D00BE90);

drivers/gpu/drm/radeon/rv515.c

844

WREG32(index_reg, 0x20502);

drivers/gpu/drm/radeon/rv515.c

845

WREG32(data_reg, 0xBF588500);

drivers/gpu/drm/radeon/rv515.c

846

WREG32(index_reg, 0x20503);

drivers/gpu/drm/radeon/rv515.c

847

WREG32(data_reg, 0x80008008);

drivers/gpu/drm/radeon/rv515.c

848

WREG32(index_reg, 0x20600);

drivers/gpu/drm/radeon/rv515.c

849

WREG32(data_reg, 0x80188000);

drivers/gpu/drm/radeon/rv515.c

850

WREG32(index_reg, 0x20601);

drivers/gpu/drm/radeon/rv515.c

851

WREG32(data_reg, 0x8BC0BE98);

drivers/gpu/drm/radeon/rv515.c

852

WREG32(index_reg, 0x20602);

drivers/gpu/drm/radeon/rv515.c

853

WREG32(data_reg, 0xBF308660);

drivers/gpu/drm/radeon/rv515.c

854

WREG32(index_reg, 0x20603);

drivers/gpu/drm/radeon/rv515.c

855

WREG32(data_reg, 0x80008008);

drivers/gpu/drm/radeon/rv515.c

856

WREG32(index_reg, 0x20700);

drivers/gpu/drm/radeon/rv515.c

857

WREG32(data_reg, 0x80108000);

drivers/gpu/drm/radeon/rv515.c

858

WREG32(index_reg, 0x20701);

drivers/gpu/drm/radeon/rv515.c

859

WREG32(data_reg, 0x8A80BEB0);

drivers/gpu/drm/radeon/rv515.c

860

WREG32(index_reg, 0x20702);

drivers/gpu/drm/radeon/rv515.c

861

WREG32(data_reg, 0xBF0087C0);

drivers/gpu/drm/radeon/rv515.c

862

WREG32(index_reg, 0x20703);

drivers/gpu/drm/radeon/rv515.c

863

WREG32(data_reg, 0x80008008);

drivers/gpu/drm/radeon/rv515.c

864

WREG32(index_reg, 0x20800);

drivers/gpu/drm/radeon/rv515.c

865

WREG32(data_reg, 0x80108000);

drivers/gpu/drm/radeon/rv515.c

866

WREG32(index_reg, 0x20801);

drivers/gpu/drm/radeon/rv515.c

867

WREG32(data_reg, 0x8920BED0);

drivers/gpu/drm/radeon/rv515.c

868

WREG32(index_reg, 0x20802);

drivers/gpu/drm/radeon/rv515.c

869

WREG32(data_reg, 0xBED08920);

drivers/gpu/drm/radeon/rv515.c

870

WREG32(index_reg, 0x20803);

drivers/gpu/drm/radeon/rv515.c

871

WREG32(data_reg, 0x80008010);

drivers/gpu/drm/radeon/rv515.c

872

WREG32(index_reg, 0x30000);

drivers/gpu/drm/radeon/rv515.c

873

WREG32(data_reg, 0x90008000);

drivers/gpu/drm/radeon/rv515.c

874

WREG32(index_reg, 0x30001);

drivers/gpu/drm/radeon/rv515.c

875

WREG32(data_reg, 0x80008000);

drivers/gpu/drm/radeon/rv515.c

876

WREG32(index_reg, 0x30100);

drivers/gpu/drm/radeon/rv515.c

877

WREG32(data_reg, 0x8FE0BF90);

drivers/gpu/drm/radeon/rv515.c

878

WREG32(index_reg, 0x30101);

drivers/gpu/drm/radeon/rv515.c

879

WREG32(data_reg, 0xBFF880A0);

drivers/gpu/drm/radeon/rv515.c

880

WREG32(index_reg, 0x30200);

drivers/gpu/drm/radeon/rv515.c

881

WREG32(data_reg, 0x8F60BF40);

drivers/gpu/drm/radeon/rv515.c

882

WREG32(index_reg, 0x30201);

drivers/gpu/drm/radeon/rv515.c

883

WREG32(data_reg, 0xBFE88180);

drivers/gpu/drm/radeon/rv515.c

884

WREG32(index_reg, 0x30300);

drivers/gpu/drm/radeon/rv515.c

885

WREG32(data_reg, 0x8EC0BF00);

drivers/gpu/drm/radeon/rv515.c

886

WREG32(index_reg, 0x30301);

drivers/gpu/drm/radeon/rv515.c

887

WREG32(data_reg, 0xBFC88280);

drivers/gpu/drm/radeon/rv515.c

888

WREG32(index_reg, 0x30400);

drivers/gpu/drm/radeon/rv515.c

889

WREG32(data_reg, 0x8DE0BEE0);

drivers/gpu/drm/radeon/rv515.c

890

WREG32(index_reg, 0x30401);

drivers/gpu/drm/radeon/rv515.c

891

WREG32(data_reg, 0xBFA083A0);

drivers/gpu/drm/radeon/rv515.c

892

WREG32(index_reg, 0x30500);

drivers/gpu/drm/radeon/rv515.c

893

WREG32(data_reg, 0x8CE0BED0);

drivers/gpu/drm/radeon/rv515.c

894

WREG32(index_reg, 0x30501);

drivers/gpu/drm/radeon/rv515.c

895

WREG32(data_reg, 0xBF7884E0);

drivers/gpu/drm/radeon/rv515.c

896

WREG32(index_reg, 0x30600);

drivers/gpu/drm/radeon/rv515.c

897

WREG32(data_reg, 0x8BA0BED8);

drivers/gpu/drm/radeon/rv515.c

898

WREG32(index_reg, 0x30601);

drivers/gpu/drm/radeon/rv515.c

899

WREG32(data_reg, 0xBF508640);

drivers/gpu/drm/radeon/rv515.c

900

WREG32(index_reg, 0x30700);

drivers/gpu/drm/radeon/rv515.c

901

WREG32(data_reg, 0x8A60BEE8);

drivers/gpu/drm/radeon/rv515.c

902

WREG32(index_reg, 0x30701);

drivers/gpu/drm/radeon/rv515.c

903

WREG32(data_reg, 0xBF2087A0);

drivers/gpu/drm/radeon/rv515.c

904

WREG32(index_reg, 0x30800);

drivers/gpu/drm/radeon/rv515.c

905

WREG32(data_reg, 0x8900BF00);

drivers/gpu/drm/radeon/rv515.c

906

WREG32(index_reg, 0x30801);

drivers/gpu/drm/radeon/rv515.c

907

WREG32(data_reg, 0xBF008900);

drivers/gpu/drm/radeon/rv6xx_dpm.c

1195

WREG32(CG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/radeon/rv6xx_dpm.c

814

WREG32(SQM_RATIO, sqm_ratio);

drivers/gpu/drm/radeon/rv6xx_dpm.c

825

WREG32(ARB_RFSH_RATE, arb_refresh_rate);

drivers/gpu/drm/radeon/rv6xx_dpm.c

989

WREG32(CG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/radeon/rv730_dpm.c

406

WREG32(MC_ARB_RFSH_RATE, arb_refresh_rate);

drivers/gpu/drm/radeon/rv730_dpm.c

419

WREG32(MC_ARB_DRAM_TIMING_3, dram_timing);

drivers/gpu/drm/radeon/rv730_dpm.c

420

WREG32(MC_ARB_DRAM_TIMING2_3, dram_timing2);

drivers/gpu/drm/radeon/rv730_dpm.c

429

WREG32(MC_ARB_DRAM_TIMING_2, dram_timing);

drivers/gpu/drm/radeon/rv730_dpm.c

430

WREG32(MC_ARB_DRAM_TIMING2_2, dram_timing2);

drivers/gpu/drm/radeon/rv730_dpm.c

439

WREG32(MC_ARB_DRAM_TIMING_1, dram_timing);

drivers/gpu/drm/radeon/rv730_dpm.c

440

WREG32(MC_ARB_DRAM_TIMING2_1, dram_timing2);

drivers/gpu/drm/radeon/rv730_dpm.c

443

WREG32(MC_ARB_DRAM_TIMING, old_dram_timing);

drivers/gpu/drm/radeon/rv730_dpm.c

444

WREG32(MC_ARB_DRAM_TIMING2, old_dram_timing2);

drivers/gpu/drm/radeon/rv730_dpm.c

482

WREG32(MC4_IO_DQ_PAD_CNTL_D0_I0, mc4_io_pad_cntl);

drivers/gpu/drm/radeon/rv730_dpm.c

483

WREG32(MC4_IO_DQ_PAD_CNTL_D0_I1, mc4_io_pad_cntl);

drivers/gpu/drm/radeon/rv730_dpm.c

488

WREG32(MC4_IO_QS_PAD_CNTL_D0_I0, mc4_io_pad_cntl);

drivers/gpu/drm/radeon/rv730_dpm.c

489

WREG32(MC4_IO_QS_PAD_CNTL_D0_I1, mc4_io_pad_cntl);

drivers/gpu/drm/radeon/rv770.c

1000

WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

1002

WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);

drivers/gpu/drm/radeon/rv770.c

1013

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1014

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1015

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1016

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1017

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1029

WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE);

drivers/gpu/drm/radeon/rv770.c

1034

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/rv770.c

1036

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/rv770.c

1040

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/rv770.c

1042

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/rv770.c

1046

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/rv770.c

1048

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/rv770.c

1051

WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, rdev->vram_scratch.gpu_addr >> 12);

drivers/gpu/drm/radeon/rv770.c

1054

WREG32(MC_VM_FB_LOCATION, tmp);

drivers/gpu/drm/radeon/rv770.c

1055

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

drivers/gpu/drm/radeon/rv770.c

1056

WREG32(HDP_NONSURFACE_INFO, (2 << 7));

drivers/gpu/drm/radeon/rv770.c

1057

WREG32(HDP_NONSURFACE_SIZE, 0x3FFFFFFF);

drivers/gpu/drm/radeon/rv770.c

1059

WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16);

drivers/gpu/drm/radeon/rv770.c

1060

WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16);

drivers/gpu/drm/radeon/rv770.c

1061

WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

drivers/gpu/drm/radeon/rv770.c

1063

WREG32(MC_VM_AGP_BASE, 0);

drivers/gpu/drm/radeon/rv770.c

1064

WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF);

drivers/gpu/drm/radeon/rv770.c

1065

WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF);

drivers/gpu/drm/radeon/rv770.c

1084

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));

drivers/gpu/drm/radeon/rv770.c

1085

WREG32(SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/rv770.c

1098

WREG32(CP_RB_CNTL,

drivers/gpu/drm/radeon/rv770.c

1105

WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP);

drivers/gpu/drm/radeon/rv770.c

1108

WREG32(GRBM_SOFT_RESET, 0);

drivers/gpu/drm/radeon/rv770.c

1111

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/rv770.c

1113

WREG32(CP_PFP_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/rv770.c

1114

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/rv770.c

1117

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/rv770.c

1119

WREG32(CP_ME_RAM_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/rv770.c

1121

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/rv770.c

1122

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/rv770.c

1123

WREG32(CP_ME_RAM_RADDR, 0);

drivers/gpu/drm/radeon/rv770.c

1145

WREG32(CG_SPLL_FUNC_CNTL_2, tmp);

drivers/gpu/drm/radeon/rv770.c

1154

WREG32(CG_SPLL_FUNC_CNTL_2, tmp);

drivers/gpu/drm/radeon/rv770.c

1161

WREG32(MPLL_CNTL_MODE, tmp);

drivers/gpu/drm/radeon/rv770.c

1289

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1290

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1291

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1292

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1293

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/rv770.c

1297

WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));

drivers/gpu/drm/radeon/rv770.c

1311

WREG32(SPI_CONFIG_CNTL, DISABLE_INTERP_1);

drivers/gpu/drm/radeon/rv770.c

1313

WREG32(SPI_CONFIG_CNTL, 0);

drivers/gpu/drm/radeon/rv770.c

1376

WREG32(GB_TILING_CONFIG, gb_tiling_config);

drivers/gpu/drm/radeon/rv770.c

1377

WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff));

drivers/gpu/drm/radeon/rv770.c

1378

WREG32(HDP_TILING_CONFIG, (gb_tiling_config & 0xffff));

drivers/gpu/drm/radeon/rv770.c

1379

WREG32(DMA_TILING_CONFIG, (gb_tiling_config & 0xffff));

drivers/gpu/drm/radeon/rv770.c

1380

WREG32(DMA_TILING_CONFIG2, (gb_tiling_config & 0xffff));

drivers/gpu/drm/radeon/rv770.c

1382

WREG32(UVD_UDEC_DB_TILING_CONFIG, (gb_tiling_config & 0xffff));

drivers/gpu/drm/radeon/rv770.c

1383

WREG32(UVD_UDEC_DBW_TILING_CONFIG, (gb_tiling_config & 0xffff));

drivers/gpu/drm/radeon/rv770.c

1384

WREG32(UVD_UDEC_TILING_CONFIG, (gb_tiling_config & 0xffff));

drivers/gpu/drm/radeon/rv770.c

1387

WREG32(CGTS_SYS_TCC_DISABLE, 0);

drivers/gpu/drm/radeon/rv770.c

1388

WREG32(CGTS_TCC_DISABLE, 0);

drivers/gpu/drm/radeon/rv770.c

1389

WREG32(CGTS_USER_SYS_TCC_DISABLE, 0);

drivers/gpu/drm/radeon/rv770.c

1390

WREG32(CGTS_USER_TCC_DISABLE, 0);

drivers/gpu/drm/radeon/rv770.c

1394

WREG32(VGT_OUT_DEALLOC_CNTL, (num_qd_pipes * 4) & DEALLOC_DIST_MASK);

drivers/gpu/drm/radeon/rv770.c

1395

WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, ((num_qd_pipes * 4) - 2) & VTX_REUSE_DEPTH_MASK);

drivers/gpu/drm/radeon/rv770.c

1398

WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) |

drivers/gpu/drm/radeon/rv770.c

1401

WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30));

drivers/gpu/drm/radeon/rv770.c

1404

WREG32(TA_CNTL_AUX, ta_aux_cntl | DISABLE_CUBE_ANISO);

drivers/gpu/drm/radeon/rv770.c

1408

WREG32(SX_DEBUG_1, sx_debug_1);

drivers/gpu/drm/radeon/rv770.c

1413

WREG32(SMX_DC_CTL0, smx_dc_ctl0);

drivers/gpu/drm/radeon/rv770.c

1416

WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) |

drivers/gpu/drm/radeon/rv770.c

1422

WREG32(SMX_SAR_CTL0, 0x00003f3f);

drivers/gpu/drm/radeon/rv770.c

1437

WREG32(DB_DEBUG3, db_debug3);

drivers/gpu/drm/radeon/rv770.c

1442

WREG32(DB_DEBUG4, db_debug4);

drivers/gpu/drm/radeon/rv770.c

1445

WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) |

drivers/gpu/drm/radeon/rv770.c

1449

WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) |

drivers/gpu/drm/radeon/rv770.c

1453

WREG32(PA_SC_MULTI_CHIP_CNTL, 0);

drivers/gpu/drm/radeon/rv770.c

1455

WREG32(VGT_NUM_INSTANCES, 1);

drivers/gpu/drm/radeon/rv770.c

1457

WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4));

drivers/gpu/drm/radeon/rv770.c

1459

WREG32(CP_PERFMON_CNTL, 0);

drivers/gpu/drm/radeon/rv770.c

1475

WREG32(SQ_MS_FIFO_SIZES, sq_ms_fifo_sizes);

drivers/gpu/drm/radeon/rv770.c

1496

WREG32(SQ_CONFIG, sq_config);

drivers/gpu/drm/radeon/rv770.c

1498

WREG32(SQ_GPR_RESOURCE_MGMT_1, (NUM_PS_GPRS((rdev->config.rv770.max_gprs * 24)/64) |

drivers/gpu/drm/radeon/rv770.c

1502

WREG32(SQ_GPR_RESOURCE_MGMT_2, (NUM_GS_GPRS((rdev->config.rv770.max_gprs * 7)/64) |

drivers/gpu/drm/radeon/rv770.c

1512

WREG32(SQ_THREAD_RESOURCE_MGMT, sq_thread_resource_mgmt);

drivers/gpu/drm/radeon/rv770.c

1514

WREG32(SQ_STACK_RESOURCE_MGMT_1, (NUM_PS_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4) |

drivers/gpu/drm/radeon/rv770.c

1517

WREG32(SQ_STACK_RESOURCE_MGMT_2, (NUM_GS_STACK_ENTRIES((rdev->config.rv770.max_stack_entries * 1)/4) |

drivers/gpu/drm/radeon/rv770.c

1525

WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_0, sq_dyn_gpr_size_simd_ab_0);

drivers/gpu/drm/radeon/rv770.c

1526

WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_1, sq_dyn_gpr_size_simd_ab_0);

drivers/gpu/drm/radeon/rv770.c

1527

WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_2, sq_dyn_gpr_size_simd_ab_0);

drivers/gpu/drm/radeon/rv770.c

1528

WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_3, sq_dyn_gpr_size_simd_ab_0);

drivers/gpu/drm/radeon/rv770.c

1529

WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_4, sq_dyn_gpr_size_simd_ab_0);

drivers/gpu/drm/radeon/rv770.c

1530

WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_5, sq_dyn_gpr_size_simd_ab_0);

drivers/gpu/drm/radeon/rv770.c

1531

WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_6, sq_dyn_gpr_size_simd_ab_0);

drivers/gpu/drm/radeon/rv770.c

1532

WREG32(SQ_DYN_GPR_SIZE_SIMD_AB_7, sq_dyn_gpr_size_simd_ab_0);

drivers/gpu/drm/radeon/rv770.c

1534

WREG32(PA_SC_FORCE_EOV_MAX_CNTS, (FORCE_EOV_MAX_CLK_CNT(4095) |

drivers/gpu/drm/radeon/rv770.c

1538

WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(TC_ONLY) |

drivers/gpu/drm/radeon/rv770.c

1541

WREG32(VGT_CACHE_INVALIDATION, (CACHE_INVALIDATION(VC_AND_TC) |

drivers/gpu/drm/radeon/rv770.c

1563

WREG32(VGT_ES_PER_GS, 128);

drivers/gpu/drm/radeon/rv770.c

1564

WREG32(VGT_GS_PER_ES, vgt_gs_per_es);

drivers/gpu/drm/radeon/rv770.c

1565

WREG32(VGT_GS_PER_VS, 2);

drivers/gpu/drm/radeon/rv770.c

1568

WREG32(VGT_GS_VERTEX_REUSE, 16);

drivers/gpu/drm/radeon/rv770.c

1569

WREG32(PA_SC_LINE_STIPPLE_STATE, 0);

drivers/gpu/drm/radeon/rv770.c

1570

WREG32(VGT_STRMOUT_EN, 0);

drivers/gpu/drm/radeon/rv770.c

1571

WREG32(SX_MISC, 0);

drivers/gpu/drm/radeon/rv770.c

1572

WREG32(PA_SC_MODE_CNTL, 0);

drivers/gpu/drm/radeon/rv770.c

1573

WREG32(PA_SC_EDGERULE, 0xaaaaaaaa);

drivers/gpu/drm/radeon/rv770.c

1574

WREG32(PA_SC_AA_CONFIG, 0);

drivers/gpu/drm/radeon/rv770.c

1575

WREG32(PA_SC_CLIPRECT_RULE, 0xffff);

drivers/gpu/drm/radeon/rv770.c

1576

WREG32(PA_SC_LINE_STIPPLE, 0);

drivers/gpu/drm/radeon/rv770.c

1577

WREG32(SPI_INPUT_Z, 0);

drivers/gpu/drm/radeon/rv770.c

1578

WREG32(SPI_PS_IN_CONTROL_0, NUM_INTERP(2));

drivers/gpu/drm/radeon/rv770.c

1579

WREG32(CB_COLOR7_FRAG, 0);

drivers/gpu/drm/radeon/rv770.c

1582

WREG32(CB_COLOR0_BASE, 0);

drivers/gpu/drm/radeon/rv770.c

1583

WREG32(CB_COLOR1_BASE, 0);

drivers/gpu/drm/radeon/rv770.c

1584

WREG32(CB_COLOR2_BASE, 0);

drivers/gpu/drm/radeon/rv770.c

1585

WREG32(CB_COLOR3_BASE, 0);

drivers/gpu/drm/radeon/rv770.c

1586

WREG32(CB_COLOR4_BASE, 0);

drivers/gpu/drm/radeon/rv770.c

1587

WREG32(CB_COLOR5_BASE, 0);

drivers/gpu/drm/radeon/rv770.c

1588

WREG32(CB_COLOR6_BASE, 0);

drivers/gpu/drm/radeon/rv770.c

1589

WREG32(CB_COLOR7_BASE, 0);

drivers/gpu/drm/radeon/rv770.c

1591

WREG32(TCP_CNTL, 0);

drivers/gpu/drm/radeon/rv770.c

1594

WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl);

drivers/gpu/drm/radeon/rv770.c

1596

WREG32(PA_SC_MULTI_CHIP_CNTL, 0);

drivers/gpu/drm/radeon/rv770.c

1598

WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA |

drivers/gpu/drm/radeon/rv770.c

1600

WREG32(VC_ENHANCE, 0);

drivers/gpu/drm/radeon/rv770.c

2066

WREG32(0x541c, tmp | 0x8);

drivers/gpu/drm/radeon/rv770.c

2067

WREG32(MM_CFGREGS_CNTL, MM_WR_TO_CFG_EN);

drivers/gpu/drm/radeon/rv770.c

2072

WREG32(MM_CFGREGS_CNTL, 0);

drivers/gpu/drm/radeon/rv770.c

809

WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/rv770.c

812

WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/rv770.c

815

WREG32(AVIVO_D1GRPH_PITCH + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/rv770.c

819

WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));

drivers/gpu/drm/radeon/rv770.c

820

WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));

drivers/gpu/drm/radeon/rv770.c

822

WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));

drivers/gpu/drm/radeon/rv770.c

823

WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base));

drivers/gpu/drm/radeon/rv770.c

825

WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/rv770.c

827

WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/rv770.c

840

WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/rv770.c

907

WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/rv770.c

910

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/rv770.c

911

WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));

drivers/gpu/drm/radeon/rv770.c

917

WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

918

WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

919

WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

921

WREG32(MC_VM_MD_L1_TLB3_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

922

WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

923

WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

924

WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

925

WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

926

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

drivers/gpu/drm/radeon/rv770.c

927

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

drivers/gpu/drm/radeon/rv770.c

928

WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);

drivers/gpu/drm/radeon/rv770.c

929

WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |

drivers/gpu/drm/radeon/rv770.c

931

WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/radeon/rv770.c

934

WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);

drivers/gpu/drm/radeon/rv770.c

951

WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);

drivers/gpu/drm/radeon/rv770.c

954

WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/rv770.c

956

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/rv770.c

957

WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));

drivers/gpu/drm/radeon/rv770.c

960

WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

961

WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

962

WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

963

WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

964

WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

965

WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

966

WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

984

WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |

drivers/gpu/drm/radeon/rv770.c

987

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/rv770.c

988

WREG32(VM_L2_CNTL3, BANK_SELECT(0) | CACHE_UPDATE_MODE(2));

drivers/gpu/drm/radeon/rv770.c

994

WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

995

WREG32(MC_VM_MD_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

996

WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

997

WREG32(MC_VM_MB_L1_TLB0_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

998

WREG32(MC_VM_MB_L1_TLB1_CNTL, tmp);

drivers/gpu/drm/radeon/rv770.c

999

WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);

drivers/gpu/drm/radeon/rv770_dpm.c

1358

WREG32(CG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/radeon/rv770_dpm.c

157

WREG32(CG_CGTT_LOCAL_0, mgcg_cgtt_local0);

drivers/gpu/drm/radeon/rv770_dpm.c

158

WREG32(CG_CGTT_LOCAL_1, (RV770_MGCGTTLOCAL1_DFLT & 0xFFFFCFFF));

drivers/gpu/drm/radeon/rv770_dpm.c

1587

WREG32(S0_VID_LOWER_SMIO_CNTL, vid_smio_cntl);

drivers/gpu/drm/radeon/rv770_dpm.c

161

WREG32(CGTS_SM_CTRL_REG, RV770_MGCGCGTSSMCTRL_DFLT);

drivers/gpu/drm/radeon/rv770_dpm.c

163

WREG32(CG_CGTT_LOCAL_0, 0xFFFFFFFF);

drivers/gpu/drm/radeon/rv770_dpm.c

164

WREG32(CG_CGTT_LOCAL_1, 0xFFFFCFFF);

drivers/gpu/drm/radeon/rv770_dpm.c

762

WREG32(MC_ARB_SQM_RATIO, sqm_ratio);

drivers/gpu/drm/radeon/rv770_dpm.c

769

WREG32(MC_ARB_RFSH_RATE, arb_refresh_rate);

drivers/gpu/drm/radeon/rv770_dpm.c

811

WREG32(MPLL_TIME,

drivers/gpu/drm/radeon/rv770_dpm.c

837

WREG32(CG_BSP, pi->dsp);

drivers/gpu/drm/radeon/rv770_dpm.c

852

WREG32(CG_FFCT_0 + (i * 4), (UTC_0(r600_utc[i]) | DTC_0(r600_dtc[i])));

drivers/gpu/drm/radeon/rv770_dpm.c

866

WREG32(CG_TPC, R600_TPC_DFLT);

drivers/gpu/drm/radeon/rv770_dpm.c

871

WREG32(CG_SSP, (SSTU(R600_SSTU_DFLT) | SST(R600_SST_DFLT)));

drivers/gpu/drm/radeon/rv770_dpm.c

886

WREG32(CG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/radeon/rv770_dpm.c

893

WREG32(CG_FTV, pi->vrc);

drivers/gpu/drm/radeon/rv770_dpm.c

898

WREG32(CG_FTV, 0);

drivers/gpu/drm/radeon/rv770_smc.c

278

WREG32(SMC_SRAM_ADDR, addr);

drivers/gpu/drm/radeon/rv770_smc.c

308

WREG32(SMC_SRAM_DATA, data);

drivers/gpu/drm/radeon/rv770_smc.c

341

WREG32(SMC_SRAM_DATA, data);

drivers/gpu/drm/radeon/rv770_smc.c

374

WREG32(SMC_ISR_FFD8_FFDB + i, tmp);

drivers/gpu/drm/radeon/rv770_smc.c

463

WREG32(SMC_SRAM_DATA, 0);

drivers/gpu/drm/radeon/rv770_smc.c

615

WREG32(SMC_SRAM_DATA, value);

drivers/gpu/drm/radeon/si.c

1607

WREG32(MC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/radeon/si.c

1608

WREG32(MC_SEQ_SUP_CNTL, 0x00000010);

drivers/gpu/drm/radeon/si.c

1613

WREG32(MC_SEQ_IO_DEBUG_INDEX, le32_to_cpup(new_io_mc_regs++));

drivers/gpu/drm/radeon/si.c

1614

WREG32(MC_SEQ_IO_DEBUG_DATA, le32_to_cpup(new_io_mc_regs++));

drivers/gpu/drm/radeon/si.c

1616

WREG32(MC_SEQ_IO_DEBUG_INDEX, io_mc_regs[(i << 1)]);

drivers/gpu/drm/radeon/si.c

1617

WREG32(MC_SEQ_IO_DEBUG_DATA, io_mc_regs[(i << 1) + 1]);

drivers/gpu/drm/radeon/si.c

1623

WREG32(MC_SEQ_SUP_PGM, le32_to_cpup(new_fw_data++));

drivers/gpu/drm/radeon/si.c

1625

WREG32(MC_SEQ_SUP_PGM, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/si.c

1629

WREG32(MC_SEQ_SUP_CNTL, 0x00000008);

drivers/gpu/drm/radeon/si.c

1630

WREG32(MC_SEQ_SUP_CNTL, 0x00000004);

drivers/gpu/drm/radeon/si.c

1631

WREG32(MC_SEQ_SUP_CNTL, 0x00000001);

drivers/gpu/drm/radeon/si.c

1980

WREG32(DC_LB_MEMORY_SPLIT + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/si.c

1983

WREG32(PIPE0_DMIF_BUFFER_CONTROL + pipe_offset,

drivers/gpu/drm/radeon/si.c

2415

WREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/si.c

2416

WREG32(DPG_PIPE_LATENCY_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/si.c

2423

WREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset, tmp);

drivers/gpu/drm/radeon/si.c

2424

WREG32(DPG_PIPE_LATENCY_CONTROL + radeon_crtc->crtc_offset,

drivers/gpu/drm/radeon/si.c

2428

WREG32(DPG_PIPE_ARBITRATION_CONTROL3 + radeon_crtc->crtc_offset, arb_control3);

drivers/gpu/drm/radeon/si.c

2431

WREG32(PRIORITY_A_CNT + radeon_crtc->crtc_offset, priority_a_cnt);

drivers/gpu/drm/radeon/si.c

2432

WREG32(PRIORITY_B_CNT + radeon_crtc->crtc_offset, priority_b_cnt);

drivers/gpu/drm/radeon/si.c

2704

WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);

drivers/gpu/drm/radeon/si.c

2919

WREG32(GB_TILE_MODE0 + (reg_offset * 4), tile[reg_offset]);

drivers/gpu/drm/radeon/si.c

2940

WREG32(GRBM_GFX_INDEX, data);

drivers/gpu/drm/radeon/si.c

2990

WREG32(SPI_STATIC_THREAD_MGMT_3, data);

drivers/gpu/drm/radeon/si.c

3064

WREG32(PA_SC_RASTER_CONFIG, data);

drivers/gpu/drm/radeon/si.c

3169

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

3170

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

3171

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

3172

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

3173

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

3176

WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));

drivers/gpu/drm/radeon/si.c

3177

WREG32(SRBM_INT_CNTL, 1);

drivers/gpu/drm/radeon/si.c

3178

WREG32(SRBM_INT_ACK, 1);

drivers/gpu/drm/radeon/si.c

3182

WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN);

drivers/gpu/drm/radeon/si.c

3254

WREG32(GB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/si.c

3255

WREG32(DMIF_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/si.c

3256

WREG32(DMIF_ADDR_CALC, gb_addr_config);

drivers/gpu/drm/radeon/si.c

3257

WREG32(HDP_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/si.c

3258

WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config);

drivers/gpu/drm/radeon/si.c

3259

WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config);

drivers/gpu/drm/radeon/si.c

3261

WREG32(UVD_UDEC_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/si.c

3262

WREG32(UVD_UDEC_DB_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/si.c

3263

WREG32(UVD_UDEC_DBW_ADDR_CONFIG, gb_addr_config);

drivers/gpu/drm/radeon/si.c

3285

WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) |

drivers/gpu/drm/radeon/si.c

3287

WREG32(CP_MEQ_THRESHOLDS, MEQ1_START(0x30) | MEQ2_START(0x60));

drivers/gpu/drm/radeon/si.c

3290

WREG32(SX_DEBUG_1, sx_debug_1);

drivers/gpu/drm/radeon/si.c

3292

WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4));

drivers/gpu/drm/radeon/si.c

3294

WREG32(PA_SC_FIFO_SIZE, (SC_FRONTEND_PRIM_FIFO_SIZE(rdev->config.si.sc_prim_fifo_size_frontend) |

drivers/gpu/drm/radeon/si.c

3299

WREG32(VGT_NUM_INSTANCES, 1);

drivers/gpu/drm/radeon/si.c

3301

WREG32(CP_PERFMON_CNTL, 0);

drivers/gpu/drm/radeon/si.c

3303

WREG32(SQ_CONFIG, 0);

drivers/gpu/drm/radeon/si.c

3305

WREG32(PA_SC_FORCE_EOV_MAX_CNTS, (FORCE_EOV_MAX_CLK_CNT(4095) |

drivers/gpu/drm/radeon/si.c

3308

WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC) |

drivers/gpu/drm/radeon/si.c

3311

WREG32(VGT_GS_VERTEX_REUSE, 16);

drivers/gpu/drm/radeon/si.c

3312

WREG32(PA_SC_LINE_STIPPLE_STATE, 0);

drivers/gpu/drm/radeon/si.c

3314

WREG32(CB_PERFCOUNTER0_SELECT0, 0);

drivers/gpu/drm/radeon/si.c

3315

WREG32(CB_PERFCOUNTER0_SELECT1, 0);

drivers/gpu/drm/radeon/si.c

3316

WREG32(CB_PERFCOUNTER1_SELECT0, 0);

drivers/gpu/drm/radeon/si.c

3317

WREG32(CB_PERFCOUNTER1_SELECT1, 0);

drivers/gpu/drm/radeon/si.c

3318

WREG32(CB_PERFCOUNTER2_SELECT0, 0);

drivers/gpu/drm/radeon/si.c

3319

WREG32(CB_PERFCOUNTER2_SELECT1, 0);

drivers/gpu/drm/radeon/si.c

3320

WREG32(CB_PERFCOUNTER3_SELECT0, 0);

drivers/gpu/drm/radeon/si.c

3321

WREG32(CB_PERFCOUNTER3_SELECT1, 0);

drivers/gpu/drm/radeon/si.c

3325

WREG32(HDP_MISC_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

3328

WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl);

drivers/gpu/drm/radeon/si.c

3330

WREG32(PA_CL_ENHANCE, CLIP_VTX_REORDER_ENA | NUM_CLIP_SEQ(3));

drivers/gpu/drm/radeon/si.c

3443

WREG32(CP_ME_CNTL, 0);

drivers/gpu/drm/radeon/si.c

3447

WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT));

drivers/gpu/drm/radeon/si.c

3448

WREG32(SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/si.c

3483

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3485

WREG32(CP_PFP_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/si.c

3486

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3492

WREG32(CP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3494

WREG32(CP_CE_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/si.c

3495

WREG32(CP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3501

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/si.c

3503

WREG32(CP_ME_RAM_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/si.c

3504

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/si.c

3510

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3512

WREG32(CP_PFP_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/si.c

3513

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3517

WREG32(CP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3519

WREG32(CP_CE_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/si.c

3520

WREG32(CP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3524

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/si.c

3526

WREG32(CP_ME_RAM_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/si.c

3527

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/si.c

3530

WREG32(CP_PFP_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3531

WREG32(CP_CE_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

3532

WREG32(CP_ME_RAM_WADDR, 0);

drivers/gpu/drm/radeon/si.c

3533

WREG32(CP_ME_RAM_RADDR, 0);

drivers/gpu/drm/radeon/si.c

3637

WREG32(CP_SEM_WAIT_TIMER, 0x0);

drivers/gpu/drm/radeon/si.c

3638

WREG32(CP_SEM_INCOMPLETE_TIMER_CNTL, 0x0);

drivers/gpu/drm/radeon/si.c

3641

WREG32(CP_RB_WPTR_DELAY, 0);

drivers/gpu/drm/radeon/si.c

3643

WREG32(CP_DEBUG, 0);

drivers/gpu/drm/radeon/si.c

3644

WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF);

drivers/gpu/drm/radeon/si.c

3654

WREG32(CP_RB0_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

3657

WREG32(CP_RB0_CNTL, tmp | RB_RPTR_WR_ENA);

drivers/gpu/drm/radeon/si.c

3659

WREG32(CP_RB0_WPTR, ring->wptr);

drivers/gpu/drm/radeon/si.c

3662

WREG32(CP_RB0_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC);

drivers/gpu/drm/radeon/si.c

3663

WREG32(CP_RB0_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF);

drivers/gpu/drm/radeon/si.c

3666

WREG32(SCRATCH_UMSK, 0xff);

drivers/gpu/drm/radeon/si.c

3669

WREG32(SCRATCH_UMSK, 0);

drivers/gpu/drm/radeon/si.c

3673

WREG32(CP_RB0_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

3675

WREG32(CP_RB0_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

3685

WREG32(CP_RB1_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

3688

WREG32(CP_RB1_CNTL, tmp | RB_RPTR_WR_ENA);

drivers/gpu/drm/radeon/si.c

3690

WREG32(CP_RB1_WPTR, ring->wptr);

drivers/gpu/drm/radeon/si.c

3693

WREG32(CP_RB1_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFFFFFFFC);

drivers/gpu/drm/radeon/si.c

3694

WREG32(CP_RB1_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFF);

drivers/gpu/drm/radeon/si.c

3697

WREG32(CP_RB1_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

3699

WREG32(CP_RB1_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

3709

WREG32(CP_RB2_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

3712

WREG32(CP_RB2_CNTL, tmp | RB_RPTR_WR_ENA);

drivers/gpu/drm/radeon/si.c

3714

WREG32(CP_RB2_WPTR, ring->wptr);

drivers/gpu/drm/radeon/si.c

3717

WREG32(CP_RB2_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFFFFFFFC);

drivers/gpu/drm/radeon/si.c

3718

WREG32(CP_RB2_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFF);

drivers/gpu/drm/radeon/si.c

3721

WREG32(CP_RB2_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

3723

WREG32(CP_RB2_BASE, ring->gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

3860

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/si.c

3866

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/si.c

3872

WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/si.c

3934

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/si.c

3940

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/si.c

3948

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/si.c

3954

WREG32(SRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/si.c

3973

WREG32(CG_SPLL_FUNC_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

3977

WREG32(CG_SPLL_FUNC_CNTL_2, tmp);

drivers/gpu/drm/radeon/si.c

3987

WREG32(CG_SPLL_FUNC_CNTL_2, tmp);

drivers/gpu/drm/radeon/si.c

3991

WREG32(MPLL_CNTL_MODE, tmp);

drivers/gpu/drm/radeon/si.c

4000

WREG32(SPLL_CNTL_MODE, tmp);

drivers/gpu/drm/radeon/si.c

4004

WREG32(CG_SPLL_FUNC_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

4008

WREG32(CG_SPLL_FUNC_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

4012

WREG32(SPLL_CNTL_MODE, tmp);

drivers/gpu/drm/radeon/si.c

4029

WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);

drivers/gpu/drm/radeon/si.c

4033

WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/si.c

4037

WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/si.c

4129

WREG32((0x2c14 + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

4130

WREG32((0x2c18 + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

4131

WREG32((0x2c1c + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

4132

WREG32((0x2c20 + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

4133

WREG32((0x2c24 + j), 0x00000000);

drivers/gpu/drm/radeon/si.c

4135

WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0);

drivers/gpu/drm/radeon/si.c

4143

WREG32(VGA_HDP_CONTROL, VGA_MEMORY_DISABLE);

drivers/gpu/drm/radeon/si.c

4145

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR,

drivers/gpu/drm/radeon/si.c

4147

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR,

drivers/gpu/drm/radeon/si.c

4149

WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,

drivers/gpu/drm/radeon/si.c

4153

WREG32(MC_VM_FB_LOCATION, tmp);

drivers/gpu/drm/radeon/si.c

4155

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

drivers/gpu/drm/radeon/si.c

4156

WREG32(HDP_NONSURFACE_INFO, (2 << 7) | (1 << 30));

drivers/gpu/drm/radeon/si.c

4157

WREG32(HDP_NONSURFACE_SIZE, 0x3FFFFFFF);

drivers/gpu/drm/radeon/si.c

4158

WREG32(MC_VM_AGP_BASE, 0);

drivers/gpu/drm/radeon/si.c

4159

WREG32(MC_VM_AGP_TOP, 0x0FFFFFFF);

drivers/gpu/drm/radeon/si.c

4160

WREG32(MC_VM_AGP_BOT, 0x0FFFFFFF);

drivers/gpu/drm/radeon/si.c

4259

WREG32(HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);

drivers/gpu/drm/radeon/si.c

4262

WREG32(VM_INVALIDATE_REQUEST, 1);

drivers/gpu/drm/radeon/si.c

4277

WREG32(MC_VM_MX_L1_TLB_CNTL,

drivers/gpu/drm/radeon/si.c

4285

WREG32(VM_L2_CNTL, ENABLE_L2_CACHE |

drivers/gpu/drm/radeon/si.c

4291

WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE);

drivers/gpu/drm/radeon/si.c

4292

WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY |

drivers/gpu/drm/radeon/si.c

4296

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

drivers/gpu/drm/radeon/si.c

4297

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

drivers/gpu/drm/radeon/si.c

4298

WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);

drivers/gpu/drm/radeon/si.c

4299

WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/radeon/si.c

4301

WREG32(VM_CONTEXT0_CNTL2, 0);

drivers/gpu/drm/radeon/si.c

4302

WREG32(VM_CONTEXT0_CNTL, (ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |

drivers/gpu/drm/radeon/si.c

4305

WREG32(0x15D4, 0);

drivers/gpu/drm/radeon/si.c

4306

WREG32(0x15D8, 0);

drivers/gpu/drm/radeon/si.c

4307

WREG32(0x15DC, 0);

drivers/gpu/drm/radeon/si.c

4311

WREG32(VM_CONTEXT1_PAGE_TABLE_START_ADDR, 0);

drivers/gpu/drm/radeon/si.c

4312

WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn - 1);

drivers/gpu/drm/radeon/si.c

4319

WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (i << 2),

drivers/gpu/drm/radeon/si.c

4322

WREG32(VM_CONTEXT8_PAGE_TABLE_BASE_ADDR + ((i - 8) << 2),

drivers/gpu/drm/radeon/si.c

4327

WREG32(VM_CONTEXT1_PROTECTION_FAULT_DEFAULT_ADDR,

drivers/gpu/drm/radeon/si.c

4329

WREG32(VM_CONTEXT1_CNTL2, 4);

drivers/gpu/drm/radeon/si.c

4330

WREG32(VM_CONTEXT1_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(1) |

drivers/gpu/drm/radeon/si.c

4367

WREG32(VM_CONTEXT0_CNTL, 0);

drivers/gpu/drm/radeon/si.c

4368

WREG32(VM_CONTEXT1_CNTL, 0);

drivers/gpu/drm/radeon/si.c

4370

WREG32(MC_VM_MX_L1_TLB_CNTL, SYSTEM_ACCESS_MODE_NOT_IN_SYS |

drivers/gpu/drm/radeon/si.c

4373

WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |

drivers/gpu/drm/radeon/si.c

4377

WREG32(VM_L2_CNTL2, 0);

drivers/gpu/drm/radeon/si.c

4378

WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY |

drivers/gpu/drm/radeon/si.c

5136

WREG32(CP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/radeon/si.c

5168

WREG32(UVD_CGC_CTRL, tmp);

drivers/gpu/drm/radeon/si.c

5181

WREG32(UVD_CGC_CTRL, tmp);

drivers/gpu/drm/radeon/si.c

5193

WREG32(RLC_CNTL, data);

drivers/gpu/drm/radeon/si.c

5207

WREG32(RLC_CNTL, rlc);

drivers/gpu/drm/radeon/si.c

5220

WREG32(DMA_PG, data);

drivers/gpu/drm/radeon/si.c

5227

WREG32(DMA_PGFSM_WRITE, 0x00002000);

drivers/gpu/drm/radeon/si.c

5228

WREG32(DMA_PGFSM_CONFIG, 0x100010ff);

drivers/gpu/drm/radeon/si.c

5231

WREG32(DMA_PGFSM_WRITE, 0);

drivers/gpu/drm/radeon/si.c

5241

WREG32(RLC_TTOP_D, tmp);

drivers/gpu/drm/radeon/si.c

5245

WREG32(RLC_PG_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

5249

WREG32(RLC_AUTO_PG_CTRL, tmp);

drivers/gpu/drm/radeon/si.c

5253

WREG32(RLC_AUTO_PG_CTRL, tmp);

drivers/gpu/drm/radeon/si.c

5263

WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

5267

WREG32(RLC_PG_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

5269

WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

5276

WREG32(RLC_AUTO_PG_CTRL, tmp);

drivers/gpu/drm/radeon/si.c

5327

WREG32(RLC_PG_AO_CU_MASK, tmp);

drivers/gpu/drm/radeon/si.c

5332

WREG32(RLC_MAX_PG_CU, tmp);

drivers/gpu/drm/radeon/si.c

5345

WREG32(RLC_GCPM_GENERAL_3, 0x00000080);

drivers/gpu/drm/radeon/si.c

5349

WREG32(RLC_SERDES_WR_MASTER_MASK_0, 0xffffffff);

drivers/gpu/drm/radeon/si.c

5350

WREG32(RLC_SERDES_WR_MASTER_MASK_1, 0xffffffff);

drivers/gpu/drm/radeon/si.c

5351

WREG32(RLC_SERDES_WR_CTRL, 0x00b000ff);

drivers/gpu/drm/radeon/si.c

5357

WREG32(RLC_SERDES_WR_CTRL, 0x007000ff);

drivers/gpu/drm/radeon/si.c

5372

WREG32(RLC_CGCG_CGLS_CTRL, data);

drivers/gpu/drm/radeon/si.c

5384

WREG32(CGTS_SM_CTRL_REG, data);

drivers/gpu/drm/radeon/si.c

5390

WREG32(CP_MEM_SLP_CNTL, data);

drivers/gpu/drm/radeon/si.c

5396

WREG32(RLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/radeon/si.c

5400

WREG32(RLC_SERDES_WR_MASTER_MASK_0, 0xffffffff);

drivers/gpu/drm/radeon/si.c

5401

WREG32(RLC_SERDES_WR_MASTER_MASK_1, 0xffffffff);

drivers/gpu/drm/radeon/si.c

5402

WREG32(RLC_SERDES_WR_CTRL, 0x00d000ff);

drivers/gpu/drm/radeon/si.c

5409

WREG32(RLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/radeon/si.c

5414

WREG32(CP_MEM_SLP_CNTL, data);

drivers/gpu/drm/radeon/si.c

5419

WREG32(CGTS_SM_CTRL_REG, data);

drivers/gpu/drm/radeon/si.c

5423

WREG32(RLC_SERDES_WR_MASTER_MASK_0, 0xffffffff);

drivers/gpu/drm/radeon/si.c

5424

WREG32(RLC_SERDES_WR_MASTER_MASK_1, 0xffffffff);

drivers/gpu/drm/radeon/si.c

5425

WREG32(RLC_SERDES_WR_CTRL, 0x00e000ff);

drivers/gpu/drm/radeon/si.c

5444

WREG32(UVD_CGC_CTRL, data);

drivers/gpu/drm/radeon/si.c

5456

WREG32(UVD_CGC_CTRL, data);

drivers/gpu/drm/radeon/si.c

5489

WREG32(mc_cg_registers[i], data);

drivers/gpu/drm/radeon/si.c

5506

WREG32(mc_cg_registers[i], data);

drivers/gpu/drm/radeon/si.c

5525

WREG32(DMA_POWER_CNTL + offset, data);

drivers/gpu/drm/radeon/si.c

5526

WREG32(DMA_CLK_CTRL + offset, 0x00000100);

drivers/gpu/drm/radeon/si.c

5537

WREG32(DMA_POWER_CNTL + offset, data);

drivers/gpu/drm/radeon/si.c

5542

WREG32(DMA_CLK_CTRL + offset, data);

drivers/gpu/drm/radeon/si.c

5578

WREG32(HDP_HOST_PATH_CNTL, data);

drivers/gpu/drm/radeon/si.c

5594

WREG32(HDP_MEM_POWER_LS, data);

drivers/gpu/drm/radeon/si.c

5765

WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

5766

WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

5771

WREG32(RLC_SAVE_AND_RESTORE_BASE, rdev->rlc.save_restore_gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

5772

WREG32(RLC_CLEAR_STATE_RESTORE_BASE, rdev->rlc.clear_state_gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

5792

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/si.c

5795

WREG32(GRBM_SOFT_RESET, tmp);

drivers/gpu/drm/radeon/si.c

5801

WREG32(RLC_CNTL, 0);

drivers/gpu/drm/radeon/si.c

5810

WREG32(RLC_CNTL, RLC_ENABLE);

drivers/gpu/drm/radeon/si.c

5837

WREG32(RLC_LB_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

5841

WREG32(SPI_LB_CU_MASK, 0x00ff);

drivers/gpu/drm/radeon/si.c

5860

WREG32(RLC_RL_BASE, 0);

drivers/gpu/drm/radeon/si.c

5861

WREG32(RLC_RL_SIZE, 0);

drivers/gpu/drm/radeon/si.c

5862

WREG32(RLC_LB_CNTL, 0);

drivers/gpu/drm/radeon/si.c

5863

WREG32(RLC_LB_CNTR_MAX, 0xffffffff);

drivers/gpu/drm/radeon/si.c

5864

WREG32(RLC_LB_CNTR_INIT, 0);

drivers/gpu/drm/radeon/si.c

5865

WREG32(RLC_LB_INIT_CU_MASK, 0xffffffff);

drivers/gpu/drm/radeon/si.c

5867

WREG32(RLC_MC_CNTL, 0);

drivers/gpu/drm/radeon/si.c

5868

WREG32(RLC_UCODE_CNTL, 0);

drivers/gpu/drm/radeon/si.c

5880

WREG32(RLC_UCODE_ADDR, i);

drivers/gpu/drm/radeon/si.c

5881

WREG32(RLC_UCODE_DATA, le32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/si.c

5887

WREG32(RLC_UCODE_ADDR, i);

drivers/gpu/drm/radeon/si.c

5888

WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));

drivers/gpu/drm/radeon/si.c

5891

WREG32(RLC_UCODE_ADDR, 0);

drivers/gpu/drm/radeon/si.c

5907

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/radeon/si.c

5908

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/radeon/si.c

5919

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/radeon/si.c

5920

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/radeon/si.c

5922

WREG32(IH_RB_RPTR, 0);

drivers/gpu/drm/radeon/si.c

5923

WREG32(IH_RB_WPTR, 0);

drivers/gpu/drm/radeon/si.c

5935

WREG32(CP_INT_CNTL_RING0, tmp);

drivers/gpu/drm/radeon/si.c

5936

WREG32(CP_INT_CNTL_RING1, 0);

drivers/gpu/drm/radeon/si.c

5937

WREG32(CP_INT_CNTL_RING2, 0);

drivers/gpu/drm/radeon/si.c

5939

WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/si.c

5941

WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp);

drivers/gpu/drm/radeon/si.c

5942

WREG32(GRBM_INT_CNTL, 0);

drivers/gpu/drm/radeon/si.c

5943

WREG32(SRBM_INT_CNTL, 0);

drivers/gpu/drm/radeon/si.c

5945

WREG32(INT_MASK + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/si.c

5947

WREG32(GRPH_INT_CONTROL + crtc_offsets[i], 0);

drivers/gpu/drm/radeon/si.c

5950

WREG32(DAC_AUTODETECT_INT_CONTROL, 0);

drivers/gpu/drm/radeon/si.c

5981

WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8);

drivers/gpu/drm/radeon/si.c

5989

WREG32(INTERRUPT_CNTL, interrupt_cntl);

drivers/gpu/drm/radeon/si.c

5991

WREG32(IH_RB_BASE, rdev->ih.gpu_addr >> 8);

drivers/gpu/drm/radeon/si.c

6002

WREG32(IH_RB_WPTR_ADDR_LO, (rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFFFFFFFC);

drivers/gpu/drm/radeon/si.c

6003

WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF);

drivers/gpu/drm/radeon/si.c

6005

WREG32(IH_RB_CNTL, ih_rb_cntl);

drivers/gpu/drm/radeon/si.c

6008

WREG32(IH_RB_RPTR, 0);

drivers/gpu/drm/radeon/si.c

6009

WREG32(IH_RB_WPTR, 0);

drivers/gpu/drm/radeon/si.c

6016

WREG32(IH_CNTL, ih_cntl);

drivers/gpu/drm/radeon/si.c

6083

WREG32(CP_INT_CNTL_RING0, cp_int_cntl);

drivers/gpu/drm/radeon/si.c

6084

WREG32(CP_INT_CNTL_RING1, cp_int_cntl1);

drivers/gpu/drm/radeon/si.c

6085

WREG32(CP_INT_CNTL_RING2, cp_int_cntl2);

drivers/gpu/drm/radeon/si.c

6087

WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, dma_cntl);

drivers/gpu/drm/radeon/si.c

6088

WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, dma_cntl1);

drivers/gpu/drm/radeon/si.c

6090

WREG32(GRBM_INT_CNTL, grbm_int_cntl);

drivers/gpu/drm/radeon/si.c

6105

WREG32(GRPH_INT_CONTROL + crtc_offsets[i], GRPH_PFLIP_INT_MASK);

drivers/gpu/drm/radeon/si.c

6116

WREG32(CG_THERMAL_INT, thermal_int);

drivers/gpu/drm/radeon/si.c

6144

WREG32(GRPH_INT_STATUS + crtc_offsets[j],

drivers/gpu/drm/radeon/si.c

6150

WREG32(VBLANK_STATUS + crtc_offsets[j],

drivers/gpu/drm/radeon/si.c

6153

WREG32(VLINE_STATUS + crtc_offsets[j],

drivers/gpu/drm/radeon/si.c

6210

WREG32(IH_RB_CNTL, tmp);

drivers/gpu/drm/radeon/si.c

6344

WREG32(SRBM_INT_ACK, 0x1);

drivers/gpu/drm/radeon/si.c

6417

WREG32(IH_RB_RPTR, rptr);

drivers/gpu/drm/radeon/si.c

6968

WREG32(RLC_CAPTURE_GPU_CLOCK_COUNT, 1);

drivers/gpu/drm/radeon/si.c

7375

WREG32(THM_CLK_CNTL, data);

drivers/gpu/drm/radeon/si.c

7381

WREG32(MISC_CLK_CNTL, data);

drivers/gpu/drm/radeon/si.c

7386

WREG32(CG_CLKPIN_CNTL, data);

drivers/gpu/drm/radeon/si.c

7391

WREG32(CG_CLKPIN_CNTL_2, data);

drivers/gpu/drm/radeon/si.c

7397

WREG32(MPLL_BYPASSCLK_SEL, data);

drivers/gpu/drm/radeon/si.c

7402

WREG32(SPLL_CNTL_MODE, data);

drivers/gpu/drm/radeon/si_dpm.c

2608

WREG32(CG_CAC_CTRL, reg);

drivers/gpu/drm/radeon/si_dpm.c

2703

WREG32(config_regs->offset << 2, data);

drivers/gpu/drm/radeon/si_dpm.c

3159

WREG32(MC_SEQ_IO_DEBUG_INDEX, 0xb);

drivers/gpu/drm/radeon/si_dpm.c

3331

WREG32(SMC_SCRATCH0, parameter);

drivers/gpu/drm/radeon/si_dpm.c

3549

WREG32(SMC_MESSAGE_0, PPSMC_MSG_SwitchToMinimumPower);

drivers/gpu/drm/radeon/si_dpm.c

3560

WREG32(SMC_MESSAGE_0, PPSMC_MSG_ResumeFromMinimumPower);

drivers/gpu/drm/radeon/si_dpm.c

3640

WREG32(CG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/radeon/si_dpm.c

3659

WREG32(DCCG_DISP_SLOW_SELECT_REG, tmp);

drivers/gpu/drm/radeon/si_dpm.c

3703

WREG32(CG_BSP, pi->dsp);

drivers/gpu/drm/radeon/si_dpm.c

3717

WREG32(CG_FFCT_0 + (i * 4), (UTC_0(r600_utc[i]) | DTC_0(r600_dtc[i])));

drivers/gpu/drm/radeon/si_dpm.c

3733

WREG32(CG_TPC, R600_TPC_DFLT);

drivers/gpu/drm/radeon/si_dpm.c

3738

WREG32(CG_SSP, (SSTU(R600_SSTU_DFLT) | SST(R600_SST_DFLT)));

drivers/gpu/drm/radeon/si_dpm.c

3752

WREG32(CG_DISPLAY_GAP_CNTL, tmp);

drivers/gpu/drm/radeon/si_dpm.c

3759

WREG32(CG_FTV, pi->vrc);

drivers/gpu/drm/radeon/si_dpm.c

3764

WREG32(CG_FTV, 0);

drivers/gpu/drm/radeon/si_dpm.c

4712

WREG32(CG_ULV_CONTROL, ulv->cg_ulv_control);

drivers/gpu/drm/radeon/si_dpm.c

4713

WREG32(CG_ULV_PARAMETER, ulv->cg_ulv_parameter);

drivers/gpu/drm/radeon/si_dpm.c

5488

WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));

drivers/gpu/drm/radeon/si_dpm.c

5489

WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING));

drivers/gpu/drm/radeon/si_dpm.c

5490

WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING));

drivers/gpu/drm/radeon/si_dpm.c

5491

WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2));

drivers/gpu/drm/radeon/si_dpm.c

5492

WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS));

drivers/gpu/drm/radeon/si_dpm.c

5493

WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS));

drivers/gpu/drm/radeon/si_dpm.c

5494

WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1));

drivers/gpu/drm/radeon/si_dpm.c

5495

WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0));

drivers/gpu/drm/radeon/si_dpm.c

5496

WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1));

drivers/gpu/drm/radeon/si_dpm.c

5497

WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));

drivers/gpu/drm/radeon/si_dpm.c

5498

WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1));

drivers/gpu/drm/radeon/si_dpm.c

5499

WREG32(MC_SEQ_PMG_TIMING_LP, RREG32(MC_SEQ_PMG_TIMING));

drivers/gpu/drm/radeon/si_dpm.c

5500

WREG32(MC_SEQ_PMG_CMD_MRS2_LP, RREG32(MC_PMG_CMD_MRS2));

drivers/gpu/drm/radeon/si_dpm.c

5501

WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2));

drivers/gpu/drm/radeon/si_dpm.c

5910

WREG32(CG_THERMAL_INT, thermal_int);

drivers/gpu/drm/radeon/si_dpm.c

5919

WREG32(CG_THERMAL_INT, thermal_int);

drivers/gpu/drm/radeon/si_dpm.c

5966

WREG32(CG_FDO_CTRL2, tmp);

drivers/gpu/drm/radeon/si_dpm.c

5970

WREG32(CG_FDO_CTRL2, tmp);

drivers/gpu/drm/radeon/si_dpm.c

6132

WREG32(CG_FDO_CTRL0, tmp);

drivers/gpu/drm/radeon/si_dpm.c

6209

WREG32(CG_TACH_CTRL, tmp);

drivers/gpu/drm/radeon/si_dpm.c

6225

WREG32(CG_FDO_CTRL2, tmp);

drivers/gpu/drm/radeon/si_dpm.c

6229

WREG32(CG_FDO_CTRL2, tmp);

drivers/gpu/drm/radeon/si_dpm.c

6249

WREG32(CG_TACH_CTRL, tmp);

drivers/gpu/drm/radeon/si_dpm.c

6254

WREG32(CG_FDO_CTRL2, tmp);

drivers/gpu/drm/radeon/si_smc.c

104

WREG32(SMC_IND_DATA_0, data);

drivers/gpu/drm/radeon/si_smc.c

180

WREG32(SMC_MESSAGE_0, msg);

drivers/gpu/drm/radeon/si_smc.c

265

WREG32(SMC_IND_INDEX_0, ucode_start_address);

drivers/gpu/drm/radeon/si_smc.c

271

WREG32(SMC_IND_DATA_0, data);

drivers/gpu/drm/radeon/si_smc.c

306

WREG32(SMC_IND_DATA_0, value);

drivers/gpu/drm/radeon/si_smc.c

41

WREG32(SMC_IND_INDEX_0, smc_address);

drivers/gpu/drm/radeon/si_smc.c

71

WREG32(SMC_IND_DATA_0, data);

drivers/gpu/drm/radeon/sumo_dpm.c

110

WREG32(CG_CGTT_LOCAL_0, (0 & CGCG_CGTT_LOCAL0_MASK) | (local0 & ~CGCG_CGTT_LOCAL0_MASK));

drivers/gpu/drm/radeon/sumo_dpm.c

111

WREG32(CG_CGTT_LOCAL_1, (0 & CGCG_CGTT_LOCAL1_MASK) | (local1 & ~CGCG_CGTT_LOCAL1_MASK));

drivers/gpu/drm/radeon/sumo_dpm.c

113

WREG32(CG_CGTT_LOCAL_0, (0xFFFFFFFF & CGCG_CGTT_LOCAL0_MASK) | (local0 & ~CGCG_CGTT_LOCAL0_MASK));

drivers/gpu/drm/radeon/sumo_dpm.c

114

WREG32(CG_CGTT_LOCAL_1, (0xFFFFCFFF & CGCG_CGTT_LOCAL1_MASK) | (local1 & ~CGCG_CGTT_LOCAL1_MASK));

drivers/gpu/drm/radeon/sumo_dpm.c

137

WREG32(CG_GCOOR, PHC(grs) | SDC(p) | SU(u));

drivers/gpu/drm/radeon/sumo_dpm.c

168

WREG32(CG_SCRATCH2, 0x01B60A17);

drivers/gpu/drm/radeon/sumo_dpm.c

335

WREG32(CG_BSP_0, pi->psp);

drivers/gpu/drm/radeon/sumo_dpm.c

353

WREG32(CG_BSP_0 + (i * 4), pi->dsp);

drivers/gpu/drm/radeon/sumo_dpm.c

355

WREG32(CG_BSP_0 + (i * 4), pi->psp);

drivers/gpu/drm/radeon/sumo_dpm.c

358

WREG32(CG_BSP_0 + (BOOST_DPM_LEVEL * 4), pi->psp);

drivers/gpu/drm/radeon/sumo_dpm.c

365

WREG32(CG_AT_0, value);

drivers/gpu/drm/radeon/sumo_dpm.c

367

WREG32(CG_AT_1, value);

drivers/gpu/drm/radeon/sumo_dpm.c

369

WREG32(CG_AT_2, value);

drivers/gpu/drm/radeon/sumo_dpm.c

371

WREG32(CG_AT_3, value);

drivers/gpu/drm/radeon/sumo_dpm.c

373

WREG32(CG_AT_4, value);

drivers/gpu/drm/radeon/sumo_dpm.c

375

WREG32(CG_AT_5, value);

drivers/gpu/drm/radeon/sumo_dpm.c

377

WREG32(CG_AT_6, value);

drivers/gpu/drm/radeon/sumo_dpm.c

379

WREG32(CG_AT_7, value);

drivers/gpu/drm/radeon/sumo_dpm.c

452

WREG32(CG_FTV, vrc);

drivers/gpu/drm/radeon/sumo_dpm.c

457

WREG32(CG_FTV, 0);

drivers/gpu/drm/radeon/sumo_dpm.c

468

WREG32(CG_SSP, SSTU(u) | SST(p));

drivers/gpu/drm/radeon/sumo_dpm.c

501

WREG32(CG_SCLK_DPM_CTRL_6, dpm_ctrl);

drivers/gpu/drm/radeon/sumo_dpm.c

515

WREG32(CG_SCLK_DPM_CTRL_11, dpm_ctrl);

drivers/gpu/drm/radeon/sumo_dpm.c

525

WREG32(CG_DPM_VOLTAGE_CNTL, voltage_cntl);

drivers/gpu/drm/radeon/sumo_dpm.c

541

WREG32(CG_SCLK_DPM_CTRL_3, cg_sclk_dpm_ctrl_3);

drivers/gpu/drm/radeon/sumo_dpm.c

746

WREG32(CG_SCLK_DPM_CTRL_4, dpm_ctrl4);

drivers/gpu/drm/radeon/sumo_dpm.c

806

WREG32(CG_SCLK_DPM_CTRL_4, dpm_ctrl4);

drivers/gpu/drm/radeon/sumo_dpm.c

882

WREG32(DOUT_SCRATCH3, v);

drivers/gpu/drm/radeon/sumo_dpm.c

901

WREG32(DEEP_SLEEP_CNTL2, deep_sleep_cntl2);

drivers/gpu/drm/radeon/sumo_dpm.c

902

WREG32(DEEP_SLEEP_CNTL, deep_sleep_cntl);

drivers/gpu/drm/radeon/sumo_dpm.c

935

WREG32(CG_SCLK_DPM_CTRL_5, cg_sclk_dpm_ctrl_5);

drivers/gpu/drm/radeon/sumo_dpm.c

946

WREG32(CG_SCLK_DPM_CTRL_3, cg_sclk_dpm_ctrl_3);

drivers/gpu/drm/radeon/sumo_dpm.c

979

WREG32(CG_SCLK_DPM_CTRL_4, cg_sclk_dpm_ctrl_4);

drivers/gpu/drm/radeon/sumo_smc.c

45

WREG32(GFX_INT_REQ, gfx_int_req);

drivers/gpu/drm/radeon/sumo_smc.c

66

WREG32(GFX_INT_REQ, gfx_int_req);

drivers/gpu/drm/radeon/trinity_dpm.c

339

WREG32(CG_PG_CTRL, SP(p) | SU(u));

drivers/gpu/drm/radeon/trinity_dpm.c

369

WREG32(CGTS_SM_CTRL_REG, CGTS_SM_CTRL_REG_ENABLE);

drivers/gpu/drm/radeon/trinity_dpm.c

371

WREG32(CGTS_SM_CTRL_REG, CGTS_SM_CTRL_REG_DISABLE);

drivers/gpu/drm/radeon/trinity_dpm.c

422

WREG32(seq[i], seq[i+1]);

drivers/gpu/drm/radeon/trinity_dpm.c

893

WREG32(CG_MISC_REG, tmp);

drivers/gpu/drm/radeon/trinity_smc.c

115

WREG32(SMC_INT_REQ, 1);

drivers/gpu/drm/radeon/trinity_smc.c

125

WREG32(SMC_INT_REQ, 0);

drivers/gpu/drm/radeon/trinity_smc.c

34

WREG32(SMC_MESSAGE_0, id);

drivers/gpu/drm/radeon/uvd_v1_0.c

123

WREG32(UVD_VCPU_CACHE_OFFSET0, addr);

drivers/gpu/drm/radeon/uvd_v1_0.c

124

WREG32(UVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/radeon/uvd_v1_0.c

128

WREG32(UVD_VCPU_CACHE_OFFSET1, addr);

drivers/gpu/drm/radeon/uvd_v1_0.c

129

WREG32(UVD_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/radeon/uvd_v1_0.c

134

WREG32(UVD_VCPU_CACHE_OFFSET2, addr);

drivers/gpu/drm/radeon/uvd_v1_0.c

135

WREG32(UVD_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/radeon/uvd_v1_0.c

139

WREG32(UVD_LMI_ADDR_EXT, (addr << 12) | (addr << 0));

drivers/gpu/drm/radeon/uvd_v1_0.c

143

WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));

drivers/gpu/drm/radeon/uvd_v1_0.c

145

WREG32(UVD_FW_START, *((uint32_t *)rdev->uvd.cpu_addr));

drivers/gpu/drm/radeon/uvd_v1_0.c

217

WREG32(MC_CONFIG, 0);

drivers/gpu/drm/radeon/uvd_v1_0.c

218

WREG32(MC_CONFIG, 1 << 4);

drivers/gpu/drm/radeon/uvd_v1_0.c

219

WREG32(RS_DQ_RD_RET_CONF, 0x3f);

drivers/gpu/drm/radeon/uvd_v1_0.c

220

WREG32(MC_CONFIG, 0x1f);

drivers/gpu/drm/radeon/uvd_v1_0.c

274

WREG32(UVD_CGC_GATE, 0);

drivers/gpu/drm/radeon/uvd_v1_0.c

285

WREG32(UVD_SOFT_RESET, LMI_SOFT_RESET | VCPU_SOFT_RESET |

drivers/gpu/drm/radeon/uvd_v1_0.c

295

WREG32(UVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) |

drivers/gpu/drm/radeon/uvd_v1_0.c

303

WREG32(UVD_LMI_SWAP_CNTL, lmi_swap_cntl);

drivers/gpu/drm/radeon/uvd_v1_0.c

304

WREG32(UVD_MP_SWAP_CNTL, mp_swap_cntl);

drivers/gpu/drm/radeon/uvd_v1_0.c

306

WREG32(UVD_MPC_SET_MUXA0, 0x40c2040);

drivers/gpu/drm/radeon/uvd_v1_0.c

307

WREG32(UVD_MPC_SET_MUXA1, 0x0);

drivers/gpu/drm/radeon/uvd_v1_0.c

308

WREG32(UVD_MPC_SET_MUXB0, 0x40c2040);

drivers/gpu/drm/radeon/uvd_v1_0.c

309

WREG32(UVD_MPC_SET_MUXB1, 0x0);

drivers/gpu/drm/radeon/uvd_v1_0.c

310

WREG32(UVD_MPC_SET_ALU, 0);

drivers/gpu/drm/radeon/uvd_v1_0.c

311

WREG32(UVD_MPC_SET_MUX, 0x88);

drivers/gpu/drm/radeon/uvd_v1_0.c

314

WREG32(UVD_SOFT_RESET, VCPU_SOFT_RESET);

drivers/gpu/drm/radeon/uvd_v1_0.c

318

WREG32(UVD_VCPU_CNTL, 1 << 9);

drivers/gpu/drm/radeon/uvd_v1_0.c

326

WREG32(UVD_SOFT_RESET, 0);

drivers/gpu/drm/radeon/uvd_v1_0.c

358

WREG32(UVD_RBC_RB_CNTL, 0x11010101);

drivers/gpu/drm/radeon/uvd_v1_0.c

361

WREG32(UVD_RBC_RB_WPTR_CNTL, 0);

drivers/gpu/drm/radeon/uvd_v1_0.c

364

WREG32(UVD_LMI_EXT40_ADDR, upper_32_bits(ring->gpu_addr) |

drivers/gpu/drm/radeon/uvd_v1_0.c

368

WREG32(UVD_RBC_RB_RPTR, 0x0);

drivers/gpu/drm/radeon/uvd_v1_0.c

371

WREG32(UVD_RBC_RB_WPTR, ring->wptr);

drivers/gpu/drm/radeon/uvd_v1_0.c

374

WREG32(UVD_RBC_RB_BASE, ring->gpu_addr);

drivers/gpu/drm/radeon/uvd_v1_0.c

394

WREG32(UVD_RBC_RB_CNTL, 0x11010101);

drivers/gpu/drm/radeon/uvd_v1_0.c

402

WREG32(UVD_SOFT_RESET, VCPU_SOFT_RESET);

drivers/gpu/drm/radeon/uvd_v1_0.c

406

WREG32(UVD_VCPU_CNTL, 0x0);

drivers/gpu/drm/radeon/uvd_v1_0.c

427

WREG32(UVD_CONTEXT_ID, 0xCAFEDEAD);

drivers/gpu/drm/radeon/uvd_v1_0.c

70

WREG32(UVD_RBC_RB_WPTR, ring->wptr);

drivers/gpu/drm/radeon/uvd_v2_2.c

115

WREG32(UVD_VCPU_CACHE_OFFSET0, addr);

drivers/gpu/drm/radeon/uvd_v2_2.c

116

WREG32(UVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/radeon/uvd_v2_2.c

120

WREG32(UVD_VCPU_CACHE_OFFSET1, addr);

drivers/gpu/drm/radeon/uvd_v2_2.c

121

WREG32(UVD_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/radeon/uvd_v2_2.c

126

WREG32(UVD_VCPU_CACHE_OFFSET2, addr);

drivers/gpu/drm/radeon/uvd_v2_2.c

127

WREG32(UVD_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/radeon/uvd_v2_2.c

131

WREG32(UVD_LMI_ADDR_EXT, (addr << 12) | (addr << 0));

drivers/gpu/drm/radeon/uvd_v2_2.c

135

WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));

drivers/gpu/drm/radeon/uvd_v2_2.c

196

WREG32(UVD_VCPU_CHIP_ID, chip_id);

drivers/gpu/drm/radeon/uvd_v4_2.c

52

WREG32(UVD_VCPU_CACHE_OFFSET0, addr);

drivers/gpu/drm/radeon/uvd_v4_2.c

53

WREG32(UVD_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/radeon/uvd_v4_2.c

57

WREG32(UVD_VCPU_CACHE_OFFSET1, addr);

drivers/gpu/drm/radeon/uvd_v4_2.c

58

WREG32(UVD_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/radeon/uvd_v4_2.c

63

WREG32(UVD_VCPU_CACHE_OFFSET2, addr);

drivers/gpu/drm/radeon/uvd_v4_2.c

64

WREG32(UVD_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/radeon/uvd_v4_2.c

68

WREG32(UVD_LMI_ADDR_EXT, (addr << 12) | (addr << 0));

drivers/gpu/drm/radeon/uvd_v4_2.c

72

WREG32(UVD_LMI_EXT40_ADDR, addr | (0x9 << 16) | (0x1 << 31));

drivers/gpu/drm/radeon/uvd_v4_2.c

75

WREG32(UVD_GP_SCRATCH4, rdev->uvd.max_handles);

drivers/gpu/drm/radeon/vce_v1_0.c

100

WREG32(VCE_RB_WPTR2, ring->wptr);

drivers/gpu/drm/radeon/vce_v1_0.c

110

WREG32(VCE_CLOCK_GATING_A, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

115

WREG32(VCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

119

WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

123

WREG32(VCE_CLOCK_GATING_A, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

128

WREG32(VCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

132

WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

142

WREG32(VCE_CLOCK_GATING_A, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

147

WREG32(VCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

151

WREG32(VCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

155

WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v1_0.c

225

WREG32(VCE_CLOCK_GATING_B, 0);

drivers/gpu/drm/radeon/vce_v1_0.c

229

WREG32(VCE_LMI_CTRL, 0x00398000);

drivers/gpu/drm/radeon/vce_v1_0.c

231

WREG32(VCE_LMI_SWAP_CNTL, 0);

drivers/gpu/drm/radeon/vce_v1_0.c

232

WREG32(VCE_LMI_SWAP_CNTL1, 0);

drivers/gpu/drm/radeon/vce_v1_0.c

233

WREG32(VCE_LMI_VM_CTRL, 0);

drivers/gpu/drm/radeon/vce_v1_0.c

235

WREG32(VCE_VCPU_SCRATCH7, RADEON_MAX_VCE_HANDLES);

drivers/gpu/drm/radeon/vce_v1_0.c

239

WREG32(VCE_VCPU_CACHE_OFFSET0, addr & 0x7fffffff);

drivers/gpu/drm/radeon/vce_v1_0.c

240

WREG32(VCE_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/radeon/vce_v1_0.c

244

WREG32(VCE_VCPU_CACHE_OFFSET1, addr & 0x7fffffff);

drivers/gpu/drm/radeon/vce_v1_0.c

245

WREG32(VCE_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/radeon/vce_v1_0.c

249

WREG32(VCE_VCPU_CACHE_OFFSET2, addr & 0x7fffffff);

drivers/gpu/drm/radeon/vce_v1_0.c

250

WREG32(VCE_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/radeon/vce_v1_0.c

254

WREG32(VCE_LMI_FW_START_KEYSEL, rdev->vce.keyselect);

drivers/gpu/drm/radeon/vce_v1_0.c

298

WREG32(VCE_RB_RPTR, ring->wptr);

drivers/gpu/drm/radeon/vce_v1_0.c

299

WREG32(VCE_RB_WPTR, ring->wptr);

drivers/gpu/drm/radeon/vce_v1_0.c

300

WREG32(VCE_RB_BASE_LO, ring->gpu_addr);

drivers/gpu/drm/radeon/vce_v1_0.c

301

WREG32(VCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/radeon/vce_v1_0.c

302

WREG32(VCE_RB_SIZE, ring->ring_size / 4);

drivers/gpu/drm/radeon/vce_v1_0.c

305

WREG32(VCE_RB_RPTR2, ring->wptr);

drivers/gpu/drm/radeon/vce_v1_0.c

306

WREG32(VCE_RB_WPTR2, ring->wptr);

drivers/gpu/drm/radeon/vce_v1_0.c

307

WREG32(VCE_RB_BASE_LO2, ring->gpu_addr);

drivers/gpu/drm/radeon/vce_v1_0.c

308

WREG32(VCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr));

drivers/gpu/drm/radeon/vce_v1_0.c

309

WREG32(VCE_RB_SIZE2, ring->ring_size / 4);

drivers/gpu/drm/radeon/vce_v1_0.c

98

WREG32(VCE_RB_WPTR, ring->wptr);

drivers/gpu/drm/radeon/vce_v2_0.c

100

WREG32(VCE_CGTT_CLK_OVERRIDE, 0);

drivers/gpu/drm/radeon/vce_v2_0.c

105

WREG32(VCE_CGTT_CLK_OVERRIDE, 7);

drivers/gpu/drm/radeon/vce_v2_0.c

139

WREG32(VCE_CLOCK_GATING_A, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

144

WREG32(VCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

149

WREG32(VCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

166

WREG32(VCE_CLOCK_GATING_B, 0xf7);

drivers/gpu/drm/radeon/vce_v2_0.c

168

WREG32(VCE_LMI_CTRL, 0x00398000);

drivers/gpu/drm/radeon/vce_v2_0.c

170

WREG32(VCE_LMI_SWAP_CNTL, 0);

drivers/gpu/drm/radeon/vce_v2_0.c

171

WREG32(VCE_LMI_SWAP_CNTL1, 0);

drivers/gpu/drm/radeon/vce_v2_0.c

172

WREG32(VCE_LMI_VM_CTRL, 0);

drivers/gpu/drm/radeon/vce_v2_0.c

174

WREG32(VCE_LMI_VCPU_CACHE_40BIT_BAR, addr >> 8);

drivers/gpu/drm/radeon/vce_v2_0.c

178

WREG32(VCE_VCPU_CACHE_OFFSET0, addr & 0x7fffffff);

drivers/gpu/drm/radeon/vce_v2_0.c

179

WREG32(VCE_VCPU_CACHE_SIZE0, size);

drivers/gpu/drm/radeon/vce_v2_0.c

183

WREG32(VCE_VCPU_CACHE_OFFSET1, addr & 0x7fffffff);

drivers/gpu/drm/radeon/vce_v2_0.c

184

WREG32(VCE_VCPU_CACHE_SIZE1, size);

drivers/gpu/drm/radeon/vce_v2_0.c

188

WREG32(VCE_VCPU_CACHE_OFFSET2, addr & 0x7fffffff);

drivers/gpu/drm/radeon/vce_v2_0.c

189

WREG32(VCE_VCPU_CACHE_SIZE2, size);

drivers/gpu/drm/radeon/vce_v2_0.c

46

WREG32(VCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

50

WREG32(VCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

54

WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

56

WREG32(VCE_CGTT_CLK_OVERRIDE, 0);

drivers/gpu/drm/radeon/vce_v2_0.c

61

WREG32(VCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

66

WREG32(VCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

70

WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

86

WREG32(VCE_CLOCK_GATING_B, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

92

WREG32(VCE_UENC_CLOCK_GATING, tmp);

drivers/gpu/drm/radeon/vce_v2_0.c

97

WREG32(VCE_UENC_REG_CLOCK_GATING, tmp);