drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

460

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c

678

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c

340

for (i = 0; i < WM_SET_COUNT; i++)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

392

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c

619

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

428

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c

620

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

499

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c

748

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

388

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c

572

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

354

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c

552

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c

983

for (i = 0; i < WM_SET_COUNT; i++)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

1177

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c

870

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c

1316

for (i = 0; i < WM_SET_COUNT; i++)

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1390

ranges.num_reader_wm_sets = WM_SET_COUNT;

drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c

1391

ranges.num_writer_wm_sets = WM_SET_COUNT;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2180

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2187

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

2198

for (i = 0; i < WM_SET_COUNT; i++) {

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h

249

struct nv_wm_range_entry nv_entries[WM_SET_COUNT];

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h

250

struct wm_range_table_entry entries[WM_SET_COUNT];