WB_0
phys_enc->hw_wb->idx - WB_0);
phys->hw_wb ? phys->hw_wb->idx - WB_0 : -1,
phys_enc->hw_wb ? phys_enc->hw_wb->idx - WB_0 : -1,
qos_params.num = hw_wb->idx - WB_0;
DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
DPU_DEBUG("[wb:%d] no ctl assigned\n", hw_wb->idx - WB_0);
hw_wb->idx - WB_0);
hw_wb->idx - WB_0, mode.name,
DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0);
DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0);
DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0);
DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0);
DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
ot_params.num = hw_wb->idx - WB_0;
case WB_0:
ctx->pending_wb_flush_mask |= BIT(wb - WB_0);
wb_active |= BIT(cfg->wb - WB_0);
wb_active &= ~BIT(cfg->wb - WB_0);
rm->hw_wb[wb->id - WB_0] = hw;
return rm->hw_wb[wb_idx - WB_0];
struct dpu_hw_wb *hw_wb[WB_MAX - WB_0];