WAKE
out_le32(&((regs)->control), (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);\
out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control);
writel (((RUN|WAKE|DEAD) << 16), &dma_regs->control);
__nmk_gpio_irq_modify(nmk_chip, offset, WAKE, on);
__nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false);
__nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true);
rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
out_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
out_le32(&rd->control, DBDMA_SET(RUN|WAKE));
DBDMA_SET(RUN|WAKE) | DBDMA_CLEAR(PAUSE|DEAD));
DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN));
rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16);
out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
rd->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
td->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
out_le32(&td->control, ((RUN|WAKE) << 16) + (RUN|WAKE));
out_le32(&td->control, ((RUN|WAKE) << 16) + (RUN|WAKE));
out_le32(&rd->control, ((RUN|WAKE) << 16) | (RUN|WAKE));
writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */
out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */
out_le32(&rec->dma->control, (RUN|WAKE|FLUSH|PAUSE) << 16);
snd_pmac_dma_run(rec, RUN|WAKE);
out_le32(&rec->dma->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
out_le32(&rec->dma->control, ((RUN|WAKE) << 16) + (RUN|WAKE));
out_le32(&chip->playback.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16);
out_le32(&chip->capture.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16);
P_FUTEX_OP(WAKE); arg->mask |= SCF_VAL3|SCF_UADDR2|SCF_TIMEOUT; break;