WIZ_CORE_REFCLK
rate = clk_get_rate(wiz->input_clks[WIZ_CORE_REFCLK]);
wiz->input_clks[WIZ_CORE_REFCLK] = clk;
.parents = { WIZ_CORE_REFCLK, WIZ_EXT_REFCLK },
.parents = { WIZ_CORE_REFCLK, WIZ_EXT_REFCLK },
.parents = { WIZ_CORE_REFCLK, WIZ_EXT_REFCLK },
.parents = { WIZ_CORE_REFCLK, WIZ_CORE_REFCLK1, WIZ_EXT_REFCLK },
.parents = { WIZ_CORE_REFCLK, WIZ_CORE_REFCLK1, WIZ_EXT_REFCLK },
.parents = { WIZ_CORE_REFCLK, WIZ_CORE_REFCLK1, WIZ_EXT_REFCLK },