VTD_PAGE_MASK
pasid_dir_ptr = context->lo & VTD_PAGE_MASK;
pasid_dir_ptr = context->lo & VTD_PAGE_MASK;
pgd &= VTD_PAGE_MASK;
pgd = context->lo & VTD_PAGE_MASK;
old_rt_phys = rtaddr_reg & VTD_PAGE_MASK;
context = phys_to_virt(*entry & VTD_PAGE_MASK);
pgtable = phys_to_virt(ctx_entry->lo & VTD_PAGE_MASK);
dir = phys_to_virt(ctx_entry->lo & VTD_PAGE_MASK);
pgtable = phys_to_virt(pte->val[2] & VTD_PAGE_MASK);
pgtable = phys_to_virt(pte->val[0] & VTD_PAGE_MASK);
return re->lo & VTD_PAGE_MASK;
return re->hi & VTD_PAGE_MASK;
#define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK)
#define QI_IOTLB_ADDR(addr) (((u64)addr) & VTD_PAGE_MASK)
#define QI_DEV_IOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK)
#define QI_EIOTLB_ADDR(addr) ((u64)(addr) & VTD_PAGE_MASK)
#define QI_DEV_EIOTLB_ADDR(a) ((u64)(a) & VTD_PAGE_MASK)
return pte->val & VTD_PAGE_MASK;
return __cmpxchg64(&pte->val, 0ULL, 0ULL) & VTD_PAGE_MASK;
context->lo &= ~VTD_PAGE_MASK;
context->lo |= value & VTD_PAGE_MASK;
irt_phys = irta & VTD_PAGE_MASK;
pasid_set_bits(&pe->val[0], VTD_PAGE_MASK, value);
pasid_set_bits(&pe->val[2], VTD_PAGE_MASK, value);