drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1002

.enable = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1003

.format = VOP_REG(RK3399_WIN0_CTRL0, 0x7, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1004

.fmt_10 = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1005

.rb_swap = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1006

.uv_swap = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1007

.x_mir_en = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 21),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1008

.y_mir_en = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 22),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1009

.act_info = VOP_REG(RK3399_WIN0_ACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1010

.dsp_info = VOP_REG(RK3399_WIN0_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1011

.dsp_st = VOP_REG(RK3399_WIN0_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1012

.yrgb_mst = VOP_REG(RK3399_WIN0_YRGB_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1013

.uv_mst = VOP_REG(RK3399_WIN0_CBR_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1014

.yrgb_vir = VOP_REG(RK3399_WIN0_VIR, 0x3fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1015

.uv_vir = VOP_REG(RK3399_WIN0_VIR, 0x3fff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1016

.src_alpha_ctl = VOP_REG(RK3399_WIN0_SRC_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1017

.dst_alpha_ctl = VOP_REG(RK3399_WIN0_DST_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1018

.channel = VOP_REG(RK3399_WIN0_CTRL2, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

103

.scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1038

.rstn = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 3),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1039

.enable = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

104

.scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1040

.win_sel = VOP_REG(RK3399_AFBCD0_CTRL, 0x3, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1041

.format = VOP_REG(RK3399_AFBCD0_CTRL, 0x1f, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1042

.hreg_block_split = VOP_REG(RK3399_AFBCD0_CTRL, 0x1, 21),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1043

.hdr_ptr = VOP_REG(RK3399_AFBCD0_HDR_PTR, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1044

.pic_size = VOP_REG(RK3399_AFBCD0_PIC_SIZE, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

105

.scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

106

.scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1072

.y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1)},

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

110

.scale_yrgb_x = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

111

.scale_yrgb_y = VOP_REG(RK3036_WIN1_SCL_FACTOR_YRGB, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1111

.htotal_pw = VOP_REG(RK3328_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1112

.hact_st_end = VOP_REG(RK3328_DSP_HACT_ST_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1113

.vtotal_pw = VOP_REG(RK3328_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1114

.vact_st_end = VOP_REG(RK3328_DSP_VACT_ST_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1115

.hpost_st_end = VOP_REG(RK3328_POST_DSP_HACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1116

.vpost_st_end = VOP_REG(RK3328_POST_DSP_VACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1120

.rgb_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1121

.hdmi_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 23),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1122

.edp_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 27),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1123

.mipi_dclk_pol = VOP_REG(RK3328_DSP_CTRL1, 0x1, 31),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1124

.rgb_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1125

.hdmi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 13),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1126

.edp_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 14),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1127

.mipi_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1128

.rgb_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1129

.hdmi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 20),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1130

.edp_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1131

.mipi_pin_pol = VOP_REG(RK3328_DSP_CTRL1, 0x7, 28),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1135

.global_regdone_en = VOP_REG(RK3328_SYS_CTRL, 0x1, 11),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1140

.dither_down_sel = VOP_REG(RK3328_DSP_CTRL1, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1141

.dither_down_mode = VOP_REG(RK3328_DSP_CTRL1, 0x1, 3),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1142

.dither_down_en = VOP_REG(RK3328_DSP_CTRL1, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1143

.pre_dither_down = VOP_REG(RK3328_DSP_CTRL1, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1144

.dither_up = VOP_REG(RK3328_DSP_CTRL1, 0x1, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1145

.dsp_blank = VOP_REG(RK3328_DSP_CTRL0, 0x3, 18),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1146

.out_mode = VOP_REG(RK3328_DSP_CTRL0, 0xf, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1153

.line_flag_num[0] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1154

.line_flag_num[1] = VOP_REG(RK3328_LINE_FLAG, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1184

.out_mode = VOP_REG(RK3506_DSP_CTRL2, 0xf, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1185

.dsp_blank = VOP_REG(RK3506_DSP_CTRL2, 0x1, 14),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1186

.dither_down_en = VOP_REG(RK3506_DSP_CTRL2, 0x1, 8),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1187

.dither_down_sel = VOP_REG(RK3506_DSP_CTRL2, 0x1, 7),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1188

.dither_down_mode = VOP_REG(RK3506_DSP_CTRL2, 0x1, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1189

.dsp_lut_en = VOP_REG(RK3506_DSP_CTRL2, 0x1, 5),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

119

.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1190

.dither_up = VOP_REG(RK3506_DSP_CTRL2, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1195

.rgb_en = VOP_REG(RK3506_DSP_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1196

.rgb_pin_pol = VOP_REG(RK3506_DSP_CTRL0, 0x7, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1197

.mipi_en = VOP_REG(RK3506_DSP_CTRL0, 0x1, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1198

.mipi_dclk_pol = VOP_REG(RK3506_DSP_CTRL0, 0x1, 25),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1199

.mipi_pin_pol = VOP_REG(RK3506_DSP_CTRL0, 0x7, 26),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

120

.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1206

.enable = VOP_REG(RK3506_WIN1_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1207

.format = VOP_REG(RK3506_WIN1_CTRL0, 0x7, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1208

.rb_swap = VOP_REG(RK3506_WIN1_CTRL0, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1209

.channel = VOP_REG(RK3506_WIN1_CTRL1, 0xf, 8),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

121

.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1210

.yrgb_vir = VOP_REG(RK3506_WIN1_VIR, 0x1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1211

.yrgb_mst = VOP_REG(RK3506_WIN1_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1212

.dsp_info = VOP_REG(RK3506_WIN1_DSP_INFO, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1213

.dsp_st = VOP_REG(RK3506_WIN1_DSP_ST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1214

.alpha_en = VOP_REG(RK3506_WIN1_ALPHA_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1215

.alpha_mode = VOP_REG(RK3506_WIN1_ALPHA_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1216

.alpha_pre_mul = VOP_REG(RK3506_WIN1_ALPHA_CTRL, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

122

.act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

123

.dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1239

.out_mode = VOP_REG(PX30_DSP_CTRL2, 0xf, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

124

.dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1240

.dsp_blank = VOP_REG(PX30_DSP_CTRL2, 0x1, 14),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1241

.dither_down_en = VOP_REG(PX30_DSP_CTRL2, 0x1, 8),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1242

.dither_down_sel = VOP_REG(PX30_DSP_CTRL2, 0x1, 7),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1243

.dither_down_mode = VOP_REG(PX30_DSP_CTRL2, 0x1, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1245

.dither_up = VOP_REG(PX30_DSP_CTRL2, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1246

.dsp_lut_en = VOP_REG(PX30_DSP_CTRL2, 0x1, 5),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1247

.gate_en = VOP_REG(PX30_DSP_CTRL2, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

125

.yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1251

.htotal_pw = VOP_REG(PX30_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1252

.hact_st_end = VOP_REG(PX30_DSP_HACT_ST_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1253

.vtotal_pw = VOP_REG(PX30_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1254

.vact_st_end = VOP_REG(PX30_DSP_VACT_ST_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1258

.rgb_dclk_pol = VOP_REG(PX30_DSP_CTRL0, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1259

.rgb_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0x7, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

126

.uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1260

.rgb_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1261

.mipi_dclk_pol = VOP_REG(PX30_DSP_CTRL0, 0x1, 25),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1262

.mipi_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0x7, 26),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1263

.mipi_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

1267

.global_regdone_en = VOP_REG(PX30_SYS_CTRL2, 0x1, 13),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

127

.yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

128

.uv_vir = VOP_REG(RK3036_WIN0_VIR, 0x1fff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

129

.alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 18),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

130

.alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

131

.alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

139

.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

140

.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

141

.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

142

.act_info = VOP_REG(RK3036_WIN1_ACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

143

.dsp_info = VOP_REG(RK3036_WIN1_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

144

.dsp_st = VOP_REG(RK3036_WIN1_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

145

.yrgb_mst = VOP_REG(RK3036_WIN1_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

146

.yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

147

.alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

148

.alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

149

.alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

169

.line_flag_num[0] = VOP_REG(RK3036_INT_STATUS, 0xfff, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

176

.htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

177

.hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

178

.vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

179

.vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

183

.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

188

.out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

189

.dsp_blank = VOP_REG(RK3036_DSP_CTRL1, 0x1, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

190

.dither_down_sel = VOP_REG(RK3036_DSP_CTRL0, 0x1, 27),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

191

.dither_down_en = VOP_REG(RK3036_DSP_CTRL0, 0x1, 11),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

192

.dither_down_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 10),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

210

.enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

211

.format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

212

.rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

213

.dsp_info = VOP_REG(RK3126_WIN1_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

214

.dsp_st = VOP_REG(RK3126_WIN1_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

215

.yrgb_mst = VOP_REG(RK3126_WIN1_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

216

.yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

217

.alpha_mode = VOP_REG(RK3036_DSP_CTRL0, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

218

.alpha_en = VOP_REG(RK3036_ALPHA_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

219

.alpha_pre_mul = VOP_REG(RK3036_DSP_CTRL0, 0x1, 29),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

230

.pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

231

.hdmi_pin_pol = VOP_REG(RK3126_INT_SCALER, 0x7, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

232

.hdmi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 22),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

233

.hdmi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 23),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

234

.rgb_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

235

.rgb_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 25),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

236

.mipi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 28),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

237

.mipi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 29),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

263

.line_flag_num[0] = VOP_REG(PX30_LINE_FLAG, 0xfff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

271

.out_mode = VOP_REG(PX30_DSP_CTRL2, 0xf, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

272

.dsp_blank = VOP_REG(PX30_DSP_CTRL2, 0x1, 14),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

273

.dither_down_en = VOP_REG(PX30_DSP_CTRL2, 0x1, 8),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

274

.dither_down_sel = VOP_REG(PX30_DSP_CTRL2, 0x1, 7),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

275

.dither_down_mode = VOP_REG(PX30_DSP_CTRL2, 0x1, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

280

.htotal_pw = VOP_REG(PX30_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

281

.hact_st_end = VOP_REG(PX30_DSP_HACT_ST_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

282

.vtotal_pw = VOP_REG(PX30_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

283

.vact_st_end = VOP_REG(PX30_DSP_VACT_ST_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

287

.rgb_dclk_pol = VOP_REG(PX30_DSP_CTRL0, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

288

.rgb_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0x7, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

289

.rgb_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

290

.mipi_dclk_pol = VOP_REG(PX30_DSP_CTRL0, 0x1, 25),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

291

.mipi_pin_pol = VOP_REG(PX30_DSP_CTRL0, 0x7, 26),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

292

.mipi_en = VOP_REG(PX30_DSP_CTRL0, 0x1, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

296

.scale_yrgb_x = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

297

.scale_yrgb_y = VOP_REG(PX30_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

298

.scale_cbcr_x = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

299

.scale_cbcr_y = VOP_REG(PX30_WIN0_SCL_FACTOR_CBR, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

307

.enable = VOP_REG(PX30_WIN0_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

308

.format = VOP_REG(PX30_WIN0_CTRL0, 0x7, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

309

.rb_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

310

.uv_swap = VOP_REG(PX30_WIN0_CTRL0, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

311

.act_info = VOP_REG(PX30_WIN0_ACT_INFO, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

312

.dsp_info = VOP_REG(PX30_WIN0_DSP_INFO, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

313

.dsp_st = VOP_REG(PX30_WIN0_DSP_ST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

314

.yrgb_mst = VOP_REG(PX30_WIN0_YRGB_MST0, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

315

.uv_mst = VOP_REG(PX30_WIN0_CBR_MST0, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

316

.yrgb_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

317

.uv_vir = VOP_REG(PX30_WIN0_VIR, 0x1fff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

318

.alpha_pre_mul = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

319

.alpha_mode = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

320

.alpha_en = VOP_REG(PX30_WIN0_ALPHA_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

327

.enable = VOP_REG(PX30_WIN1_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

328

.format = VOP_REG(PX30_WIN1_CTRL0, 0x7, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

329

.rb_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

330

.uv_swap = VOP_REG(PX30_WIN1_CTRL0, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

331

.dsp_info = VOP_REG(PX30_WIN1_DSP_INFO, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

332

.dsp_st = VOP_REG(PX30_WIN1_DSP_ST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

333

.yrgb_mst = VOP_REG(PX30_WIN1_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

334

.yrgb_vir = VOP_REG(PX30_WIN1_VIR, 0x1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

335

.alpha_pre_mul = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

336

.alpha_mode = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

337

.alpha_en = VOP_REG(PX30_WIN1_ALPHA_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

344

.gate = VOP_REG(PX30_WIN2_CTRL0, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

345

.enable = VOP_REG(PX30_WIN2_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

346

.format = VOP_REG(PX30_WIN2_CTRL0, 0x3, 5),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

347

.rb_swap = VOP_REG(PX30_WIN2_CTRL0, 0x1, 20),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

348

.dsp_info = VOP_REG(PX30_WIN2_DSP_INFO0, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

349

.dsp_st = VOP_REG(PX30_WIN2_DSP_ST0, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

350

.yrgb_mst = VOP_REG(PX30_WIN2_MST0, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

351

.yrgb_vir = VOP_REG(PX30_WIN2_VIR0_1, 0x1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

352

.alpha_pre_mul = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

353

.alpha_mode = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

354

.alpha_en = VOP_REG(PX30_WIN2_ALPHA_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

396

.scale_yrgb_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

397

.scale_yrgb_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

398

.scale_cbcr_x = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

399

.scale_cbcr_y = VOP_REG(RK3066_WIN0_SCL_FACTOR_CBR, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

407

.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

408

.format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

409

.rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

410

.uv_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 22),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

411

.act_info = VOP_REG(RK3066_WIN0_ACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

412

.dsp_info = VOP_REG(RK3066_WIN0_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

413

.dsp_st = VOP_REG(RK3066_WIN0_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

414

.yrgb_mst = VOP_REG(RK3066_WIN0_YRGB_MST0, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

415

.uv_mst = VOP_REG(RK3066_WIN0_CBR_MST0, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

416

.yrgb_vir = VOP_REG(RK3066_WIN0_VIR, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

417

.uv_vir = VOP_REG(RK3066_WIN0_VIR, 0x1fff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

418

.alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 21),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

419

.alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

426

.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

427

.format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 7),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

428

.rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 23),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

429

.uv_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 26),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

430

.act_info = VOP_REG(RK3066_WIN1_ACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

431

.dsp_info = VOP_REG(RK3066_WIN1_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

432

.dsp_st = VOP_REG(RK3066_WIN1_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

433

.yrgb_mst = VOP_REG(RK3066_WIN1_YRGB_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

434

.uv_mst = VOP_REG(RK3066_WIN1_CBR_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

435

.yrgb_vir = VOP_REG(RK3066_WIN1_VIR, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

436

.uv_vir = VOP_REG(RK3066_WIN1_VIR, 0x1fff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

437

.alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 22),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

438

.alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

445

.enable = VOP_REG(RK3066_SYS_CTRL1, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

446

.format = VOP_REG(RK3066_SYS_CTRL1, 0x7, 10),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

447

.rb_swap = VOP_REG(RK3066_SYS_CTRL1, 0x1, 27),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

448

.dsp_info = VOP_REG(RK3066_WIN2_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

449

.dsp_st = VOP_REG(RK3066_WIN2_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

450

.yrgb_mst = VOP_REG(RK3066_WIN2_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

451

.yrgb_vir = VOP_REG(RK3066_WIN2_VIR, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

452

.alpha_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 23),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

453

.alpha_en = VOP_REG(RK3066_BLEND_CTRL, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

457

.htotal_pw = VOP_REG(RK3066_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

458

.hact_st_end = VOP_REG(RK3066_DSP_HACT_ST_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

459

.vtotal_pw = VOP_REG(RK3066_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

460

.vact_st_end = VOP_REG(RK3066_DSP_VACT_ST_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

464

.pin_pol = VOP_REG(RK3066_DSP_CTRL0, 0x7, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

468

.dma_stop = VOP_REG(RK3066_SYS_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

469

.standby = VOP_REG(RK3066_SYS_CTRL0, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

470

.out_mode = VOP_REG(RK3066_DSP_CTRL0, 0xf, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

471

.cfg_done = VOP_REG(RK3066_REG_CFG_DONE, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

472

.dither_down_en = VOP_REG(RK3066_DSP_CTRL0, 0x1, 11),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

473

.dither_down_mode = VOP_REG(RK3066_DSP_CTRL0, 0x1, 10),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

474

.dsp_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

475

.dither_up = VOP_REG(RK3066_DSP_CTRL0, 0x1, 9),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

476

.dsp_lut_en = VOP_REG(RK3066_SYS_CTRL1, 0x1, 31),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

477

.data_blank = VOP_REG(RK3066_DSP_CTRL1, 0x1, 25),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

503

.line_flag_num[0] = VOP_REG(RK3066_INT_STATUS, 0xfff, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

504

.status = VOP_REG(RK3066_INT_STATUS, 0xf, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

505

.enable = VOP_REG(RK3066_INT_STATUS, 0xf, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

506

.clear = VOP_REG(RK3066_INT_STATUS, 0xf, 8),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

522

.scale_yrgb_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

523

.scale_yrgb_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

524

.scale_cbcr_x = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

525

.scale_cbcr_y = VOP_REG(RK3188_WIN0_SCL_FACTOR_CBR, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

533

.enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

534

.format = VOP_REG(RK3188_SYS_CTRL, 0x7, 3),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

535

.rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

536

.uv_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 18),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

537

.act_info = VOP_REG(RK3188_WIN0_ACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

538

.dsp_info = VOP_REG(RK3188_WIN0_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

539

.dsp_st = VOP_REG(RK3188_WIN0_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

540

.yrgb_mst = VOP_REG(RK3188_WIN0_YRGB_MST0, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

541

.uv_mst = VOP_REG(RK3188_WIN0_CBR_MST0, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

542

.yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

543

.alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 18),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

544

.alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

545

.alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

552

.enable = VOP_REG(RK3188_SYS_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

553

.format = VOP_REG(RK3188_SYS_CTRL, 0x7, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

554

.rb_swap = VOP_REG(RK3188_SYS_CTRL, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

556

.dsp_info = VOP_REG(RK3188_WIN1_DSP_INFO, 0x07ff07ff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

557

.dsp_st = VOP_REG(RK3188_WIN1_DSP_ST, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

558

.yrgb_mst = VOP_REG(RK3188_WIN1_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

559

.yrgb_vir = VOP_REG(RK3188_WIN_VIR, 0x1fff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

560

.alpha_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

561

.alpha_en = VOP_REG(RK3188_ALPHA_CTRL, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

562

.alpha_pre_mul = VOP_REG(RK3188_DSP_CTRL0, 0x1, 29),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

566

.htotal_pw = VOP_REG(RK3188_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

567

.hact_st_end = VOP_REG(RK3188_DSP_HACT_ST_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

568

.vtotal_pw = VOP_REG(RK3188_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

569

.vact_st_end = VOP_REG(RK3188_DSP_VACT_ST_END, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

573

.pin_pol = VOP_REG(RK3188_DSP_CTRL0, 0xf, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

577

.gate_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 31),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

578

.standby = VOP_REG(RK3188_SYS_CTRL, 0x1, 30),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

579

.out_mode = VOP_REG(RK3188_DSP_CTRL0, 0xf, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

580

.cfg_done = VOP_REG(RK3188_REG_CFG_DONE, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

581

.dither_down_sel = VOP_REG(RK3188_DSP_CTRL0, 0x1, 27),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

582

.dither_down_en = VOP_REG(RK3188_DSP_CTRL0, 0x1, 11),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

583

.dither_down_mode = VOP_REG(RK3188_DSP_CTRL0, 0x1, 10),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

584

.dsp_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

585

.dither_up = VOP_REG(RK3188_DSP_CTRL0, 0x1, 9),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

586

.dsp_lut_en = VOP_REG(RK3188_SYS_CTRL, 0x1, 28),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

587

.data_blank = VOP_REG(RK3188_DSP_CTRL1, 0x1, 25),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

611

.line_flag_num[0] = VOP_REG(RK3188_INT_STATUS, 0xfff, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

612

.status = VOP_REG(RK3188_INT_STATUS, 0xf, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

613

.enable = VOP_REG(RK3188_INT_STATUS, 0xf, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

614

.clear = VOP_REG(RK3188_INT_STATUS, 0xf, 8),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

629

.cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

630

.cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

631

.cbcr_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 28),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

632

.cbcr_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 26),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

633

.cbcr_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

634

.yrgb_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 23),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

635

.yrgb_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 22),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

636

.yrgb_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 20),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

637

.yrgb_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 18),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

638

.yrgb_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

639

.line_load_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

640

.cbcr_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0x7, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

641

.yrgb_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0xf, 8),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

642

.vsd_cbcr_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 7),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

643

.vsd_cbcr_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

644

.vsd_yrgb_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 5),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

645

.vsd_yrgb_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

646

.bic_coe_sel = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

647

.cbcr_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

648

.yrgb_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

649

.lb_mode = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 5),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

654

.scale_yrgb_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

655

.scale_yrgb_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

656

.scale_cbcr_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

657

.scale_cbcr_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

665

.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

666

.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

667

.fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

668

.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

669

.uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

670

.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

671

.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

672

.dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

673

.yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

674

.uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

675

.yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

676

.uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

677

.src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

678

.dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

679

.channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

686

.enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

687

.gate = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

688

.format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

689

.rb_swap = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

690

.dsp_info = VOP_REG(RK3288_WIN2_DSP_INFO0, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

691

.dsp_st = VOP_REG(RK3288_WIN2_DSP_ST0, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

692

.yrgb_mst = VOP_REG(RK3288_WIN2_MST0, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

693

.yrgb_vir = VOP_REG(RK3288_WIN2_VIR0_1, 0x1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

694

.src_alpha_ctl = VOP_REG(RK3288_WIN2_SRC_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

695

.dst_alpha_ctl = VOP_REG(RK3288_WIN2_DST_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

699

.htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

700

.hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

701

.vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

702

.vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

703

.hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

704

.vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

708

.pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

709

.rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

710

.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

711

.edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

712

.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

717

.gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

718

.mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

719

.dither_down_sel = VOP_REG(RK3288_DSP_CTRL1, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

720

.dither_down_mode = VOP_REG(RK3288_DSP_CTRL1, 0x1, 3),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

721

.dither_down_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

722

.pre_dither_down = VOP_REG(RK3288_DSP_CTRL1, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

723

.dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

724

.dsp_lut_en = VOP_REG(RK3288_DSP_CTRL1, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

725

.data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

726

.dsp_blank = VOP_REG(RK3288_DSP_CTRL0, 0x3, 18),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

727

.out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

758

.line_flag_num[0] = VOP_REG(RK3288_INTR_CTRL0, 0x1fff, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

759

.status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

760

.enable = VOP_REG(RK3288_INTR_CTRL0, 0xf, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

761

.clear = VOP_REG(RK3288_INTR_CTRL0, 0xf, 8),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

795

.line_flag_num[0] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

796

.line_flag_num[1] = VOP_REG(RK3368_LINE_FLAG, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

807

.enable = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

808

.format = VOP_REG(RK3368_WIN0_CTRL0, 0x7, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

809

.rb_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

810

.uv_swap = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

811

.x_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 21),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

812

.y_mir_en = VOP_REG(RK3368_WIN0_CTRL0, 0x1, 22),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

813

.act_info = VOP_REG(RK3368_WIN0_ACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

814

.dsp_info = VOP_REG(RK3368_WIN0_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

815

.dsp_st = VOP_REG(RK3368_WIN0_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

816

.yrgb_mst = VOP_REG(RK3368_WIN0_YRGB_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

817

.uv_mst = VOP_REG(RK3368_WIN0_CBR_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

818

.yrgb_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

819

.uv_vir = VOP_REG(RK3368_WIN0_VIR, 0x3fff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

820

.src_alpha_ctl = VOP_REG(RK3368_WIN0_SRC_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

821

.dst_alpha_ctl = VOP_REG(RK3368_WIN0_DST_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

822

.channel = VOP_REG(RK3368_WIN0_CTRL2, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

829

.gate = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

830

.enable = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

831

.format = VOP_REG(RK3368_WIN2_CTRL0, 0x3, 5),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

832

.rb_swap = VOP_REG(RK3368_WIN2_CTRL0, 0x1, 20),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

833

.y_mir_en = VOP_REG(RK3368_WIN2_CTRL1, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

834

.dsp_info = VOP_REG(RK3368_WIN2_DSP_INFO0, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

835

.dsp_st = VOP_REG(RK3368_WIN2_DSP_ST0, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

836

.yrgb_mst = VOP_REG(RK3368_WIN2_MST0, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

837

.yrgb_vir = VOP_REG(RK3368_WIN2_VIR0_1, 0x1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

838

.src_alpha_ctl = VOP_REG(RK3368_WIN2_SRC_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

839

.dst_alpha_ctl = VOP_REG(RK3368_WIN2_DST_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

854

.rgb_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

855

.hdmi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 23),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

856

.edp_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 27),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

857

.mipi_dclk_pol = VOP_REG(RK3368_DSP_CTRL1, 0x1, 31),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

858

.rgb_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

859

.hdmi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 20),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

860

.edp_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

861

.mipi_pin_pol = VOP_REG(RK3368_DSP_CTRL1, 0x7, 28),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

862

.rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

863

.hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

864

.edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

865

.mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

869

.global_regdone_en = VOP_REG(RK3368_SYS_CTRL, 0x1, 11),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

888

.line_flag_num[0] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

889

.line_flag_num[1] = VOP_REG(RK3366_LINE_FLAG, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

908

.dp_dclk_pol = VOP_REG(RK3399_DSP_CTRL1, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

909

.rgb_dclk_pol = VOP_REG(RK3399_DSP_CTRL1, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

910

.hdmi_dclk_pol = VOP_REG(RK3399_DSP_CTRL1, 0x1, 23),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

911

.edp_dclk_pol = VOP_REG(RK3399_DSP_CTRL1, 0x1, 27),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

912

.mipi_dclk_pol = VOP_REG(RK3399_DSP_CTRL1, 0x1, 31),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

913

.dp_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0x7, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

914

.rgb_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0x7, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

915

.hdmi_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0x7, 20),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

916

.edp_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0x7, 24),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

917

.mipi_pin_pol = VOP_REG(RK3399_DSP_CTRL1, 0x7, 28),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

918

.dp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 11),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

919

.rgb_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

920

.hdmi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 13),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

921

.edp_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 14),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

922

.mipi_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

923

.mipi_dual_channel_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 3),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

928

.gate_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 23),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

929

.mmu_en = VOP_REG(RK3399_SYS_CTRL, 0x1, 20),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

930

.dither_down_sel = VOP_REG(RK3399_DSP_CTRL1, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

931

.dither_down_mode = VOP_REG(RK3399_DSP_CTRL1, 0x1, 3),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

932

.dither_down_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 2),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

933

.pre_dither_down = VOP_REG(RK3399_DSP_CTRL1, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

934

.dither_up = VOP_REG(RK3399_DSP_CTRL1, 0x1, 6),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

935

.dsp_lut_en = VOP_REG(RK3399_DSP_CTRL1, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

936

.update_gamma_lut = VOP_REG(RK3399_DSP_CTRL1, 0x1, 7),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

937

.lut_buffer_index = VOP_REG(RK3399_DBG_POST_REG1, 0x1, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

938

.data_blank = VOP_REG(RK3399_DSP_CTRL0, 0x1, 19),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

939

.dsp_blank = VOP_REG(RK3399_DSP_CTRL0, 0x3, 18),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

940

.out_mode = VOP_REG(RK3399_DSP_CTRL0, 0xf, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

946

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

947

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 0, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

948

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

949

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 4, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

950

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

951

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 8, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

952

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

953

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 12, 0xffff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

954

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 16, 0xffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

955

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 20, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

956

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 24, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

957

VOP_REG(RK3399_WIN0_YUV2YUV_Y2R + 28, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

965

.y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 1) },

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

967

.y2r_en = VOP_REG(RK3399_YUV2YUV_WIN, 0x1, 9) },

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

978

.enable = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

979

.format = VOP_REG(RK3399_WIN0_CTRL0, 0x7, 1),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

980

.fmt_10 = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 4),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

981

.rb_swap = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 12),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

982

.uv_swap = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 15),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

983

.x_mir_en = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 21),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

984

.y_mir_en = VOP_REG(RK3399_WIN0_CTRL0, 0x1, 22),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

985

.act_info = VOP_REG(RK3399_WIN0_ACT_INFO, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

986

.dsp_info = VOP_REG(RK3399_WIN0_DSP_INFO, 0x0fff0fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

987

.dsp_st = VOP_REG(RK3399_WIN0_DSP_ST, 0x1fff1fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

988

.yrgb_mst = VOP_REG(RK3399_WIN0_YRGB_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

989

.uv_mst = VOP_REG(RK3399_WIN0_CBR_MST, 0xffffffff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

990

.yrgb_vir = VOP_REG(RK3399_WIN0_VIR, 0x3fff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

991

.uv_vir = VOP_REG(RK3399_WIN0_VIR, 0x3fff, 16),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

992

.src_alpha_ctl = VOP_REG(RK3399_WIN0_SRC_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

993

.dst_alpha_ctl = VOP_REG(RK3399_WIN0_DST_ALPHA_CTRL, 0xff, 0),

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

994

.channel = VOP_REG(RK3399_WIN0_CTRL2, 0xff, 0),