Symbol: VM_L2_CNTL
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
337
u64 VM_L2_CNTL;
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
180
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
181
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
183
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, L2_PDE0_CACHE_TAG_GENERATION_MODE,
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
185
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
186
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
187
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, IDENTITY_MODE_FRAGMENT_SIZE, 0);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
366
WREG32_FIELD15(GC, 0, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
231
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
232
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
234
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, L2_PDE0_CACHE_TAG_GENERATION_MODE,
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
236
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
237
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
238
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, IDENTITY_MODE_FRAGMENT_SIZE, 0);
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
471
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
551
adev->gmc.VM_L2_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL);
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
586
WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, adev->gmc.VM_L2_CNTL);
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
629
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
630
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
631
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
632
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
633
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, EFFECTIVE_L2_QUEUE_SIZE, 7);
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
634
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
635
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
747
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
846
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
847
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
848
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
849
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
850
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, EFFECTIVE_L2_QUEUE_SIZE, 7);
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
851
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
852
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_DEFAULT_PAGE_OUT_TO_SYSTEM_MEMORY, 1);
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
981
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
166
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
167
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
169
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, L2_PDE0_CACHE_TAG_GENERATION_MODE,
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
171
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
172
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
173
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, IDENTITY_MODE_FRAGMENT_SIZE, 0);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
413
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
208
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
209
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING, 1);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
211
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, L2_PDE0_CACHE_TAG_GENERATION_MODE,
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
213
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
214
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, CONTEXT1_IDENTITY_ACCESS_MODE, 1);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
215
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, IDENTITY_MODE_FRAGMENT_SIZE, 0);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c
397
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
277
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1);
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
278
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
281
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
283
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, PDE_FAULT_CLASSIFICATION,
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
285
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
287
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
520
tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE,
drivers/gpu/drm/radeon/cik.c
5439
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE |
drivers/gpu/drm/radeon/cik.c
5556
WREG32(VM_L2_CNTL,
drivers/gpu/drm/radeon/evergreen.c
2416
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
drivers/gpu/drm/radeon/evergreen.c
2470
WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING |
drivers/gpu/drm/radeon/evergreen.c
2499
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
drivers/gpu/drm/radeon/ni.c
1268
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE |
drivers/gpu/drm/radeon/ni.c
1349
WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
drivers/gpu/drm/radeon/r600.c
1142
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
drivers/gpu/drm/radeon/r600.c
1196
WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING |
drivers/gpu/drm/radeon/r600.c
1234
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
drivers/gpu/drm/radeon/rv770.c
907
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
drivers/gpu/drm/radeon/rv770.c
954
WREG32(VM_L2_CNTL, ENABLE_L2_FRAGMENT_PROCESSING |
drivers/gpu/drm/radeon/rv770.c
984
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING |
drivers/gpu/drm/radeon/si.c
4285
WREG32(VM_L2_CNTL, ENABLE_L2_CACHE |
drivers/gpu/drm/radeon/si.c
4373
WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |