drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv04.c

33

VMM_WO032(pt, vmm, 8 + ptei++ * 4, data);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv04.c

52

VMM_WO032(pt, vmm, 8 + (ptei++ * 4), *map->dma++ | 0x00000003);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv41.c

32

VMM_WO032(pt, vmm, ptei++ * 4, data);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv41.c

52

VMM_WO032(pt, vmm, ptei++ * 4, data);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

129

VMM_WO032(pt, vmm, ptei++ * 4, tmp[0] >> 0 | tmp[1] << 27);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

130

VMM_WO032(pt, vmm, ptei++ * 4, tmp[1] >> 5 | tmp[2] << 22);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

131

VMM_WO032(pt, vmm, ptei++ * 4, tmp[2] >> 10 | tmp[3] << 17);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

132

VMM_WO032(pt, vmm, ptei++ * 4, tmp[3] >> 15 | 0x40000000);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

159

VMM_WO032(pt, vmm, ptei++ * 4, 0x00000000);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

160

VMM_WO032(pt, vmm, ptei++ * 4, 0x00000000);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

161

VMM_WO032(pt, vmm, ptei++ * 4, 0x00000000);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

162

VMM_WO032(pt, vmm, ptei++ * 4, 0x00000000);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

66

VMM_WO032(pt, vmm, pteo + 0x0, tmp[0]);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

67

VMM_WO032(pt, vmm, pteo + 0x4, tmp[1]);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

68

VMM_WO032(pt, vmm, pteo + 0x8, tmp[2]);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

69

VMM_WO032(pt, vmm, pteo + 0xc, tmp[3] | 0x40000000);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

90

VMM_WO032(pt, vmm, ptei++ * 4, tmp[0] >> 0 | tmp[1] << 27);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

91

VMM_WO032(pt, vmm, ptei++ * 4, tmp[1] >> 5 | tmp[2] << 22);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

92

VMM_WO032(pt, vmm, ptei++ * 4, tmp[2] >> 10 | tmp[3] << 17);

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.c

93

VMM_WO032(pt, vmm, ptei++ * 4, tmp[3] >> 15 | 0x40000000);