Symbol: VS
arch/powerpc/xmon/ppc-opc.c
4793
{"mfvrd", X(31,51)|1, XX1RB_MASK|1, PPCVSX2, 0, {RA, VS}},
arch/powerpc/xmon/ppc-opc.c
4873
{"mfvrwz", X(31,115)|1, XX1RB_MASK|1, PPCVSX2, 0, {RA, VS}},
arch/powerpc/xmon/ppc-opc.c
4897
{"stvebx", X(31,135), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4949
{"stvehx", X(31,167), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
4981
{"stvewx", X(31,199), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5021
{"stvx", X(31,231), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5431
{"stvexbx", X(31,389), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5464
{"stvexhx", X(31,421), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5536
{"stvexwx", X(31,453), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5729
{"stvxl", X(31,487), X_MASK, PPCVEC, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5882
{"stvlx", X(31,647), X_MASK, CELL, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5920
{"stvfrx", X(31,677), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5922
{"stvrx", X(31,679), X_MASK, CELL, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5938
{"stvflx", X(31,709), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
5976
{"stvswx", X(31,741), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6018
{"stvepxl", X(31,775), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6058
{"stvepx", X(31,807), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6136
{"stvlxl", X(31,903), X_MASK, CELL, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6175
{"stvfrxl", X(31,933), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6181
{"stvrxl", X(31,935), X_MASK, CELL, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6210
{"stvflxl", X(31,965), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6242
{"stvswxl", X(31,997), X_MASK, PPCVEC2, 0, {VS, RA0, RB}},
arch/powerpc/xmon/ppc-opc.c
6666
{"stxsd", DSO(61,2), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}},
arch/powerpc/xmon/ppc-opc.c
6667
{"stxssp", DSO(61,3), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}},
drivers/regulator/qcom-rpmh-regulator.c
1098
RPMH_VREG("lvs1", VS, 1, &pmic4_lvs, "vin-lvs-1-2"),
drivers/regulator/qcom-rpmh-regulator.c
1099
RPMH_VREG("lvs2", VS, 2, &pmic4_lvs, "vin-lvs-1-2"),
drivers/regulator/qcom-rpmh-regulator.c
60
[VS] = {"VS%d%s", "vs%s%d"},