VID_A_DMA_CTL

645

cx_write(VID_A_DMA_CTL, 0);

107

cx_set(VID_A_DMA_CTL, 0x22); /* FIFO and RISC enable */

234

cx_clear(VID_A_DMA_CTL, 0x22); /* FIFO and RISC enable */

312

cx_clear(VID_A_DMA_CTL, 0x11);

328

cx_set(VID_A_DMA_CTL, 0x11); /* FIFO and RISC enable */

506

cx_clear(VID_A_DMA_CTL, 0x11);