VPU_40XX_HOST_SS_AON_IDLE_GEN
u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_IDLE_GEN);
val = REG_SET_FLD(VPU_40XX_HOST_SS_AON_IDLE_GEN, EN, val);
val = REG_CLR_FLD(VPU_40XX_HOST_SS_AON_IDLE_GEN, EN, val);
REGV_WR32(VPU_40XX_HOST_SS_AON_IDLE_GEN, val);