VCPU_FPR
kvm_cvt_df(&VCPU_FPR(vcpu, i), &f);
kvm_cvt_df(&VCPU_FPR(vcpu, rt), &vcpu->arch.qpr[rt]);
kvm_cvt_fd((u32*)tmp, &VCPU_FPR(vcpu, rs));
VCPU_FPR(vcpu, rs) = *((u64*)tmp);
kvm_cvt_df(&VCPU_FPR(vcpu, rs), (u32*)tmp);
*((u32*)tmp) = VCPU_FPR(vcpu, rs);
val = VCPU_FPR(vcpu, rs) & 0xffffffff;
*((u64*)tmp) = VCPU_FPR(vcpu, rs);
val = VCPU_FPR(vcpu, rs);
kvm_cvt_fd(&tmp[0], &VCPU_FPR(vcpu, rs));
kvm_cvt_df(&VCPU_FPR(vcpu, rs), &tmp[0]);
kvm_cvt_df(&VCPU_FPR(vcpu, reg_in1), &ps0_in1);
kvm_cvt_df(&VCPU_FPR(vcpu, reg_in2), &ps0_in2);
kvm_cvt_df(&VCPU_FPR(vcpu, reg_in3), &ps0_in3);
kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
kvm_cvt_df(&VCPU_FPR(vcpu, reg_in1), &ps0_in1);
kvm_cvt_df(&VCPU_FPR(vcpu, reg_in2), &ps0_in2);
kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
kvm_cvt_df(&VCPU_FPR(vcpu, reg_in), &ps0_in);
kvm_cvt_fd(&ps0_out, &VCPU_FPR(vcpu, reg_out));
fpr_d = &VCPU_FPR(vcpu, ax_rd);
fpr_a = &VCPU_FPR(vcpu, ax_ra);
fpr_b = &VCPU_FPR(vcpu, ax_rb);
fpr_c = &VCPU_FPR(vcpu, ax_rc);
kvm_cvt_df(&VCPU_FPR(vcpu, i), &f);
i, f, VCPU_FPR(vcpu, i), i, vcpu->arch.qpr[i]);
VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
VCPU_FPR(vcpu, ax_rd) ^= 0x8000000000000000ULL;
VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
VCPU_FPR(vcpu, ax_rd) |= 0x8000000000000000ULL;
VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rb);
VCPU_FPR(vcpu, ax_rd) &= ~0x8000000000000000ULL;
VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_ra);
kvm_cvt_df(&VCPU_FPR(vcpu, ax_rb),
VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_ra);
&VCPU_FPR(vcpu, ax_rd));
kvm_cvt_df(&VCPU_FPR(vcpu, ax_rb),
&VCPU_FPR(vcpu, ax_rd));
VCPU_FPR(vcpu, ax_rd) = VCPU_FPR(vcpu, ax_rc);