VICRU_RESET_OFFSET
VICRU_RESET_OFFSET(SRST_REF_PVTPLL_ISP, 0, 0),
VICRU_RESET_OFFSET(SRST_A_GMAC_BIU, 0, 1),
VICRU_RESET_OFFSET(SRST_A_VI_BIU, 0, 2),
VICRU_RESET_OFFSET(SRST_H_VI_BIU, 0, 3),
VICRU_RESET_OFFSET(SRST_P_VI_BIU, 0, 4),
VICRU_RESET_OFFSET(SRST_P_CRU_VI, 0, 5),
VICRU_RESET_OFFSET(SRST_P_VI_GRF, 0, 6),
VICRU_RESET_OFFSET(SRST_P_VI_PVTPLL, 0, 7),
VICRU_RESET_OFFSET(SRST_P_DSMC, 0, 8),
VICRU_RESET_OFFSET(SRST_A_DSMC, 0, 9),
VICRU_RESET_OFFSET(SRST_H_CAN0, 0, 10),
VICRU_RESET_OFFSET(SRST_CAN0, 0, 11),
VICRU_RESET_OFFSET(SRST_H_CAN1, 0, 12),
VICRU_RESET_OFFSET(SRST_CAN1, 0, 13),
VICRU_RESET_OFFSET(SRST_P_GPIO2, 1, 0),
VICRU_RESET_OFFSET(SRST_DB_GPIO2, 1, 1),
VICRU_RESET_OFFSET(SRST_P_GPIO4, 1, 2),
VICRU_RESET_OFFSET(SRST_DB_GPIO4, 1, 3),
VICRU_RESET_OFFSET(SRST_P_GPIO5, 1, 4),
VICRU_RESET_OFFSET(SRST_DB_GPIO5, 1, 5),
VICRU_RESET_OFFSET(SRST_P_GPIO6, 1, 6),
VICRU_RESET_OFFSET(SRST_DB_GPIO6, 1, 7),
VICRU_RESET_OFFSET(SRST_P_GPIO7, 1, 8),
VICRU_RESET_OFFSET(SRST_DB_GPIO7, 1, 9),
VICRU_RESET_OFFSET(SRST_P_IOC_VCCIO2, 1, 10),
VICRU_RESET_OFFSET(SRST_P_IOC_VCCIO4, 1, 11),
VICRU_RESET_OFFSET(SRST_P_IOC_VCCIO5, 1, 12),
VICRU_RESET_OFFSET(SRST_P_IOC_VCCIO6, 1, 13),
VICRU_RESET_OFFSET(SRST_P_IOC_VCCIO7, 1, 14),
VICRU_RESET_OFFSET(SRST_CORE_ISP, 2, 0),
VICRU_RESET_OFFSET(SRST_H_VICAP, 2, 1),
VICRU_RESET_OFFSET(SRST_A_VICAP, 2, 2),
VICRU_RESET_OFFSET(SRST_D_VICAP, 2, 3),
VICRU_RESET_OFFSET(SRST_ISP0_VICAP, 2, 4),
VICRU_RESET_OFFSET(SRST_CORE_VPSS, 2, 5),
VICRU_RESET_OFFSET(SRST_CORE_VPSL, 2, 6),
VICRU_RESET_OFFSET(SRST_P_CSI2HOST0, 2, 7),
VICRU_RESET_OFFSET(SRST_P_CSI2HOST1, 2, 8),
VICRU_RESET_OFFSET(SRST_P_CSI2HOST2, 2, 9),
VICRU_RESET_OFFSET(SRST_P_CSI2HOST3, 2, 10),
VICRU_RESET_OFFSET(SRST_H_SDMMC0, 2, 11),
VICRU_RESET_OFFSET(SRST_A_GMAC, 2, 12),
VICRU_RESET_OFFSET(SRST_P_CSIPHY0, 2, 13),
VICRU_RESET_OFFSET(SRST_P_CSIPHY1, 2, 14),
VICRU_RESET_OFFSET(SRST_P_MACPHY, 3, 0),
VICRU_RESET_OFFSET(SRST_MACPHY, 3, 1),
VICRU_RESET_OFFSET(SRST_P_SARADC1, 3, 2),
VICRU_RESET_OFFSET(SRST_SARADC1, 3, 3),
VICRU_RESET_OFFSET(SRST_P_SARADC2, 3, 5),
VICRU_RESET_OFFSET(SRST_SARADC2, 3, 6),