Symbol: VE_ENGINE_DEC_H265
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
258
#define VE_DEC_H265_DEC_NAL_HDR (VE_ENGINE_DEC_H265 + 0x00)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
268
#define VE_DEC_H265_DEC_SPS_HDR (VE_ENGINE_DEC_H265 + 0x04)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
295
#define VE_DEC_H265_DEC_PIC_SIZE (VE_ENGINE_DEC_H265 + 0x08)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
300
#define VE_DEC_H265_DEC_PCM_CTRL (VE_ENGINE_DEC_H265 + 0x0c)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
314
#define VE_DEC_H265_DEC_PPS_CTRL0 (VE_ENGINE_DEC_H265 + 0x10)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
330
#define VE_DEC_H265_DEC_PPS_CTRL1 (VE_ENGINE_DEC_H265 + 0x14)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
343
#define VE_DEC_H265_SCALING_LIST_CTRL0 (VE_ENGINE_DEC_H265 + 0x18)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
350
#define VE_DEC_H265_DEC_SLICE_HDR_INFO0 (VE_ENGINE_DEC_H265 + 0x20)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
376
#define VE_DEC_H265_DEC_SLICE_HDR_INFO1 (VE_ENGINE_DEC_H265 + 0x24)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
393
#define VE_DEC_H265_DEC_SLICE_HDR_INFO2 (VE_ENGINE_DEC_H265 + 0x28)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
402
#define VE_DEC_H265_DEC_CTB_ADDR (VE_ENGINE_DEC_H265 + 0x2c)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
407
#define VE_DEC_H265_CTRL (VE_ENGINE_DEC_H265 + 0x30)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
424
#define VE_DEC_H265_TRIGGER (VE_ENGINE_DEC_H265 + 0x34)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
439
#define VE_DEC_H265_STATUS (VE_ENGINE_DEC_H265 + 0x38)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
467
#define VE_DEC_H265_DEC_CTB_NUM (VE_ENGINE_DEC_H265 + 0x3c)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
469
#define VE_DEC_H265_BITS_ADDR (VE_ENGINE_DEC_H265 + 0x40)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
476
#define VE_DEC_H265_BITS_OFFSET (VE_ENGINE_DEC_H265 + 0x44)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
477
#define VE_DEC_H265_BITS_LEN (VE_ENGINE_DEC_H265 + 0x48)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
479
#define VE_DEC_H265_BITS_END_ADDR (VE_ENGINE_DEC_H265 + 0x4c)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
483
#define VE_DEC_H265_SDRT_CTRL (VE_ENGINE_DEC_H265 + 0x50)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
484
#define VE_DEC_H265_SDRT_LUMA_ADDR (VE_ENGINE_DEC_H265 + 0x54)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
485
#define VE_DEC_H265_SDRT_CHROMA_ADDR (VE_ENGINE_DEC_H265 + 0x58)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
487
#define VE_DEC_H265_OUTPUT_FRAME_IDX (VE_ENGINE_DEC_H265 + 0x5c)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
489
#define VE_DEC_H265_NEIGHBOR_INFO_ADDR (VE_ENGINE_DEC_H265 + 0x60)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
493
#define VE_DEC_H265_ENTRY_POINT_OFFSET_ADDR (VE_ENGINE_DEC_H265 + 0x64)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
494
#define VE_DEC_H265_TILE_START_CTB (VE_ENGINE_DEC_H265 + 0x68)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
495
#define VE_DEC_H265_TILE_END_CTB (VE_ENGINE_DEC_H265 + 0x6c)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
496
#define VE_DEC_H265_SCALING_LIST_DC_COEF0 (VE_ENGINE_DEC_H265 + 0x78)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
497
#define VE_DEC_H265_SCALING_LIST_DC_COEF1 (VE_ENGINE_DEC_H265 + 0x7c)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
499
#define VE_DEC_H265_LOW_ADDR (VE_ENGINE_DEC_H265 + 0x80)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
501
#define VE_DEC_H265_OFFSET_ADDR_FIRST_OUT (VE_ENGINE_DEC_H265 + 0x84)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
502
#define VE_DEC_H265_OFFSET_ADDR_SECOND_OUT (VE_ENGINE_DEC_H265 + 0x88)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
515
#define VE_DEC_H265_10BIT_CONFIGURE (VE_ENGINE_DEC_H265 + 0x8c)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
524
#define VE_DEC_H265_BITS_READ (VE_ENGINE_DEC_H265 + 0xdc)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
526
#define VE_DEC_H265_SRAM_OFFSET (VE_ENGINE_DEC_H265 + 0xe0)
drivers/staging/media/sunxi/cedrus/cedrus_regs.h
538
#define VE_DEC_H265_SRAM_DATA (VE_ENGINE_DEC_H265 + 0xe4)