arch/powerpc/xmon/ppc-opc.c

3088

{"vaddubm", VX (4, 0), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3089

{"vmul10cuq", VX (4, 1), VXVB_MASK, PPCVEC3, 0, {VD, VA}},

arch/powerpc/xmon/ppc-opc.c

3090

{"vmaxub", VX (4, 2), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3091

{"vrlb", VX (4, 4), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3092

{"vcmpequb", VXR(4, 6,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3093

{"vcmpneb", VXR(4, 7,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3094

{"vmuloub", VX (4, 8), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3095

{"vaddfp", VX (4, 10), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3097

{"vmrghb", VX (4, 12), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3099

{"vpkuhum", VX (4, 14), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3116

{"vmhaddshs", VXA(4, 32), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3117

{"vmhraddshs", VXA(4, 33), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3118

{"vmladduhm", VXA(4, 34), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3119

{"vmsumudm", VXA(4, 35), VXA_MASK, PPCVEC3, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3121

{"vmsumubm", VXA(4, 36), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3123

{"vmsummbm", VXA(4, 37), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3124

{"vmsumuhm", VXA(4, 38), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3125

{"vmsumuhs", VXA(4, 39), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3127

{"vmsumshm", VXA(4, 40), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3129

{"vmsumshs", VXA(4, 41), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3131

{"vsel", VXA(4, 42), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3133

{"vperm", VXA(4, 43), VXA_MASK, PPCVEC, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3134

{"vsldoi", VXA(4, 44), VXASHB_MASK, PPCVEC, 0, {VD, VA, VB, SHB}},

arch/powerpc/xmon/ppc-opc.c

3135

{"vpermxor", VXA(4, 45), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3137

{"vmaddfp", VXA(4, 46), VXA_MASK, PPCVEC, 0, {VD, VA, VC, VB}},

arch/powerpc/xmon/ppc-opc.c

3139

{"vnmsubfp", VXA(4, 47), VXA_MASK, PPCVEC, 0, {VD, VA, VC, VB}},

arch/powerpc/xmon/ppc-opc.c

3153

{"vpermr", VXA(4, 59), VXA_MASK, PPCVEC3, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3155

{"vaddeuqm", VXA(4, 60), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3157

{"vaddecuq", VXA(4, 61), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3159

{"vsubeuqm", VXA(4, 62), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3161

{"vsubecuq", VXA(4, 63), VXA_MASK, PPCVEC2, 0, {VD, VA, VB, VC}},

arch/powerpc/xmon/ppc-opc.c

3163

{"vadduhm", VX (4, 64), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3164

{"vmul10ecuq", VX (4, 65), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3165

{"vmaxuh", VX (4, 66), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3166

{"vrlh", VX (4, 68), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3167

{"vcmpequh", VXR(4, 70,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3168

{"vcmpneh", VXR(4, 71,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3169

{"vmulouh", VX (4, 72), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3170

{"vsubfp", VX (4, 74), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3172

{"vmrghh", VX (4, 76), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3174

{"vpkuwum", VX (4, 78), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3184

{"vadduwm", VX (4, 128), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3185

{"vmaxuw", VX (4, 130), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3186

{"vrlw", VX (4, 132), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3187

{"vrlwmi", VX (4, 133), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3188

{"vcmpequw", VXR(4, 134,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3189

{"vcmpnew", VXR(4, 135,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3190

{"vmulouw", VX (4, 136), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3191

{"vmuluwm", VX (4, 137), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3192

{"vmrghw", VX (4, 140), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3193

{"vpkuhus", VX (4, 142), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3199

{"vaddudm", VX (4, 192), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3200

{"vmaxud", VX (4, 194), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3201

{"vrld", VX (4, 196), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3202

{"vrldmi", VX (4, 197), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3203

{"vcmpeqfp", VXR(4, 198,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3204

{"vcmpequd", VXR(4, 199,0), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3205

{"vpkuwus", VX (4, 206), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3210

{"vadduqm", VX (4, 256), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3211

{"vmaxsb", VX (4, 258), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3212

{"vslb", VX (4, 260), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3213

{"vcmpnezb", VXR(4, 263,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3214

{"vmulosb", VX (4, 264), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3215

{"vrefp", VX (4, 266), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3216

{"vmrglb", VX (4, 268), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3217

{"vpkshus", VX (4, 270), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3224

{"vaddcuq", VX (4, 320), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3225

{"vmaxsh", VX (4, 322), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3226

{"vslh", VX (4, 324), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3227

{"vcmpnezh", VXR(4, 327,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3228

{"vmulosh", VX (4, 328), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3229

{"vrsqrtefp", VX (4, 330), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3230

{"vmrglh", VX (4, 332), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3231

{"vpkswus", VX (4, 334), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3238

{"vaddcuw", VX (4, 384), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3239

{"vmaxsw", VX (4, 386), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3240

{"vslw", VX (4, 388), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3241

{"vrlwnm", VX (4, 389), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3242

{"vcmpnezw", VXR(4, 391,0), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3243

{"vmulosw", VX (4, 392), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3244

{"vexptefp", VX (4, 394), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3245

{"vmrglw", VX (4, 396), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3246

{"vpkshss", VX (4, 398), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3249

{"vmaxsd", VX (4, 450), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3250

{"vsl", VX (4, 452), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3251

{"vrldnm", VX (4, 453), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3252

{"vcmpgefp", VXR(4, 454,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3253

{"vlogefp", VX (4, 458), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3254

{"vpkswss", VX (4, 462), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3260

{"vaddubs", VX (4, 512), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3261

{"vmul10uq", VX (4, 513), VXVB_MASK, PPCVEC3, 0, {VD, VA}},

arch/powerpc/xmon/ppc-opc.c

3263

{"vminub", VX (4, 514), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3266

{"vsrb", VX (4, 516), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3269

{"vcmpgtub", VXR(4, 518,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3271

{"vmuleub", VX (4, 520), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3274

{"vrfin", VX (4, 522), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3277

{"vspltb", VX (4, 524), VXUIMM4_MASK, PPCVEC, 0, {VD, VB, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

3278

{"vextractub", VX (4, 525), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

3281

{"vupkhsb", VX (4, 526), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3316

{"vadduhs", VX (4, 576), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3317

{"vmul10euq", VX (4, 577), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3318

{"vminuh", VX (4, 578), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3319

{"vsrh", VX (4, 580), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3320

{"vcmpgtuh", VXR(4, 582,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3321

{"vmuleuh", VX (4, 584), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3322

{"vrfiz", VX (4, 586), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3323

{"vsplth", VX (4, 588), VXUIMM3_MASK, PPCVEC, 0, {VD, VB, UIMM3}},

arch/powerpc/xmon/ppc-opc.c

3324

{"vextractuh", VX (4, 589), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

3325

{"vupkhsh", VX (4, 590), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3330

{"vadduws", VX (4, 640), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3332

{"vminuw", VX (4, 642), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3334

{"vsrw", VX (4, 644), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3337

{"vcmpgtuw", VXR(4, 646,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3338

{"vmuleuw", VX (4, 648), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3341

{"vrfip", VX (4, 650), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3343

{"vspltw", VX (4, 652), VXUIMM2_MASK, PPCVEC, 0, {VD, VB, UIMM2}},

arch/powerpc/xmon/ppc-opc.c

3344

{"vextractuw", VX (4, 653), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

3347

{"vupklsb", VX (4, 654), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3365

{"vminud", VX (4, 706), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3367

{"vsr", VX (4, 708), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3370

{"vcmpgtfp", VXR(4, 710,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3371

{"vcmpgtud", VXR(4, 711,0), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3374

{"vrfim", VX (4, 714), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3376

{"vextractd", VX (4, 717), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

3379

{"vupklsh", VX (4, 718), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3425

{"vaddsbs", VX (4, 768), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3428

{"vminsb", VX (4, 770), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3431

{"vsrab", VX (4, 772), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3433

{"vcmpgtsb", VXR(4, 774,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3435

{"vmulesb", VX (4, 776), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3437

{"vcfux", VX (4, 778), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},

arch/powerpc/xmon/ppc-opc.c

3438

{"vcuxwfp", VX (4, 778), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},

arch/powerpc/xmon/ppc-opc.c

3440

{"vspltisb", VX (4, 780), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},

arch/powerpc/xmon/ppc-opc.c

3441

{"vinsertb", VX (4, 781), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

3444

{"vpkpx", VX (4, 782), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3474

{"vaddshs", VX (4, 832), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3475

{"bcdcpsgn.", VX (4, 833), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3476

{"vminsh", VX (4, 834), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3477

{"vsrah", VX (4, 836), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3478

{"vcmpgtsh", VXR(4, 838,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3479

{"vmulesh", VX (4, 840), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3480

{"vcfsx", VX (4, 842), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},

arch/powerpc/xmon/ppc-opc.c

3481

{"vcsxwfp", VX (4, 842), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},

arch/powerpc/xmon/ppc-opc.c

3482

{"vspltish", VX (4, 844), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},

arch/powerpc/xmon/ppc-opc.c

3483

{"vinserth", VX (4, 845), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

3484

{"vupkhpx", VX (4, 846), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3491

{"vaddsws", VX (4, 896), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3492

{"vminsw", VX (4, 898), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3493

{"vsraw", VX (4, 900), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3494

{"vcmpgtsw", VXR(4, 902,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3495

{"vmulesw", VX (4, 904), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3496

{"vctuxs", VX (4, 906), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},

arch/powerpc/xmon/ppc-opc.c

3497

{"vcfpuxws", VX (4, 906), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},

arch/powerpc/xmon/ppc-opc.c

3498

{"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},

arch/powerpc/xmon/ppc-opc.c

3499

{"vinsertw", VX (4, 909), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

3502

{"vminsd", VX (4, 962), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3503

{"vsrad", VX (4, 964), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3504

{"vcmpbfp", VXR(4, 966,0), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3505

{"vcmpgtsd", VXR(4, 967,0), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3506

{"vctsxs", VX (4, 970), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},

arch/powerpc/xmon/ppc-opc.c

3507

{"vcfpsxws", VX (4, 970), VX_MASK, PPCVEC, 0, {VD, VB, UIMM}},

arch/powerpc/xmon/ppc-opc.c

3508

{"vinsertd", VX (4, 973), VXUIMM4_MASK, PPCVEC3, 0, {VD, VB, UIMM4}},

arch/powerpc/xmon/ppc-opc.c

3509

{"vupklpx", VX (4, 974), VXVA_MASK, PPCVEC, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3514

{"vsububm", VX (4,1024), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3515

{"bcdadd.", VX (4,1025), VXPS_MASK, PPCVEC2, 0, {VD, VA, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3516

{"vavgub", VX (4,1026), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3517

{"vabsdub", VX (4,1027), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3519

{"vand", VX (4,1028), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3520

{"vcmpequb.", VXR(4, 6,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3521

{"vcmpneb.", VXR(4, 7,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3525

{"vpmsumb", VX (4,1032), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3528

{"vmaxfp", VX (4,1034), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3531

{"vslo", VX (4,1036), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3546

{"vsubuhm", VX (4,1088), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3547

{"bcdsub.", VX (4,1089), VXPS_MASK, PPCVEC2, 0, {VD, VA, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3548

{"vavguh", VX (4,1090), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3549

{"vabsduh", VX (4,1091), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3550

{"vandc", VX (4,1092), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3551

{"vcmpequh.", VXR(4, 70,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3554

{"vcmpneh.", VXR(4, 71,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3556

{"vpmsumh", VX (4,1096), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3558

{"vminfp", VX (4,1098), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3560

{"vsro", VX (4,1100), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3562

{"vpkudum", VX (4,1102), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3583

{"vsubuwm", VX (4,1152), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3584

{"bcdus.", VX (4,1153), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3585

{"vavguw", VX (4,1154), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3586

{"vabsduw", VX (4,1155), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3587

{"vmr", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VA, VBA}},

arch/powerpc/xmon/ppc-opc.c

3588

{"vor", VX (4,1156), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3589

{"vcmpnew.", VXR(4, 135,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3590

{"vpmsumw", VX (4,1160), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3591

{"vcmpequw.", VXR(4, 134,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3598

{"vsubudm", VX (4,1216), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3600

{"bcds.", VX (4,1217), VXPS_MASK, PPCVEC3, 0, {VD, VA, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3605

{"vxor", VX (4,1220), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3607

{"vcmpeqfp.", VXR(4, 198,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3609

{"vcmpequd.", VXR(4, 199,1), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3612

{"vpmsumd", VX (4,1224), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3617

{"vpkudus", VX (4,1230), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3624

{"vsubuqm", VX (4,1280), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3626

{"bcdtrunc.", VX (4,1281), VXPS_MASK, PPCVEC3, 0, {VD, VA, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3628

{"vavgsb", VX (4,1282), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3631

{"vnot", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VA, VBA}},

arch/powerpc/xmon/ppc-opc.c

3632

{"vnor", VX (4,1284), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3636

{"vcmpnezb.", VXR(4, 263,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3639

{"vcipher", VX (4,1288), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3640

{"vcipherlast", VX (4,1289), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3643

{"vgbbd", VX (4,1292), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3655

{"vsubcuq", VX (4,1344), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3657

{"bcdutrunc.", VX (4,1345), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3659

{"vavgsh", VX (4,1346), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3660

{"vorc", VX (4,1348), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3663

{"vcmpnezh.", VXR(4, 327,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3664

{"vncipher", VX (4,1352), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3666

{"vncipherlast",VX (4,1353), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3668

{"vbpermq", VX (4,1356), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3669

{"vpksdus", VX (4,1358), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3679

{"vsubcuw", VX (4,1408), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3681

{"bcdctsq.", VXVA(4,1409,0), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3682

{"bcdcfsq.", VXVA(4,1409,2), VXVAPS_MASK, PPCVEC3, 0, {VD, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3683

{"bcdctz.", VXVA(4,1409,4), VXVAPS_MASK, PPCVEC3, 0, {VD, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3684

{"bcdctn.", VXVA(4,1409,5), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3685

{"bcdcfz.", VXVA(4,1409,6), VXVAPS_MASK, PPCVEC3, 0, {VD, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3686

{"bcdcfn.", VXVA(4,1409,7), VXVAPS_MASK, PPCVEC3, 0, {VD, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3687

{"bcdsetsgn.", VXVA(4,1409,31), VXVAPS_MASK, PPCVEC3, 0, {VD, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3688

{"vavgsw", VX (4,1410), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3690

{"vnand", VX (4,1412), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3695

{"vcmpnezw.", VXR(4, 391,1), VXR_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3712

{"bcdsr.", VX (4,1473), VXPS_MASK, PPCVEC3, 0, {VD, VA, VB, PS}},

arch/powerpc/xmon/ppc-opc.c

3714

{"vsld", VX (4,1476), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3715

{"vcmpgefp.", VXR(4, 454,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3718

{"vsbox", VX (4,1480), VXVB_MASK, PPCVEC2, 0, {VD, VA}},

arch/powerpc/xmon/ppc-opc.c

3721

{"vbpermd", VX (4,1484), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3722

{"vpksdss", VX (4,1486), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3731

{"vsububs", VX (4,1536), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3734

{"vnegw", VXVA(4,1538,6), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3735

{"vnegd", VXVA(4,1538,7), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3736

{"vprtybw", VXVA(4,1538,8), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3737

{"vprtybd", VXVA(4,1538,9), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3738

{"vprtybq", VXVA(4,1538,10), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3739

{"vextsb2w", VXVA(4,1538,16), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3740

{"vextsh2w", VXVA(4,1538,17), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3741

{"vextsb2d", VXVA(4,1538,24), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3742

{"vextsh2d", VXVA(4,1538,25), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3743

{"vextsw2d", VXVA(4,1538,26), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3744

{"vctzb", VXVA(4,1538,28), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3745

{"vctzh", VXVA(4,1538,29), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3746

{"vctzw", VXVA(4,1538,30), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3747

{"vctzd", VXVA(4,1538,31), VXVA_MASK, PPCVEC3, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3748

{"mfvscr", VX (4,1540), VXVAVB_MASK, PPCVEC, 0, {VD}},

arch/powerpc/xmon/ppc-opc.c

3749

{"vcmpgtub.", VXR(4, 518,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3752

{"vsum4ubs", VX (4,1544), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3754

{"vsubuhs", VX (4,1600), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3756

{"vcmpgtuh.", VXR(4, 582,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3757

{"vsum4shs", VX (4,1608), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3761

{"vupkhsw", VX (4,1614), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3762

{"vsubuws", VX (4,1664), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3763

{"vshasigmaw", VX (4,1666), VX_MASK, PPCVEC2, 0, {VD, VA, ST, SIX}},

arch/powerpc/xmon/ppc-opc.c

3764

{"veqv", VX (4,1668), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3765

{"vcmpgtuw.", VXR(4, 646,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3768

{"vsum2sws", VX (4,1672), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3769

{"vmrgow", VX (4,1676), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3771

{"vshasigmad", VX (4,1730), VX_MASK, PPCVEC2, 0, {VD, VA, ST, SIX}},

arch/powerpc/xmon/ppc-opc.c

3772

{"vsrd", VX (4,1732), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3773

{"vcmpgtfp.", VXR(4, 710,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3775

{"vcmpgtud.", VXR(4, 711,1), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3777

{"vupklsw", VX (4,1742), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3778

{"vsubsbs", VX (4,1792), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3779

{"vclzb", VX (4,1794), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3780

{"vpopcntb", VX (4,1795), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3781

{"vsrv", VX (4,1796), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3782

{"vcmpgtsb.", VXR(4, 774,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3785

{"vsum4sbs", VX (4,1800), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3789

{"vsubshs", VX (4,1856), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3790

{"vclzh", VX (4,1858), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3791

{"vpopcnth", VX (4,1859), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3792

{"vslv", VX (4,1860), VX_MASK, PPCVEC3, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3793

{"vcmpgtsh.", VXR(4, 838,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3801

{"vsubsws", VX (4,1920), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3802

{"vclzw", VX (4,1922), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3803

{"vpopcntw", VX (4,1923), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3804

{"vcmpgtsw.", VXR(4, 902,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3807

{"vsumsws", VX (4,1928), VX_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3808

{"vmrgew", VX (4,1932), VX_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3812

{"vclzd", VX (4,1986), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3813

{"vpopcntd", VX (4,1987), VXVA_MASK, PPCVEC2, 0, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

3814

{"vcmpbfp.", VXR(4, 966,1), VXR_MASK, PPCVEC, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

3816

{"vcmpgtsd.", VXR(4, 967,1), VXR_MASK, PPCVEC2, 0, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

4694

{"lvsl", X(31,6), X_MASK, PPCVEC, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

4695

{"lvebx", X(31,7), X_MASK, PPCVEC, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

4768

{"lvsr", X(31,38), X_MASK, PPCVEC, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

4769

{"lvehx", X(31,39), X_MASK, PPCVEC, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

4772

{"mviwsplt", X(31,46), X_MASK, PPCVEC2, 0, {VD, RA, RB}},

arch/powerpc/xmon/ppc-opc.c

4776

{"lvewx", X(31,71), X_MASK, PPCVEC, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

4859

{"lvx", X(31,103), X_MASK, PPCVEC, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

4868

{"mvidsplt", X(31,110), X_MASK, PPCVEC2, 0, {VD, RA, RB}},

arch/powerpc/xmon/ppc-opc.c

4961

{"mtvrd", X(31,179)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}},

arch/powerpc/xmon/ppc-opc.c

4999

{"mtvrwa", X(31,211)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}},

arch/powerpc/xmon/ppc-opc.c

5048

{"mtvrwz", X(31,243)|1, XX1RB_MASK|1, PPCVSX2, 0, {VD, RA}},

arch/powerpc/xmon/ppc-opc.c

5068

{"lvexbx", X(31,261), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5072

{"lvepxl", X(31,263), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5118

{"lvexhx", X(31,293), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5119

{"lvepx", X(31,295), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5182

{"lvexwx", X(31,325), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5404

{"lvxl", X(31,359), X_MASK, PPCVEC, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5758

{"lvlx", X(31,519), X_MASK, CELL, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5807

{"lvtrx", X(31,549), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5811

{"lvrx", X(31,551), X_MASK, CELL, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5831

{"lvtlx", X(31,581), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

5861

{"lvswx", X(31,613), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

6014

{"lvsm", X(31,773), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

6019

{"lvlxl", X(31,775), X_MASK, CELL, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

6057

{"lvtrxl", X(31,805), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

6059

{"lvrxl", X(31,807), X_MASK, CELL, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

6084

{"lvtlxl", X(31,837), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

6111

{"lvswxl", X(31,869), X_MASK, PPCVEC2, 0, {VD, RA0, RB}},

arch/powerpc/xmon/ppc-opc.c

6341

{"lxsd", DSO(57,2), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6342

{"lxssp", DSO(57,3), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}},

arch/powerpc/xmon/ppc-opc.c

6684

{"xsaddqp", XRC(63,4,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6685

{"xsaddqpo", XRC(63,4,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6687

{"xsrqpi", ZRC(63,5,0), Z2_MASK, PPCVSX3, PPCVLE, {R, VD, VB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6688

{"xsrqpix", ZRC(63,5,1), Z2_MASK, PPCVSX3, PPCVLE, {R, VD, VB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6770

{"xsmulqp", XRC(63,36,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6771

{"xsmulqpo", XRC(63,36,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6773

{"xsrqpxp", Z(63,37), Z2_MASK, PPCVSX3, PPCVLE, {R, VD, VB, RMC}},

arch/powerpc/xmon/ppc-opc.c

6801

{"xscpsgnqp", X(63,100), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6849

{"xsmaddqp", XRC(63,388,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6850

{"xsmaddqpo", XRC(63,388,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6855

{"xsmsubqp", XRC(63,420,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6856

{"xsmsubqpo", XRC(63,420,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6861

{"xsnmaddqp", XRC(63,452,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6862

{"xsnmaddqpo", XRC(63,452,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6867

{"xsnmsubqp", XRC(63,484,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6868

{"xsnmsubqpo", XRC(63,484,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6876

{"xssubqp", XRC(63,516,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6877

{"xssubqpo", XRC(63,516,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6882

{"xsdivqp", XRC(63,548,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6883

{"xsdivqpo", XRC(63,548,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

6915

{"xsabsqp", XVA(63,804,0), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6916

{"xsxexpqp", XVA(63,804,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6917

{"xsnabsqp", XVA(63,804,8), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6918

{"xsnegqp", XVA(63,804,16), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6919

{"xsxsigqp", XVA(63,804,18), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6920

{"xssqrtqp", XVARC(63,804,27,0), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6921

{"xssqrtqpo", XVARC(63,804,27,1), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6936

{"xscvqpuwz", XVA(63,836,1), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6937

{"xscvudqp", XVA(63,836,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6938

{"xscvqpswz", XVA(63,836,9), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6939

{"xscvsdqp", XVA(63,836,10), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6940

{"xscvqpudz", XVA(63,836,17), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6941

{"xscvqpdp", XVARC(63,836,20,0), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6942

{"xscvqpdpo", XVARC(63,836,20,1), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6943

{"xscvdpqp", XVA(63,836,22), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6944

{"xscvqpsdz", XVA(63,836,25), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}},

arch/powerpc/xmon/ppc-opc.c

6956

{"xsiexpqp", X(63,868), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}},

arch/powerpc/xmon/ppc-opc.c

742

#define VS VD

arch/powerpc/xmon/ppc-opc.c

746

#define SIMM VD + 1

drivers/net/wireless/intel/ipw2x00/ipw2200.c

62

#define IPW2200_VERSION "1.2.2" VK VD VM VP VR VQ

drivers/net/wireless/intel/iwlegacy/3945-mac.c

61

#define DRV_VERSION IWLWIFI_VERSION VD "s"

drivers/net/wireless/intel/iwlegacy/4965-mac.c

58

#define DRV_VERSION IWLWIFI_VERSION VD