Symbol: VC5_OUT_DIV_CONTROL
drivers/clk/clk-versaclock5.c
635
ret = regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src);
drivers/clk/clk-versaclock5.c
642
VC5_OUT_DIV_CONTROL(hwdata->num),
drivers/clk/clk-versaclock5.c
694
ret = regmap_read(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num), &src);
drivers/clk/clk-versaclock5.c
731
return regmap_update_bits(vc5->regmap, VC5_OUT_DIV_CONTROL(hwdata->num),