drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

3231

tmp = REG_SET_FIELD(tmp, LB_VBLANK_STATUS, VBLANK_ACK, 1);

drivers/gpu/drm/radeon/cik.c

7321

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7325

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7337

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7341

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7354

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/cik.c

7358

WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VBLANK_ACK);

drivers/gpu/drm/radeon/evergreen.c

4643

VBLANK_ACK);

drivers/gpu/drm/radeon/si.c

6151

VBLANK_ACK);