crypto/krb5/selftest.c

134

if (VALID(result.len != prf.len)) {

crypto/krb5/selftest.c

187

VALID(1);

crypto/krb5/selftest.c

272

if (VALID(conf.len != krb5->conf_len) ||

crypto/krb5/selftest.c

273

VALID(ct.len != krb5->conf_len + plain.len + krb5->cksum_len))

crypto/krb5/selftest.c

93

if (VALID(len & 1))

crypto/krb5/selftest.c

99

VALID(1);

drivers/accel/ivpu/ivpu_hw_btrs.c

137

if (!REG_TEST_FLD(VPU_HW_BTRS_LNL_TILE_FUSE, VALID, fuse)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c

152

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

490

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

935

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

943

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

967

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

975

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

769

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

344

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

347

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

851

VALID,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

869

VALID,

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

1384

val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c

1237

val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

1866

val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

919

val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c

928

val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

856

val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);

drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c

865

val = REG_SET_FIELD(val, MP1_SMN_IH_SW_INT, VALID, 0);

drivers/gpu/drm/i915/selftests/i915_vma.c

265

VALID(0, PIN_GLOBAL),

drivers/gpu/drm/i915/selftests/i915_vma.c

266

VALID(0, PIN_GLOBAL | PIN_MAPPABLE),

drivers/gpu/drm/i915/selftests/i915_vma.c

268

VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | 4096),

drivers/gpu/drm/i915/selftests/i915_vma.c

269

VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | 8192),

drivers/gpu/drm/i915/selftests/i915_vma.c

270

VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)),

drivers/gpu/drm/i915/selftests/i915_vma.c

271

VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)),

drivers/gpu/drm/i915/selftests/i915_vma.c

272

VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (ggtt->vm.total - 4096)),

drivers/gpu/drm/i915/selftests/i915_vma.c

274

VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (ggtt->mappable_end - 4096)),

drivers/gpu/drm/i915/selftests/i915_vma.c

276

VALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | (ggtt->vm.total - 4096)),

drivers/gpu/drm/i915/selftests/i915_vma.c

280

VALID(4096, PIN_GLOBAL),

drivers/gpu/drm/i915/selftests/i915_vma.c

281

VALID(8192, PIN_GLOBAL),

drivers/gpu/drm/i915/selftests/i915_vma.c

282

VALID(ggtt->mappable_end - 4096, PIN_GLOBAL | PIN_MAPPABLE),

drivers/gpu/drm/i915/selftests/i915_vma.c

283

VALID(ggtt->mappable_end, PIN_GLOBAL | PIN_MAPPABLE),

drivers/gpu/drm/i915/selftests/i915_vma.c

285

VALID(ggtt->vm.total - 4096, PIN_GLOBAL),

drivers/gpu/drm/i915/selftests/i915_vma.c

286

VALID(ggtt->vm.total, PIN_GLOBAL),

drivers/gpu/drm/i915/selftests/i915_vma.c

293

VALID(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)),

drivers/gpu/drm/imagination/pvr_mmu.c

434

return PVR_PAGE_TABLE_FIELD_GET(2, PC, VALID, entry);

drivers/gpu/drm/imagination/pvr_mmu.c

454

PVR_PAGE_TABLE_FIELD_PREP(2, PC, VALID, true) |

drivers/gpu/drm/imagination/pvr_mmu.c

557

return PVR_PAGE_TABLE_FIELD_GET(1, PD, VALID, entry);

drivers/gpu/drm/imagination/pvr_mmu.c

575

PVR_PAGE_TABLE_FIELD_PREP(1, PD, VALID, true) |

drivers/gpu/drm/imagination/pvr_mmu.c

717

return PVR_PAGE_TABLE_FIELD_GET(0, PT, VALID, entry);

drivers/gpu/drm/imagination/pvr_mmu.c

739

WRITE_ONCE(entry->val, PVR_PAGE_TABLE_FIELD_PREP(0, PT, VALID, true) |

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgh100.c

272

map->type |= NVDEF(NV_MMU, VER3_PTE, VALID, TRUE);

drivers/net/ethernet/amd/xgbe/xgbe-pci.c

249

if (!XP_GET_BITS(ma_hi, XP_MAC_ADDR_HI, VALID) ||

drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_internal.h

87

#define HW_ATL2_ACTION(ACTION, RSS, INDEX, VALID) \

drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2_internal.h

91

(((VALID) & 0x1U) << 0))

drivers/net/ethernet/huawei/hinic/hinic_debugfs.c

114

case VALID:

drivers/net/ethernet/huawei/hinic/hinic_port.c

722

ctx |= HINIC_RSS_TYPE_SET(1, VALID) |

drivers/net/ethernet/huawei/hinic3/hinic3_rss.c

141

ctx = L2NIC_RSS_TYPE_SET(1, VALID) |

drivers/net/wireless/intel/iwlegacy/common.c

965

CHECK_AND_PRINT_I(VALID),

drivers/net/wireless/intel/iwlwifi/dvm/eeprom.c

387

TXP_CHECK_AND_PRINT(VALID),

drivers/net/wireless/intel/iwlwifi/dvm/eeprom.c

574

CHECK_AND_PRINT_I(VALID),

drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c

257

CHECK_AND_PRINT_I(VALID),

drivers/sh/intc/chip.c

160

[IRQ_TYPE_EDGE_FALLING] = VALID(0),

drivers/sh/intc/chip.c

161

[IRQ_TYPE_EDGE_RISING] = VALID(1),

drivers/sh/intc/chip.c

162

[IRQ_TYPE_LEVEL_LOW] = VALID(2),

drivers/sh/intc/chip.c

167

[IRQ_TYPE_LEVEL_HIGH] = VALID(3),

drivers/sh/intc/chip.c

170

[IRQ_TYPE_EDGE_BOTH] = VALID(4),

drivers/thermal/qcom/tsens-v1.c

136

REG_FIELD_FOR_EACH_SENSOR11(VALID, TM_Sn_STATUS_OFF, 14, 14),

drivers/thermal/qcom/tsens-v2.c

129

REG_FIELD_FOR_EACH_SENSOR16(VALID, TM_Sn_STATUS_OFF, 21, 21),

drivers/usb/gadget/udc/r8a66597-udc.c

1292

r8a66597_write(r8a66597, ~VALID, INTSTS0);