Symbol: V4L2_HEVC_DPB_ENTRIES_NUM_MAX
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c
202
struct slice_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c
210
unsigned char poc_st_curr_before[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c
211
unsigned char poc_st_curr_after[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c
212
unsigned char poc_lt_curr[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c
250
struct mtk_hevc_dpb_info hevc_dpb_info[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c
402
for (index = 0; index < V4L2_HEVC_DPB_ENTRIES_NUM_MAX; index++) {
drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c
557
const struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX])
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
300
u32 list0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX] = {};
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
301
u32 list1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX] = {};
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
366
for (i = 0; i < V4L2_HEVC_DPB_ENTRIES_NUM_MAX; i++) {
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
455
i < (V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1); i++) {
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
466
dpb_longterm_e |= BIT(V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1 - i);
drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c
501
for (; i < V4L2_HEVC_DPB_ENTRIES_NUM_MAX; i++) {
drivers/media/platform/verisilicon/hantro_hw.h
39
#define NUM_REF_PICTURES (V4L2_HEVC_DPB_ENTRIES_NUM_MAX + 1)
drivers/media/v4l2-core/v4l2-ctrls-core.c
1258
V4L2_HEVC_DPB_ENTRIES_NUM_MAX)
drivers/staging/media/sunxi/cedrus/cedrus_h265.c
768
output_pic_list_index = V4L2_HEVC_DPB_ENTRIES_NUM_MAX;
include/uapi/linux/v4l2-controls.h
2363
__s8 delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
include/uapi/linux/v4l2-controls.h
2364
__s8 luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
include/uapi/linux/v4l2-controls.h
2365
__s8 delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
include/uapi/linux/v4l2-controls.h
2366
__s8 chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
include/uapi/linux/v4l2-controls.h
2368
__s8 delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
include/uapi/linux/v4l2-controls.h
2369
__s8 luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
include/uapi/linux/v4l2-controls.h
2370
__s8 delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
include/uapi/linux/v4l2-controls.h
2371
__s8 chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
include/uapi/linux/v4l2-controls.h
2471
__u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
include/uapi/linux/v4l2-controls.h
2472
__u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
include/uapi/linux/v4l2-controls.h
2521
__u8 poc_st_curr_before[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
include/uapi/linux/v4l2-controls.h
2522
__u8 poc_st_curr_after[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
include/uapi/linux/v4l2-controls.h
2523
__u8 poc_lt_curr[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
include/uapi/linux/v4l2-controls.h
2526
struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];