drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1086

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)), 0xFFFFFFFF, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

897

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1065

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

920

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1068

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1230

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1097

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1270

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1064

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1215

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1261

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

924

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1127

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

980

(0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT)), 0, indirect);