drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

1075

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)), 0xFFFFFFFF, 0);

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

886

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

1052

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c

907

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1055

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c

1217

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1084

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c

1257

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1051

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1202

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1248

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

911

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)), 0, indirect);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1114

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)));

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

967

(0x4 << UVD_MPC_SET_MUXA0__VARA_4__SHIFT)), 0, indirect);