Symbol: UMC
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c
36
ACA_BANK_HWID(UMC, 0x96, 0x00),
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
127
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
387
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
405
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_ADDRT0);
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
449
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_OdEccCntSel);
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
451
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_OdEccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c
58
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_OdEccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
103
SOC15_REG_OFFSET(UMC, 0,
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
106
SOC15_REG_OFFSET(UMC, 0,
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
111
SOC15_REG_OFFSET(UMC, 0,
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
114
SOC15_REG_OFFSET(UMC, 0,
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
181
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCntSel_ARCT);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
183
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCnt_ARCT);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
185
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_STATUST0_ARCT);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
189
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCntSel);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
191
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
193
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
236
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_STATUST0_ARCT);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
240
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
309
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_STATUST0_ARCT);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
311
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_ADDRT0_ARCT);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
315
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
317
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_ADDRT0);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
401
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCntSel_ARCT);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
403
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCnt_ARCT);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
407
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCntSel);
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
409
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_EccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
274
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_0_EccErrCntSel);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
276
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_0_EccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
278
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
316
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_ADDRT0);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
345
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
371
SOC15_REG_OFFSET(UMC, 0,
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
374
SOC15_REG_OFFSET(UMC, 0,
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
452
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
454
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_ADDRT0);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
498
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_0_EccCtrl);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
74
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_IPIDT0);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
81
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_SYNDT0);
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
88
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_MISC0T0);
drivers/gpu/drm/amd/amdgpu/umc_v8_10.c
112
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v8_10.c
130
mc_umc_status_addr = SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v8_10.c
256
SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v8_10.c
273
mc_umc_addrt0 = SOC15_REG_OFFSET(UMC, 0, regMCA_UMC_UMC0_MCUMC_ADDRT0);
drivers/gpu/drm/amd/amdgpu/umc_v8_10.c
304
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_0_GeccErrCntSel);
drivers/gpu/drm/amd/amdgpu/umc_v8_10.c
306
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_0_GeccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v8_10.c
88
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_0_GeccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v8_14.c
129
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_GeccErrCntSel);
drivers/gpu/drm/amd/amdgpu/umc_v8_14.c
131
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_GeccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v8_14.c
46
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_GeccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v8_14.c
69
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_GeccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v8_14.c
84
SOC15_REG_OFFSET(UMC, 0, regUMCCH0_GeccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
187
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_GeccErrCntSel);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
189
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_GeccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
245
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_GeccErrCntSel);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
247
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_GeccErrCnt);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
249
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
288
mc_umc_status_addr = SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
336
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_STATUST0);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
338
SOC15_REG_OFFSET(UMC, 0, mmMCA_UMC_UMC0_MCUMC_ADDRT0);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
397
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_GeccErrCntSel);
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
399
SOC15_REG_OFFSET(UMC, 0, mmUMCCH0_0_GeccErrCnt);
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
3376
MCA_BANK_IPID(UMC, 0x96, 0x0),
drivers/net/ethernet/emulex/benet/be_main.c
4325
return UMC;
drivers/net/ethernet/emulex/benet/be_main.c
5759
case UMC: