arch/mips/alchemy/common/usb.c

103

s = __raw_readl(base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

131

r = __raw_readl(base + USB_DWC_CTRL3); /* enable OHCI block */

arch/mips/alchemy/common/usb.c

134

__raw_writel(r, base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

153

r = __raw_readl(base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

156

__raw_writel(r, base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

168

r = __raw_readl(base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

170

__raw_writel(r, base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

195

r = __raw_readl(base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

197

__raw_writel(r, base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

239

r = __raw_readl(base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

241

__raw_writel(r, base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

256

r = __raw_readl(base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

258

__raw_writel(r, base + USB_DWC_CTRL3);

arch/mips/alchemy/common/usb.c

305

__raw_writel(0, base + USB_DWC_CTRL3); /* disable all clocks */