UART_IER_MSI
outb(UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI,
(~(UART_IER_MSI | UART_IER_RLSI | UART_IER_THRI | UART_IER_RDI)));
soutp(UART_IER, sinp(UART_IER) | UART_IER_MSI);
(~(UART_IER_MSI | UART_IER_RLSI | UART_IER_THRI | UART_IER_RDI)));
(~(UART_IER_MSI | UART_IER_RLSI | UART_IER_THRI | UART_IER_RDI)));
soutp(UART_IER, sinp(UART_IER) | UART_IER_MSI);
port->ier &= ~UART_IER_MSI;
port->ier |= UART_IER_MSI;
if(info->IER & UART_IER_MSI)
info->IER = UART_IER_MSI;
info->IER &= ~UART_IER_MSI;
info->IER |= UART_IER_MSI;
info->IER |= UART_IER_MSI;
info->IER |= UART_IER_MSI;
info->IER &= ~UART_IER_MSI;
info->IER |= UART_IER_MSI;
info->IER |= UART_IER_MSI;
info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
if (ier & UART_IER_MSI)
up->ier &= ~UART_IER_MSI;
up->ier |= UART_IER_MSI;
up->ier &= ~UART_IER_MSI;
up->ier |= UART_IER_MSI;
if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
up->ier &= ~UART_IER_MSI;
up->ier |= UART_IER_MSI;
ier |= (UART_IER_THRI | UART_IER_MSI);
ier |= (UART_IER_THRI | UART_IER_MSI);
up->ier |= UART_IER_MSI;
if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
up->ier &= ~UART_IER_MSI;
up->ier |= UART_IER_MSI;
up->ier &= ~UART_IER_MSI;
up->ier |= UART_IER_MSI;
up->ier |= UART_IER_MSI;
tup->ier_shadow |= UART_IER_MSI;
up->ier |= UART_IER_MSI;
up->ier &= ~UART_IER_MSI;
up->ier |= UART_IER_MSI;
ark3116_write_reg(port->serial, UART_IER, UART_IER_MSI|UART_IER_RLSI);
UART_IER_MSI);
UART_IER_RDI | UART_IER_THRI | UART_IER_MSI);
#define UART_IER_ALL_INTR (UART_IER_MSI | \
if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) &&
if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) &&
if ((ier & UART_IER_MSI) &&
| UART_IER_MSI /* Enable Modem status interrupt */
| UART_IER_MSI /* Enable Modem status interrupt */