Symbol: URA
arch/powerpc/xmon/ppc-opc.c
3522
{"udi0fcm.", APU(4, 515,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3523
{"udi0fcm", APU(4, 515,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3552
{"udi1fcm.", APU(4, 547,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3553
{"udi1fcm", APU(4, 547,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3592
{"udi2fcm.", APU(4, 579,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3593
{"udi2fcm", APU(4, 579,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3608
{"udi3fcm.", APU(4, 611,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3610
{"udi3fcm", APU(4, 611,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3634
{"udi4fcm.", APU(4, 643,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3635
{"udi4fcm", APU(4, 643,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3661
{"udi5fcm.", APU(4, 675,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3662
{"udi5fcm", APU(4, 675,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3693
{"udi6fcm.", APU(4, 707,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3694
{"udi6fcm", APU(4, 707,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3716
{"udi7fcm.", APU(4, 739,0), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3717
{"udi7fcm", APU(4, 739,1), APU_MASK, PPC405|PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3750
{"udi8fcm.", APU(4, 771,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3751
{"udi8fcm", APU(4, 771,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3758
{"udi9fcm.", APU(4, 804,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3759
{"udi9fcm", APU(4, 804,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3766
{"udi10fcm.", APU(4, 835,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3767
{"udi10fcm", APU(4, 835,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3774
{"udi11fcm.", APU(4, 867,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3776
{"udi11fcm", APU(4, 867,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3783
{"udi12fcm.", APU(4, 899,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3784
{"udi12fcm", APU(4, 899,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3795
{"udi13fcm.", APU(4, 931,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3796
{"udi13fcm", APU(4, 931,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3805
{"udi14fcm.", APU(4, 963,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3806
{"udi14fcm", APU(4, 963,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3815
{"udi15fcm.", APU(4, 995,0), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
3817
{"udi15fcm", APU(4, 995,1), APU_MASK, PPC440, PPC476, {URT, URA, URB}},
arch/powerpc/xmon/ppc-opc.c
877
#define URB URA + 1