drivers/gpu/drm/amd/amdgpu/si.c

1652

WREG32_P(cg_upll_func_cntl, 0, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/amd/amdgpu/si.c

1657

WREG32_P(cg_upll_func_cntl, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/amd/amdgpu/si.c

1669

WREG32_P(cg_upll_func_cntl, 0, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/amd/amdgpu/si.c

1879

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/amd/amdgpu/si.c

1884

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/amd/amdgpu/si.c

1896

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/radeon/r600.c

215

UPLL_RESET_MASK | UPLL_SLEEP_MASK | UPLL_CTLREQ_MASK));

drivers/gpu/drm/radeon/radeon_uvd.c

1017

WREG32_P(cg_upll_func_cntl, 0, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/radeon/radeon_uvd.c

1022

WREG32_P(cg_upll_func_cntl, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/radeon/radeon_uvd.c

1033

WREG32_P(cg_upll_func_cntl, 0, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/radeon/si.c

7434

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/radeon/si.c

7439

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK);

drivers/gpu/drm/radeon/si.c

7450

WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK);