UNIPHIER_CLK_GATE
UNIPHIER_CLK_GATE("sd" #ch, (_idx), "sd" #ch "-sel", 0x20 + 0x200 * (ch), 8)
UNIPHIER_CLK_GATE("usb2" #ch, (idx), "usb2", 0x20 + 0x200 * (ch), 28)
UNIPHIER_CLK_GATE("usb2" #ch "-phy", (idx), "usb2", 0x20 + 0x200 * (ch), 29)
UNIPHIER_CLK_GATE("miodmac", 7, NULL, 0x20, 25),
UNIPHIER_CLK_GATE("uart" #ch, (idx), "uart", 0x24, 19 + (ch))
UNIPHIER_CLK_GATE("i2c-common", -1, "i2c", 0x20, 1)
UNIPHIER_CLK_GATE("i2c" #ch, (idx), "i2c-common", 0x24, 5 + (ch))
UNIPHIER_CLK_GATE("i2c" #ch, (idx), "i2c", 0x24, 24 + (ch))
UNIPHIER_CLK_GATE("scssi" #ch, (idx), "spi", 0x20, 17 + (ch))
UNIPHIER_CLK_GATE("mcssi", (idx), "spi", 0x24, 14)
UNIPHIER_CLK_GATE("ether-gb", 7, "gpll", 0x2104, 5),
UNIPHIER_CLK_GATE("ether-phy", 10, "ref", 0x2260, 0),
UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x2104, 18),
UNIPHIER_CLK_GATE("sata1", 29, NULL, 0x2104, 19),
UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x2108, 2),
UNIPHIER_CLK_GATE("usb30-hsphy0", 16, NULL, 0x2104, 19),
UNIPHIER_CLK_GATE("usb31-hsphy0", 20, NULL, 0x2104, 20),
UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x2104, 22),
UNIPHIER_CLK_GATE("usb30", 14, NULL, 0x210c, 14),
UNIPHIER_CLK_GATE("usb30-hsphy0", 16, NULL, 0x210c, 12),
UNIPHIER_CLK_GATE("usb30-hsphy1", 17, NULL, 0x210c, 13),
UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x210c, 4),
UNIPHIER_CLK_GATE("ether0", 6, NULL, 0x210c, 9),
UNIPHIER_CLK_GATE("ether1", 7, NULL, 0x210c, 10),
UNIPHIER_CLK_GATE("usb30", 12, NULL, 0x210c, 4), /* =GIO0 */
UNIPHIER_CLK_GATE("usb31-0", 13, NULL, 0x210c, 5), /* =GIO1 */
UNIPHIER_CLK_GATE("usb31-1", 14, NULL, 0x210c, 6), /* =GIO1-1 */
UNIPHIER_CLK_GATE("usb30-hsphy0", 16, NULL, 0x210c, 16),
UNIPHIER_CLK_GATE("usb30-ssphy0", 17, NULL, 0x210c, 18),
UNIPHIER_CLK_GATE("usb30-ssphy1", 18, NULL, 0x210c, 20),
UNIPHIER_CLK_GATE("usb31-hsphy0", 20, NULL, 0x210c, 17),
UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)
UNIPHIER_CLK_GATE("usb31-ssphy0", 21, NULL, 0x210c, 19),
UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x210c, 3),
UNIPHIER_CLK_GATE("sata0", 28, NULL, 0x210c, 7),
UNIPHIER_CLK_GATE("sata1", 29, NULL, 0x210c, 8),
UNIPHIER_CLK_GATE("sata-phy", 30, NULL, 0x210c, 21),
UNIPHIER_CLK_GATE("emmc", 4, NULL, 0x2108, 8),
UNIPHIER_CLK_GATE("ether", 6, NULL, 0x210c, 0),
UNIPHIER_CLK_GATE("usb30-0", 12, NULL, 0x210c, 16), /* =GIO */
UNIPHIER_CLK_GATE("usb30-1", 13, NULL, 0x210c, 20), /* =GIO1P */
UNIPHIER_CLK_GATE("usb30-hsphy0", 16, NULL, 0x210c, 24),
UNIPHIER_CLK_GATE("usb30-ssphy0", 17, NULL, 0x210c, 25),
UNIPHIER_CLK_GATE("usb30-ssphy1", 18, NULL, 0x210c, 26),
UNIPHIER_CLK_GATE("pcie", 24, NULL, 0x210c, 8),
UNIPHIER_CLK_GATE("voc", 52, NULL, 0x2110, 0),
UNIPHIER_CLK_GATE("hdmitx", 58, NULL, 0x2110, 8),
UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x2104, 2)
UNIPHIER_CLK_GATE("nand", (idx), "nand-50m", 0x210c, 0)
UNIPHIER_CLK_GATE("emmc", (idx), NULL, 0x210c, 2)
UNIPHIER_CLK_GATE("stdmac", (idx), NULL, 0x2104, 10)
UNIPHIER_CLK_GATE("stdmac", (idx), NULL, 0x210c, 8)
UNIPHIER_CLK_GATE("hsc", (idx), NULL, 0x210c, 9)
UNIPHIER_CLK_GATE("gio", (idx), NULL, 0x2104, 6)
UNIPHIER_CLK_GATE("usb3" #ch, (idx), NULL, 0x2104, 16 + (ch))
UNIPHIER_CLK_GATE("aio", (idx), "aio-io200m", 0x2104, 13)
UNIPHIER_CLK_GATE("aio", (idx), "aio-io200m", 0x2104, 13)
UNIPHIER_CLK_GATE("aio", (idx), "aio-io200m", 0x2108, 0)
UNIPHIER_CLK_GATE("evea", (idx), "evea-io100m", 0x2108, 1)
UNIPHIER_CLK_GATE("exiv", (idx), "exiv-io200m", 0x2110, 2)
UNIPHIER_CLK_GATE("ether", (idx), NULL, 0x2104, 12)
UNIPHIER_CLK_GATE("ether", (idx), NULL, 0x210c, 6)