UDC_EP0IN_IX
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
dev->ep[UDC_EP0IN_IX].naking = 0;
UDC_QUEUE_CNAK(&dev->ep[UDC_EP0IN_IX],
UDC_EP0IN_IX);
if (tmp != UDC_EP0IN_IX && tmp != UDC_EP0OUT_IX
usb_ep_set_maxpacket_limit(&dev->ep[UDC_EP0IN_IX].ep,
usb_ep_set_maxpacket_limit(&dev->ep[UDC_EP0IN_IX].ep,
dev->gadget.ep0 = &dev->ep[UDC_EP0IN_IX].ep;
dev->ep[UDC_EP0IN_IX].halted = 0;
ep_init(dev->regs, &dev->ep[UDC_EP0IN_IX]);
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
dev->ep[UDC_EP0IN_IX].in = 1;
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->bufin_framenum);
writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->bufin_framenum);
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->bufout_maxpkt);
writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->bufout_maxpkt);
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
dev->ep[UDC_EP0IN_IX].naking = 0;
UDC_QUEUE_CNAK(&dev->ep[UDC_EP0IN_IX], UDC_EP0IN_IX);
dev->ep[UDC_EP0IN_IX].ep.driver_data;
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
dev->ep[UDC_EP0IN_IX].naking = 1;
dev->gadget.ep0 = &dev->ep[UDC_EP0IN_IX].ep;
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
dev->ep[UDC_EP0IN_IX].naking = 0;
UDC_QUEUE_CNAK(&dev->ep[UDC_EP0IN_IX], UDC_EP0IN_IX);
writel(tmp, &dev->ep[UDC_EP0IN_IX].regs->ctl);
ep = &dev->ep[UDC_EP0IN_IX];
tmp = readl(&dev->ep[UDC_EP0IN_IX].regs->sts);
&dev->ep[UDC_EP0IN_IX].regs->sts);
&dev->ep[UDC_EP0IN_IX].regs->sts);
readl(&dev->ep[UDC_EP0IN_IX].regs->ctl);
&dev->ep[UDC_EP0IN_IX].regs->ctl);
&dev->ep[UDC_EP0IN_IX].regs->sts);
empty_req_queue(&dev->ep[UDC_EP0IN_IX]);
ep_init(dev->regs, &dev->ep[UDC_EP0IN_IX]);
empty_req_queue(&dev->ep[UDC_EP0IN_IX]);
ep_init(dev->regs, &dev->ep[UDC_EP0IN_IX]);
dev->ep[UDC_EP0IN_IX].dma = &dev->regs->ctl;
|| ep->num == UDC_EP0IN_IX) {