UASM_i_SW
UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame);
UASM_i_SW(&p, i, offsetof(struct pt_regs, regs[i]), GPR_K1);
UASM_i_SW(&p, GPR_V0, offsetof(struct pt_regs, cp0_status), GPR_K1);
UASM_i_SW(&p, GPR_SP, offsetof(struct kvm_vcpu_arch, host_stack), GPR_K1);
UASM_i_SW(&p, GPR_GP, offsetof(struct kvm_vcpu_arch, host_gp), GPR_K1);
UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, host_pgd), GPR_K1);
UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, host_entryhi),
UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu, arch.gprs[GPR_K0]), GPR_K1);
UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, gprs[GPR_K0]), GPR_K1);
UASM_i_SW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), GPR_K1);
UASM_i_SW(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, hi), GPR_K1);
UASM_i_SW(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, lo), GPR_K1);
UASM_i_SW(&p, GPR_T0, offsetof(struct kvm_vcpu_arch, gprs[GPR_K1]), GPR_K1);
UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, pc), GPR_K1);
UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, host_cp0_badvaddr),
UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame);
UASM_i_SW(p, scratch, scratchpad_offset(0), 0);
UASM_i_SW(p, scratch, scratchpad_offset(0), 0);
UASM_i_SW(&p, a0, uasm_rel_lo(pgdc), a2);
UASM_i_SW(&p, a0, uasm_rel_lo(pgdc), a2);
UASM_i_SW(p, pte, 0, ptr);
UASM_i_SW(p, 1, offsetof(struct tlb_reg_save, a), GPR_K0);
UASM_i_SW(p, 2, offsetof(struct tlb_reg_save, b), GPR_K0);
UASM_i_SW(p, pte, 0, ptr);