arch/mips/kvm/entry.c

115

UASM_i_MTC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]);

arch/mips/kvm/entry.c

119

UASM_i_MTC0(p, tmp, scratch_tmp[0], scratch_tmp[1]);

arch/mips/kvm/entry.c

136

UASM_i_MTC0(p, reg, C0_EBASE);

arch/mips/kvm/entry.c

181

UASM_i_MTC0(&p, GPR_A0, scratch_vcpu[0], scratch_vcpu[1]);

arch/mips/kvm/entry.c

247

UASM_i_MTC0(&p, GPR_T0, C0_EPC);

arch/mips/kvm/entry.c

271

UASM_i_MTC0(&p, GPR_A0, C0_PWBASE);

arch/mips/kvm/entry.c

394

UASM_i_MTC0(&p, GPR_K1, scratch_tmp[0], scratch_tmp[1]);

arch/mips/kvm/entry.c

480

UASM_i_MTC0(&p, GPR_K1, scratch_tmp[0], scratch_tmp[1]);

arch/mips/kvm/entry.c

637

UASM_i_MTC0(&p, GPR_K0, C0_ENTRYHI);

arch/mips/kvm/entry.c

652

UASM_i_MTC0(&p, GPR_A0, C0_PWBASE);

arch/mips/kvm/entry.c

793

UASM_i_MTC0(&p, GPR_S0, scratch_vcpu[0], scratch_vcpu[1]);

arch/mips/mm/tlbex.c

1005

UASM_i_MTC0(p, tmp, C0_ENTRYLO0);

arch/mips/mm/tlbex.c

1015

UASM_i_MTC0(p, tmp, C0_ENTRYLO1);

arch/mips/mm/tlbex.c

1031

UASM_i_MTC0(p, 0, C0_ENTRYLO0);

arch/mips/mm/tlbex.c

1032

UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */

arch/mips/mm/tlbex.c

1037

UASM_i_MTC0(p, 0, C0_ENTRYLO1);

arch/mips/mm/tlbex.c

1038

UASM_i_MTC0(p, ptep, C0_ENTRYLO1); /* load it */

arch/mips/mm/tlbex.c

1071

UASM_i_MTC0(p, scratch, c0_kscratch(), c0_scratch_reg);

arch/mips/mm/tlbex.c

1093

UASM_i_MTC0(p, scratch, c0_kscratch(), c0_scratch_reg);

arch/mips/mm/tlbex.c

1205

UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */

arch/mips/mm/tlbex.c

1209

UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */

arch/mips/mm/tlbex.c

1212

UASM_i_MTC0(p, odd, C0_ENTRYLO1); /* load it */

arch/mips/mm/tlbex.c

1566

UASM_i_MTC0(&p, a0, C0_CONTEXT);

arch/mips/mm/tlbex.c

1572

UASM_i_MTC0(&p, a0, C0_PWBASE);

arch/mips/mm/tlbex.c

1574

UASM_i_MTC0(&p, a0, c0_kscratch(), pgd_reg);

arch/mips/mm/tlbex.c

1593

UASM_i_MTC0(&p, a0, c0_kscratch(), pgd_reg);

arch/mips/mm/tlbex.c

339

UASM_i_MTC0(p, 1, c0_kscratch(), scratch_reg);

arch/mips/mm/tlbex.c

711

UASM_i_MTC0(p, pte, C0_ENTRYLO0); /* load it */

arch/mips/mm/tlbex.c

718

UASM_i_MTC0(p, pte, C0_ENTRYLO1); /* load it */

arch/mips/mm/tlbex.c

739

UASM_i_MTC0(p, ptr, C0_ENTRYHI);

arch/mips/mm/tlbex.c

743

UASM_i_MTC0(p, ptr, C0_ENTRYHI);