UART_RSA_BASE

22

unsigned long start = UART_RSA_BASE << port->regshift;

40

unsigned long offset = UART_RSA_BASE << port->regshift;

298

#define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */

305

#define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register */

313

#define UART_RSA_SRR ((UART_RSA_BASE) + 2) /* IN: Status Read Register */

324

#define UART_RSA_FRR ((UART_RSA_BASE) + 2) /* OUT: FIFO Reset Register */

326

#define UART_RSA_TIVSR ((UART_RSA_BASE) + 3) /* I/O: Timer Interval Value Set Register */

328

#define UART_RSA_TCR ((UART_RSA_BASE) + 4) /* OUT: Timer Control Register */