UART_MSR_RI
if (info->ri_latch ^ (msr & UART_MSR_RI)) {
info->ri_latch = msr & UART_MSR_RI;
& UART_MSR_RI;
if (status & UART_MSR_RI)
msr = regs[UART_MSR] & (UART_MSR_DCD | UART_MSR_RI
((msr & UART_MSR_RI) ? TIOCM_RNG : 0) |
if (msr & UART_MSR_RI)
data->msr_mask_off |= UART_MSR_RI;
if (msignals & UART_MSR_RI)
ch->ch_mistat |= UART_MSR_RI;
ch->ch_mistat &= ~UART_MSR_RI;
!!((ch->ch_mistat | ch->ch_mostat) & UART_MSR_RI),
if (msignals & UART_MSR_RI)
ch->ch_mistat |= UART_MSR_RI;
ch->ch_mistat &= ~UART_MSR_RI;
!!((ch->ch_mistat | ch->ch_mostat) & UART_MSR_RI),
if (mstat & UART_MSR_RI)
if (status & UART_MSR_RI)
if (modem & UART_MSR_RI)
if (status & UART_MSR_RI)
if (status & UART_MSR_RI)
(status & UART_MSR_RI ? TIOCM_RI : 0) |
(msr & UART_MSR_RI ? TIOCM_RI : 0) |
(msr & UART_MSR_RI ? TIOCM_RI : 0) |
msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
| ((msr & UART_MSR_RI) ? TIOCM_RI : 0) /* 0x080 */
((msr & UART_MSR_RI) ? TIOCM_RI : 0) | /* 0x080 */
(d[1] & UART_MSR_RI ? TIOCM_RI : 0) |
(d[1] & UART_MSR_RI ? TIOCM_RI : 0) |
UART_MSR_RI | \