UART_MSR_DCD
.signal_pin = UART_MSR_DCD,
.signal_pin = UART_MSR_DCD,
if (status & UART_MSR_DCD)
if (status & UART_MSR_DCD)
msr = regs[UART_MSR] & (UART_MSR_DCD | UART_MSR_RI
return (msr == (UART_MSR_DCD | UART_MSR_CTS));
((msr & UART_MSR_DCD) ? TIOCM_CAR : 0) |
return inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD;
if (msr & UART_MSR_DCD)
if (msr & UART_MSR_DCD)
data->msr_mask_on |= UART_MSR_DCD;
if (status1 != (UART_MSR_DCD | UART_MSR_CTS)) {
uart_handle_dcd_change(port, status & UART_MSR_DCD);
uart_handle_dcd_change(&ch->uart_port, msignals & UART_MSR_DCD);
if (msignals & UART_MSR_DCD)
ch->ch_mistat |= UART_MSR_DCD;
ch->ch_mistat &= ~UART_MSR_DCD;
!!((ch->ch_mistat | ch->ch_mostat) & UART_MSR_DCD));
uart_handle_dcd_change(&ch->uart_port, msignals & UART_MSR_DCD);
if (msignals & UART_MSR_DCD)
ch->ch_mistat |= UART_MSR_DCD;
ch->ch_mistat &= ~UART_MSR_DCD;
!!((ch->ch_mistat | ch->ch_mostat) & UART_MSR_DCD));
if (mstat & UART_MSR_DCD)
if (ch->ch_mistat & UART_MSR_DCD) {
ch->ch_mistat, ch->ch_mistat & UART_MSR_DCD);
(&up->port, status & UART_MSR_DCD);
if (status & UART_MSR_DCD)
if (modem & UART_MSR_DCD)
uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
if (status & UART_MSR_DCD)
uart_handle_dcd_change(&tup->uport, msr & UART_MSR_DCD);
uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
if (status & UART_MSR_DCD)
(status & UART_MSR_DCD ? TIOCM_CD : 0) |
current_msr & UART_MSR_DCD);
(msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
if (msr & UART_MSR_DCD)
usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
(msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
| ((msr & UART_MSR_DCD) ? TIOCM_CAR : 0) /* 0x040 */
if (rcv_msr_hold & UART_MSR_DCD) {
mxport->msr_state |= UART_MSR_DCD;
mxport->msr_state &= ~UART_MSR_DCD;
((msr & UART_MSR_DCD) ? TIOCM_CAR : 0) | /* 0x040 */
(d[1] & UART_MSR_DCD ? TIOCM_CAR : 0) |
(d[1] & UART_MSR_DCD ? TIOCM_CAR : 0) |
#define UART_MSR_STATUS_BITS (UART_MSR_DCD | \
*buf = UART_MSR_DSR | UART_MSR_DDSR | UART_MSR_DCD;