UART_IIR
if (offset == UART_IIR) {
tmp = readl(p->membase + (UART_IIR & ~3));
(void) in_8(avr_addr + UART_IIR);
inb(speakup_info.port_tts + UART_IIR);
iir = inb(iobase + UART_IIR) & UART_IIR_ID;
iir = inb(iobase + UART_IIR) & UART_IIR_ID;
if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
} while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
sinp(UART_IIR);
sinp(UART_IIR);
sinp(UART_IIR);
iir = sdio_in(port, UART_IIR);
(void) sdio_in(port, UART_IIR);
iir = inb(port->ioaddr + UART_IIR);
(void) inb(info->ioaddr + UART_IIR);
(void) inb(info->ioaddr + UART_IIR);
iir = serial_port_in(port, UART_IIR);
unsigned int iir = serial_port_in(p, UART_IIR);
if (offset != UART_IIR || !(ret & UART_IIR_NO_INT))
iir = serial_in(up, UART_IIR);
unsigned int iir = serial_port_in(p, UART_IIR);
case UART_IIR: /* IIR @ 0x08 */
iir = serial_port_in(port, UART_IIR);
ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
serial_in(up, UART_IIR);
serial_in(up, UART_IIR);
iir = serial_port_in(port, UART_IIR);
iir = serial_port_in(port, UART_IIR);
serial_in(up, UART_IIR);
status1 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750;
status2 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750;
switch (serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED) {
iir = serial_port_in(port, UART_IIR);
unsigned int iir = serial_port_in(port, UART_IIR);
iir = serial_port_in(port, UART_IIR);
iir_noint1 = serial_port_in(port, UART_IIR) & UART_IIR_NO_INT;
iir_noint2 = serial_port_in(port, UART_IIR) & UART_IIR_NO_INT;
iir_noint = serial_port_in(port, UART_IIR) & UART_IIR_NO_INT;
serial_port_in(port, UART_IIR);
status1 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750;
[UART_IIR] = 3,
iir = serial_in(up, UART_IIR);
(void) serial_in(up, UART_IIR);
"IIR: \t0x%02x\n", ioread8(priv->membase + UART_IIR));
return ioread8(priv->membase + UART_IIR) &\
iir = serial_in(up, UART_IIR);
(void) serial_in(up, UART_IIR);
(void) serial_in(up, UART_IIR);
iir = tegra_uart_read(tup, UART_IIR);
iir = tegra_uart_read(tup, UART_IIR);
scratch = serial_in(up, UART_IIR) >> 6;
scratch = serial_in(up, UART_IIR) >> 5;
scratch = serial_in(up, UART_IIR) >> 5;
} while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
(void) serial_in(up, UART_IIR);
(void) serial_in(up, UART_IIR);
case UART_IIR:
inb(uart->base + UART_IIR);
if ((inb(uart->base + UART_IIR) & 0xf0) == 0xc0)
inb(uart->base + UART_IIR); /* Clear any pre-existing transmit interrupt */
inb(uart->base + UART_IIR); /* Clear any outstanding interrupts */