UART_CTRL
ctl = readl(port->membase + UART_CTRL(port));
writel(ctl, port->membase + UART_CTRL(port));
ctl = readl(port->membase + UART_CTRL(port));
writel(ctl, port->membase + UART_CTRL(port));
port->membase + UART_CTRL(port));
writel(CTRL_BRK_INT, port->membase + UART_CTRL(port));
ier = readl(port->membase + UART_CTRL(port)) & CTRL_BRK_INT;
writel(0, port->membase + UART_CTRL(port));
writel(ier, port->membase + UART_CTRL(port));
mvuart->pm_regs.ctrl = readl(port->membase + UART_CTRL(port));
writel(mvuart->pm_regs.ctrl, port->membase + UART_CTRL(port));
writel(CTRL_SOFT_RST, port->membase + UART_CTRL(port));
writel(0, port->membase + UART_CTRL(port));