arch/arm/mach-orion5x/kurobox_pro-setup.c

191

while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) {

arch/arm/mach-orion5x/kurobox_pro-setup.c

199

buf[i] = readl(UART1_REG(RX));

arch/arm/mach-orion5x/kurobox_pro-setup.c

211

while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE))

arch/arm/mach-orion5x/kurobox_pro-setup.c

213

writel(buf[i++], UART1_REG(TX));

arch/arm/mach-orion5x/kurobox_pro-setup.c

297

writel(0x83, UART1_REG(LCR));

arch/arm/mach-orion5x/kurobox_pro-setup.c

298

writel(divisor & 0xff, UART1_REG(DLL));

arch/arm/mach-orion5x/kurobox_pro-setup.c

299

writel((divisor >> 8) & 0xff, UART1_REG(DLM));

arch/arm/mach-orion5x/kurobox_pro-setup.c

300

writel(0x1b, UART1_REG(LCR));

arch/arm/mach-orion5x/kurobox_pro-setup.c

301

writel(0x00, UART1_REG(IER));

arch/arm/mach-orion5x/kurobox_pro-setup.c

302

writel(0x07, UART1_REG(FCR));

arch/arm/mach-orion5x/kurobox_pro-setup.c

303

writel(0x00, UART1_REG(MCR));

arch/arm/mach-orion5x/terastation_pro2-setup.c

169

while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) {

arch/arm/mach-orion5x/terastation_pro2-setup.c

177

buf[i] = readl(UART1_REG(RX));

arch/arm/mach-orion5x/terastation_pro2-setup.c

189

while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE))

arch/arm/mach-orion5x/terastation_pro2-setup.c

191

writel(buf[i++], UART1_REG(TX));

arch/arm/mach-orion5x/terastation_pro2-setup.c

275

writel(0x83, UART1_REG(LCR));

arch/arm/mach-orion5x/terastation_pro2-setup.c

276

writel(divisor & 0xff, UART1_REG(DLL));

arch/arm/mach-orion5x/terastation_pro2-setup.c

277

writel((divisor >> 8) & 0xff, UART1_REG(DLM));

arch/arm/mach-orion5x/terastation_pro2-setup.c

278

writel(0x1b, UART1_REG(LCR));

arch/arm/mach-orion5x/terastation_pro2-setup.c

279

writel(0x00, UART1_REG(IER));

arch/arm/mach-orion5x/terastation_pro2-setup.c

280

writel(0x07, UART1_REG(FCR));

arch/arm/mach-orion5x/terastation_pro2-setup.c

281

writel(0x00, UART1_REG(MCR));

arch/arm/mach-orion5x/tsx09-common.c

32

writel(0x83, UART1_REG(LCR));

arch/arm/mach-orion5x/tsx09-common.c

33

writel(divisor & 0xff, UART1_REG(DLL));

arch/arm/mach-orion5x/tsx09-common.c

34

writel((divisor >> 8) & 0xff, UART1_REG(DLM));

arch/arm/mach-orion5x/tsx09-common.c

35

writel(0x03, UART1_REG(LCR));

arch/arm/mach-orion5x/tsx09-common.c

36

writel(0x00, UART1_REG(IER));

arch/arm/mach-orion5x/tsx09-common.c

37

writel(0x00, UART1_REG(FCR));

arch/arm/mach-orion5x/tsx09-common.c

38

writel(0x00, UART1_REG(MCR));

arch/arm/mach-orion5x/tsx09-common.c

41

writel('A', UART1_REG(TX));

drivers/power/reset/qnap-poweroff.c

60

writel(0x83, UART1_REG(LCR));

drivers/power/reset/qnap-poweroff.c

61

writel(divisor & 0xff, UART1_REG(DLL));

drivers/power/reset/qnap-poweroff.c

62

writel((divisor >> 8) & 0xff, UART1_REG(DLM));

drivers/power/reset/qnap-poweroff.c

63

writel(0x03, UART1_REG(LCR));

drivers/power/reset/qnap-poweroff.c

64

writel(0x00, UART1_REG(IER));

drivers/power/reset/qnap-poweroff.c

65

writel(0x00, UART1_REG(FCR));

drivers/power/reset/qnap-poweroff.c

66

writel(0x00, UART1_REG(MCR));

drivers/power/reset/qnap-poweroff.c

69

writel(cfg->cmd, UART1_REG(TX));