U3D_EP0CSR
csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR);
mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr);
value = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
mtu3_writel(mbase, U3D_EP0CSR, value | EP0_SETUPPKTRDY | EP0_DATAEND);
readl_poll_timeout_atomic(mbase + U3D_EP0CSR, value,
csr = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS;
mtu3_writel(mbase, U3D_EP0CSR, csr);
csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr | EP0_TXPKTRDY);
mtu3_readl(mtu->mac_base, U3D_EP0CSR));
csr = mtu3_readl(mtu->mac_base, U3D_EP0CSR) & EP0_W1C_BITS;
mtu3_writel(mtu->mac_base, U3D_EP0CSR,
mtu3_writel(mtu->mac_base, U3D_EP0CSR,
csr = mtu3_readl(mbase, U3D_EP0CSR);
csr = mtu3_readl(mbase, U3D_EP0CSR);
mtu3_writel(mbase, U3D_EP0CSR,