TSC_DIVISOR
native_wrmsrq(MSR_IA32_TSC_DEADLINE, tsc + (((u64) delta) * TSC_DIVISOR));
clockevents_config_and_register(levt, tsc_khz * (1000 / TSC_DIVISOR), 0xF, ~0UL);
clockevents_update_freq(levt, tsc_khz * (1000 / TSC_DIVISOR));