Symbol: TXE
drivers/accel/habanalabs/gaudi/gaudi.c
7317
case TXE:
drivers/infiniband/hw/hfi1/chip.h
48
#define TXE_PIO_SEND (TXE + TXE_PIO_SEND_OFFSET)
drivers/infiniband/hw/hfi1/chip_registers.h
1000
#define SEND_DMA_LEN_GEN (TXE + 0x000000200018)
drivers/infiniband/hw/hfi1/chip_registers.h
1003
#define SEND_DMA_MEMORY (TXE + 0x0000002000B0)
drivers/infiniband/hw/hfi1/chip_registers.h
1006
#define SEND_DMA_MEM_SIZE (TXE + 0x000000000028)
drivers/infiniband/hw/hfi1/chip_registers.h
1007
#define SEND_DMA_PRIORITY_THLD (TXE + 0x000000200038)
drivers/infiniband/hw/hfi1/chip_registers.h
1008
#define SEND_DMA_RELOAD_CNT (TXE + 0x000000200048)
drivers/infiniband/hw/hfi1/chip_registers.h
1009
#define SEND_DMA_STATUS (TXE + 0x000000200008)
drivers/infiniband/hw/hfi1/chip_registers.h
1012
#define SEND_DMA_TAIL (TXE + 0x000000200020)
drivers/infiniband/hw/hfi1/chip_registers.h
1013
#define SEND_EGRESS_CTXT_STATUS (TXE + 0x000000000800)
drivers/infiniband/hw/hfi1/chip_registers.h
1018
#define SEND_EGRESS_ERR_CLEAR (TXE + 0x000000000090)
drivers/infiniband/hw/hfi1/chip_registers.h
1019
#define SEND_EGRESS_ERR_INFO (TXE + 0x000000000F00)
drivers/infiniband/hw/hfi1/chip_registers.h
1039
#define SEND_EGRESS_ERR_MASK (TXE + 0x000000000088)
drivers/infiniband/hw/hfi1/chip_registers.h
1040
#define SEND_EGRESS_ERR_SOURCE (TXE + 0x000000000F08)
drivers/infiniband/hw/hfi1/chip_registers.h
1041
#define SEND_EGRESS_ERR_STATUS (TXE + 0x000000000080)
drivers/infiniband/hw/hfi1/chip_registers.h
1151
#define SEND_EGRESS_SEND_DMA_STATUS (TXE + 0x000000000E00)
drivers/infiniband/hw/hfi1/chip_registers.h
1155
#define SEND_ERR_CLEAR (TXE + 0x0000000000F0)
drivers/infiniband/hw/hfi1/chip_registers.h
1156
#define SEND_ERR_MASK (TXE + 0x0000000000E8)
drivers/infiniband/hw/hfi1/chip_registers.h
1157
#define SEND_ERR_STATUS (TXE + 0x0000000000E0)
drivers/infiniband/hw/hfi1/chip_registers.h
1161
#define SEND_HIGH_PRIORITY_LIMIT (TXE + 0x000000000030)
drivers/infiniband/hw/hfi1/chip_registers.h
1164
#define SEND_HIGH_PRIORITY_LIST (TXE + 0x000000000180)
drivers/infiniband/hw/hfi1/chip_registers.h
1165
#define SEND_LEN_CHECK0 (TXE + 0x0000000000D0)
drivers/infiniband/hw/hfi1/chip_registers.h
1168
#define SEND_LEN_CHECK1 (TXE + 0x0000000000D8)
drivers/infiniband/hw/hfi1/chip_registers.h
1173
#define SEND_LOW_PRIORITY_LIST (TXE + 0x000000000100)
drivers/infiniband/hw/hfi1/chip_registers.h
1178
#define SEND_PIO_ERR_CLEAR (TXE + 0x000000000050)
drivers/infiniband/hw/hfi1/chip_registers.h
1180
#define SEND_PIO_ERR_MASK (TXE + 0x000000000048)
drivers/infiniband/hw/hfi1/chip_registers.h
1181
#define SEND_PIO_ERR_STATUS (TXE + 0x000000000040)
drivers/infiniband/hw/hfi1/chip_registers.h
1222
#define SEND_PIO_INIT_CTXT (TXE + 0x000000000038)
drivers/infiniband/hw/hfi1/chip_registers.h
1229
#define SEND_PIO_MEM_SIZE (TXE + 0x000000000020)
drivers/infiniband/hw/hfi1/chip_registers.h
1230
#define SEND_SC2VLT0 (TXE + 0x0000000000B0)
drivers/infiniband/hw/hfi1/chip_registers.h
1239
#define SEND_SC2VLT1 (TXE + 0x0000000000B8)
drivers/infiniband/hw/hfi1/chip_registers.h
1248
#define SEND_SC2VLT2 (TXE + 0x0000000000C0)
drivers/infiniband/hw/hfi1/chip_registers.h
1257
#define SEND_SC2VLT3 (TXE + 0x0000000000C8)
drivers/infiniband/hw/hfi1/chip_registers.h
1266
#define SEND_STATIC_RATE_CONTROL (TXE + 0x0000000000A8)
drivers/infiniband/hw/hfi1/chip_registers.h
1291
#define SEND_DMA_IDLE_CNT (TXE + 0x000000200040)
drivers/infiniband/hw/hfi1/chip_registers.h
1292
#define SEND_DMA_DESC_FETCHED_CNT (TXE + 0x000000200058)
drivers/infiniband/hw/hfi1/chip_registers.h
778
#define SEND_BTH_QP (TXE + 0x0000000000A0)
drivers/infiniband/hw/hfi1/chip_registers.h
781
#define SEND_CM_CREDIT_USED_STATUS (TXE + 0x000000000510)
drivers/infiniband/hw/hfi1/chip_registers.h
800
#define SEND_CM_CREDIT_VL (TXE + 0x000000000600)
drivers/infiniband/hw/hfi1/chip_registers.h
801
#define SEND_CM_CREDIT_VL15 (TXE + 0x000000000678)
drivers/infiniband/hw/hfi1/chip_registers.h
809
#define SEND_CM_CTRL (TXE + 0x000000000500)
drivers/infiniband/hw/hfi1/chip_registers.h
812
#define SEND_CM_GLOBAL_CREDIT (TXE + 0x000000000508)
drivers/infiniband/hw/hfi1/chip_registers.h
823
#define SEND_CM_LOCAL_AU_TABLE0_TO3 (TXE + 0x000000000520)
drivers/infiniband/hw/hfi1/chip_registers.h
828
#define SEND_CM_LOCAL_AU_TABLE4_TO7 (TXE + 0x000000000528)
drivers/infiniband/hw/hfi1/chip_registers.h
833
#define SEND_CM_REMOTE_AU_TABLE0_TO3 (TXE + 0x000000000530)
drivers/infiniband/hw/hfi1/chip_registers.h
834
#define SEND_CM_REMOTE_AU_TABLE4_TO7 (TXE + 0x000000000538)
drivers/infiniband/hw/hfi1/chip_registers.h
835
#define SEND_CM_TIMER_CTRL (TXE + 0x000000000518)
drivers/infiniband/hw/hfi1/chip_registers.h
836
#define SEND_CONTEXTS (TXE + 0x000000000010)
drivers/infiniband/hw/hfi1/chip_registers.h
837
#define SEND_CONTEXT_SET_CTRL (TXE + 0x000000000200)
drivers/infiniband/hw/hfi1/chip_registers.h
838
#define SEND_COUNTER_ARRAY32 (TXE + 0x000000000300)
drivers/infiniband/hw/hfi1/chip_registers.h
839
#define SEND_COUNTER_ARRAY64 (TXE + 0x000000000400)
drivers/infiniband/hw/hfi1/chip_registers.h
840
#define SEND_CTRL (TXE + 0x000000000000)
drivers/infiniband/hw/hfi1/chip_registers.h
848
#define SEND_CTXT_CHECK_ENABLE (TXE + 0x000000100080)
drivers/infiniband/hw/hfi1/chip_registers.h
877
#define SEND_CTXT_CHECK_JOB_KEY (TXE + 0x000000100090)
drivers/infiniband/hw/hfi1/chip_registers.h
882
#define SEND_CTXT_CHECK_OPCODE (TXE + 0x0000001000A8)
drivers/infiniband/hw/hfi1/chip_registers.h
885
#define SEND_CTXT_CHECK_PARTITION_KEY (TXE + 0x000000100098)
drivers/infiniband/hw/hfi1/chip_registers.h
888
#define SEND_CTXT_CHECK_SLID (TXE + 0x0000001000A0)
drivers/infiniband/hw/hfi1/chip_registers.h
893
#define SEND_CTXT_CHECK_VL (TXE + 0x000000100088)
drivers/infiniband/hw/hfi1/chip_registers.h
894
#define SEND_CTXT_CREDIT_CTRL (TXE + 0x000000100010)
drivers/infiniband/hw/hfi1/chip_registers.h
900
#define SEND_CTXT_CREDIT_STATUS (TXE + 0x000000100018)
drivers/infiniband/hw/hfi1/chip_registers.h
904
#define SEND_CTXT_CREDIT_FORCE (TXE + 0x000000100028)
drivers/infiniband/hw/hfi1/chip_registers.h
906
#define SEND_CTXT_CREDIT_RETURN_ADDR (TXE + 0x000000100020)
drivers/infiniband/hw/hfi1/chip_registers.h
908
#define SEND_CTXT_CTRL (TXE + 0x000000100000)
drivers/infiniband/hw/hfi1/chip_registers.h
914
#define SEND_CTXT_ERR_CLEAR (TXE + 0x000000100050)
drivers/infiniband/hw/hfi1/chip_registers.h
915
#define SEND_CTXT_ERR_MASK (TXE + 0x000000100048)
drivers/infiniband/hw/hfi1/chip_registers.h
916
#define SEND_CTXT_ERR_STATUS (TXE + 0x000000100040)
drivers/infiniband/hw/hfi1/chip_registers.h
922
#define SEND_CTXT_STATUS (TXE + 0x000000100008)
drivers/infiniband/hw/hfi1/chip_registers.h
924
#define SEND_DMA_BASE_ADDR (TXE + 0x000000200010)
drivers/infiniband/hw/hfi1/chip_registers.h
925
#define SEND_DMA_CHECK_ENABLE (TXE + 0x000000200080)
drivers/infiniband/hw/hfi1/chip_registers.h
946
#define SEND_DMA_CHECK_JOB_KEY (TXE + 0x000000200090)
drivers/infiniband/hw/hfi1/chip_registers.h
947
#define SEND_DMA_CHECK_OPCODE (TXE + 0x0000002000A8)
drivers/infiniband/hw/hfi1/chip_registers.h
948
#define SEND_DMA_CHECK_PARTITION_KEY (TXE + 0x000000200098)
drivers/infiniband/hw/hfi1/chip_registers.h
949
#define SEND_DMA_CHECK_SLID (TXE + 0x0000002000A0)
drivers/infiniband/hw/hfi1/chip_registers.h
954
#define SEND_DMA_CHECK_VL (TXE + 0x000000200088)
drivers/infiniband/hw/hfi1/chip_registers.h
955
#define SEND_DMA_CTRL (TXE + 0x000000200000)
drivers/infiniband/hw/hfi1/chip_registers.h
960
#define SEND_DMA_DESC_CNT (TXE + 0x000000200050)
drivers/infiniband/hw/hfi1/chip_registers.h
963
#define SEND_DMA_ENG_ERR_CLEAR (TXE + 0x000000200070)
drivers/infiniband/hw/hfi1/chip_registers.h
966
#define SEND_DMA_ENG_ERR_MASK (TXE + 0x000000200068)
drivers/infiniband/hw/hfi1/chip_registers.h
967
#define SEND_DMA_ENG_ERR_STATUS (TXE + 0x000000200060)
drivers/infiniband/hw/hfi1/chip_registers.h
990
#define SEND_DMA_ENGINES (TXE + 0x000000000018)
drivers/infiniband/hw/hfi1/chip_registers.h
991
#define SEND_DMA_ERR_CLEAR (TXE + 0x000000000070)
drivers/infiniband/hw/hfi1/chip_registers.h
992
#define SEND_DMA_ERR_MASK (TXE + 0x000000000068)
drivers/infiniband/hw/hfi1/chip_registers.h
993
#define SEND_DMA_ERR_STATUS (TXE + 0x000000000060)
drivers/infiniband/hw/hfi1/chip_registers.h
998
#define SEND_DMA_HEAD (TXE + 0x000000200028)
drivers/infiniband/hw/hfi1/chip_registers.h
999
#define SEND_DMA_HEAD_ADDR (TXE + 0x000000200030)