drivers/gpu/drm/i915/display/icl_dsi.c

1052

intel_de_rmw(display, TRANSCONF(display, dsi_trans), 0,

drivers/gpu/drm/i915/display/icl_dsi.c

1056

if (intel_de_wait_for_set_ms(display, TRANSCONF(display, dsi_trans),

drivers/gpu/drm/i915/display/icl_dsi.c

1321

intel_de_rmw(display, TRANSCONF(display, dsi_trans),

drivers/gpu/drm/i915/display/icl_dsi.c

1325

if (intel_de_wait_for_clear_ms(display, TRANSCONF(display, dsi_trans),

drivers/gpu/drm/i915/display/icl_dsi.c

1757

tmp = intel_de_read(display, TRANSCONF(display, dsi_trans));

drivers/gpu/drm/i915/display/intel_crt.c

734

TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_crt.c

736

intel_de_write(display, TRANSCONF(display, cpu_transcoder),

drivers/gpu/drm/i915/display/intel_crt.c

739

TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_crt.c

750

intel_de_write(display, TRANSCONF(display, cpu_transcoder),

drivers/gpu/drm/i915/display/intel_display.c

2866

TRANSCONF(display, cpu_transcoder)) & TRANSCONF_INTERLACE_MASK_HSW;

drivers/gpu/drm/i915/display/intel_display.c

2869

TRANSCONF(display, cpu_transcoder)) & TRANSCONF_INTERLACE_MASK;

drivers/gpu/drm/i915/display/intel_display.c

3035

intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);

drivers/gpu/drm/i915/display/intel_display.c

3036

intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

3080

tmp = intel_de_read(display, TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

3231

intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);

drivers/gpu/drm/i915/display/intel_display.c

3232

intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

3262

intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);

drivers/gpu/drm/i915/display/intel_display.c

3263

intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

3424

tmp = intel_de_read(display, TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

358

if (intel_de_wait_for_clear_ms(display, TRANSCONF(display, cpu_transcoder),

drivers/gpu/drm/i915/display/intel_display.c

381

TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

3907

TRANSCONF(display, pipe_config->cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

4022

TRANSCONF(display, pipe_config->cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

470

val = intel_de_read(display, TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

485

intel_de_write(display, TRANSCONF(display, cpu_transcoder),

drivers/gpu/drm/i915/display/intel_display.c

487

intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

516

val = intel_de_read(display, TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/intel_display.c

536

intel_de_write(display, TRANSCONF(display, cpu_transcoder), val);

drivers/gpu/drm/i915/display/intel_display.c

8422

intel_de_write(display, TRANSCONF(display, pipe), TRANSCONF_ENABLE);

drivers/gpu/drm/i915/display/intel_display.c

8423

intel_de_posting_read(display, TRANSCONF(display, pipe));

drivers/gpu/drm/i915/display/intel_display.c

8446

intel_de_write(display, TRANSCONF(display, pipe), 0);

drivers/gpu/drm/i915/display/intel_display.c

8447

intel_de_posting_read(display, TRANSCONF(display, pipe));

drivers/gpu/drm/i915/display/intel_display_power_well.c

1148

if ((intel_de_read(display, TRANSCONF(display, PIPE_A)) & TRANSCONF_ENABLE) == 0)

drivers/gpu/drm/i915/display/intel_display_power_well.c

1150

if ((intel_de_read(display, TRANSCONF(display, PIPE_B)) & TRANSCONF_ENABLE) == 0)

drivers/gpu/drm/i915/display/intel_display_power_well.c

1164

return intel_de_read(display, TRANSCONF(display, PIPE_A)) & TRANSCONF_ENABLE &&

drivers/gpu/drm/i915/display/intel_display_power_well.c

1165

intel_de_read(display, TRANSCONF(display, PIPE_B)) & TRANSCONF_ENABLE;

drivers/gpu/drm/i915/display/intel_drrs.c

91

intel_de_rmw(display, TRANSCONF(display, cpu_transcoder),

drivers/gpu/drm/i915/display/intel_fdi.c

1007

temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11;

drivers/gpu/drm/i915/display/intel_fdi.c

1062

temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11;

drivers/gpu/drm/i915/display/intel_fdi.c

1088

temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11;

drivers/gpu/drm/i915/display/intel_pch_display.c

276

pipeconf_val = intel_de_read(display, TRANSCONF(display, pipe));

drivers/gpu/drm/i915/display/intel_pch_display.c

418

u32 bpc = (intel_de_read(display, TRANSCONF(display, pipe))

drivers/gpu/drm/i915/display/intel_pch_display.c

566

TRANSCONF(display, cpu_transcoder));

drivers/gpu/drm/i915/display/vlv_dsi.c

971

TRANSCONF(display, PIPE_B)) & TRANSCONF_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

203

vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) &=

drivers/gpu/drm/i915/gvt/display.c

264

vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

265

vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_STATE_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

525

vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

77

if (!(vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_EDP)) & TRANSCONF_ENABLE))

drivers/gpu/drm/i915/gvt/display.c

94

if (vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) & TRANSCONF_ENABLE)

drivers/gpu/drm/i915/gvt/handlers.c

2299

MMIO_DH(TRANSCONF(display, TRANSCODER_A), D_ALL, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2301

MMIO_DH(TRANSCONF(display, TRANSCODER_B), D_ALL, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2303

MMIO_DH(TRANSCONF(display, TRANSCODER_C), D_ALL, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2305

MMIO_DH(TRANSCONF(display, TRANSCODER_EDP), D_ALL, NULL,

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

149

MMIO_D(TRANSCONF(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

150

MMIO_D(TRANSCONF(display, TRANSCODER_B));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

151

MMIO_D(TRANSCONF(display, TRANSCODER_C));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

152

MMIO_D(TRANSCONF(display, TRANSCODER_EDP));