BLK_CONTROL
get_values_from_reg(c->reg, BLK_CONTROL, 1, &v);
malidp_write32_mask(reg, BLK_CONTROL, mask, ctrl);
malidp_write32_mask(c->reg, BLK_CONTROL, BS_CTRL_EN, 0);
malidp_write32(reg, BLK_CONTROL, value);
malidp_write32_mask(c->reg, BLK_CONTROL, L_EN, 0);
malidp_write32_mask(reg, BLK_CONTROL, ctrl_mask, ctrl);
malidp_write32_mask(reg, BLK_CONTROL, mask, ctrl);
malidp_write32_mask(c->reg, BLK_CONTROL, L_EN, 0);
malidp_write32(reg, BLK_CONTROL, 0);
malidp_write32(reg, BLK_CONTROL, ctrl);
malidp_write32(c->reg, BLK_CONTROL, 0);
malidp_write32(reg, BLK_CONTROL, BLK_CTRL_EN);
get_values_from_reg(c->reg, BLK_CONTROL, 3, v);
malidp_write32(reg, BLK_CONTROL, BLK_CTRL_EN);
malidp_write32_mask(d71->gcu_addr, BLK_CONTROL, 0x7, opmode);
ret = dp_wait_cond(((malidp_read32(d71->gcu_addr, BLK_CONTROL) & 0x7) == opmode),
malidp_write32(gcu, BLK_CONTROL, GCU_CONTROL_SRST);
ret = dp_wait_cond(!(malidp_read32(gcu, BLK_CONTROL) & GCU_CONTROL_SRST),
malidp_write32_mask(reg, BLK_CONTROL, 0x7, TBU_CONNECT_MODE);
malidp_write32_mask(reg, BLK_CONTROL, 0x7, INACTIVE_MODE);
malidp_write32_mask(reg, BLK_CONTROL, 0x7, TBU_DISCONNECT_MODE);
malidp_write32_mask(reg, BLK_CONTROL, 0x7, INACTIVE_MODE);