TRIGGER
ret = REGB_POLL_FLD(VPU_HW_BTRS_MTL_VPU_IP_RESET, TRIGGER, 0, TIMEOUT_US);
val = REG_SET_FLD(VPU_HW_BTRS_MTL_VPU_IP_RESET, TRIGGER, val);
ret = REGB_POLL_FLD(VPU_HW_BTRS_MTL_VPU_IP_RESET, TRIGGER, 0, TIMEOUT_US);
ret = REGB_POLL_FLD(VPU_HW_BTRS_LNL_IP_RESET, TRIGGER, 0, TIMEOUT_US);
val = REG_SET_FLD(VPU_HW_BTRS_LNL_IP_RESET, TRIGGER, val);
ret = REGB_POLL_FLD(VPU_HW_BTRS_LNL_IP_RESET, TRIGGER, 0, TIMEOUT_US);
trigger_time = spk_get_var(TRIGGER);
{ TRIGGER, .u.n = {NULL, 20, 10, 2000, 0, 0, NULL } },
{ "trigger_time", TRIGGER, VAR_TIME, NULL, NULL },
.trig = TRIGGER(0x0afc, 11),
.trig = TRIGGER(0x0afc, 2),
.trig = TRIGGER(0x0afc, 3),
.trig = TRIGGER(0x0afc, 4),
.trig = TRIGGER(0x0afc, 23),
.trig = TRIGGER(0x0afc, 24),
.trig = TRIGGER(0x0afc, 18),
.trig = TRIGGER(0x0afc, 19),
.trig = TRIGGER(0x0a40, 4),
.trig = TRIGGER(0x0afc, 9),
.trig = TRIGGER(0x0afc, 10),
.trig = TRIGGER(0x0afc, 12),
.trig = TRIGGER(0x0afc, 9),
.trig = TRIGGER(0x0afc, 10),
.trig = TRIGGER(0x0afc, 12),
.trig = TRIGGER(0x0afc, 11),
.trig = TRIGGER(0x0afc, 7),
.trig = TRIGGER(0x0afc, 5),
.trig = TRIGGER(0x0e04, 0),
.trig = TRIGGER(0x0afc, 5),
.trig = TRIGGER(0x0afc, 2),
.trig = TRIGGER(0x0afc, 3),
.trig = TRIGGER(0x0afc, 4),
.trig = TRIGGER(0x0afc, 5),
.trig = TRIGGER(0x0afc, 6),
.trig = TRIGGER(0x0afc, 8),
.trig = TRIGGER(0x0afc, 23),
.trig = TRIGGER(0x0afc, 24),
.trig = TRIGGER(0x0b00, 2),
.trig = TRIGGER(0x0afc, 15),
.trig = TRIGGER(0x0a40, 4),
.trig = TRIGGER(0x0a40, 0),
.trig = TRIGGER(0x0a40, 2),
.trig = TRIGGER(0x0e84, 1),
mbox_ctrl |= HINIC_MBOX_CTRL_SET(TRIGGER, TRIGGER_AEQE);
called = TRIGGER(1);
called += TRIGGER(2);
called += TRIGGER(3);