drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

525

REG_UPDATE(TMDS_CNTL, TMDS_PIXEL_ENCODING, 1);

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

528

REG_UPDATE(TMDS_CNTL, TMDS_PIXEL_ENCODING, 0);

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

535

REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 1);

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

538

REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 0);

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

286

SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

294

SE_SF(TMDS_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

303

SE_SF(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

313

SE_SF(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

480

uint8_t TMDS_PIXEL_ENCODING;

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

613

uint32_t TMDS_PIXEL_ENCODING;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

471

REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 1);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

474

REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 0);

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

279

SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

495

type TMDS_PIXEL_ENCODING;\

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h

172

SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h

170

SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.h

91

SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

221

REG_UPDATE(HDMI_CONTROL, TMDS_PIXEL_ENCODING, 1);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

224

REG_UPDATE(HDMI_CONTROL, TMDS_PIXEL_ENCODING, 0);

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h

171

SE_SF(DIG0_HDMI_CONTROL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

852

REG_UPDATE(HDMI_CONTROL, TMDS_PIXEL_ENCODING, 1);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

855

REG_UPDATE(HDMI_CONTROL, TMDS_PIXEL_ENCODING, 0);

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.h

93

SE_SF(DIG1_HDMI_CONTROL, TMDS_PIXEL_ENCODING, mask_sh),\

drivers/gpu/drm/amd/display/dc/dio/dcn42/dcn42_dio_stream_encoder.h

88

SE_SF(DIG1_HDMI_CONTROL, TMDS_PIXEL_ENCODING, mask_sh),\