Symbol: TRCCIDCCTLR0
drivers/hwtracing/coresight/coresight-etm4x-cfg.c
55
((offset >= TRCCIDCCTLR0) && (offset <= TRCVMIDCCTLR1))) {
drivers/hwtracing/coresight/coresight-etm4x-cfg.c
71
CHECKREG(TRCCIDCCTLR0, ctxid_mask0);
drivers/hwtracing/coresight/coresight-etm4x-core.c
1976
state->trccidcctlr0 = etm4x_read32(csa, TRCCIDCCTLR0);
drivers/hwtracing/coresight/coresight-etm4x-core.c
2099
etm4x_relaxed_write32(csa, state->trccidcctlr0, TRCCIDCCTLR0);
drivers/hwtracing/coresight/coresight-etm4x-core.c
583
etm4x_relaxed_write32(csa, config->ctxid_mask0, TRCCIDCCTLR0);
drivers/hwtracing/coresight/coresight-etm4x.h
478
CASE_##op((val), TRCCIDCCTLR0) \