drivers/gpu/drm/i915/display/intel_cmtg.c

114

cmtg_config->trans_a_secondary = intel_cmtg_transcoder_is_secondary(display, TRANSCODER_A);

drivers/gpu/drm/i915/display/intel_cmtg.c

134

intel_de_rmw(display, TRANS_DDI_FUNC_CTL2(display, TRANSCODER_A),

drivers/gpu/drm/i915/display/intel_ddi.c

3395

[PORT_B] = TRANSCODER_A,

drivers/gpu/drm/i915/display/intel_ddi.c

3398

[PORT_E] = TRANSCODER_A,

drivers/gpu/drm/i915/display/intel_ddi.c

3959

u32 transcoders = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |

drivers/gpu/drm/i915/display/intel_ddi.c

605

master = TRANSCODER_A;

drivers/gpu/drm/i915/display/intel_display.h

55

case TRANSCODER_A:

drivers/gpu/drm/i915/display/intel_display_device.c

1075

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),

drivers/gpu/drm/i915/display/intel_display_device.c

1139

[TRANSCODER_A] = PIPE_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

114

[TRANSCODER_A] = PIPE_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

1147

[TRANSCODER_A] = TRANSCODER_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

117

[TRANSCODER_A] = TRANSCODER_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

1170

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |

drivers/gpu/drm/i915/display/intel_display_device.c

122

[TRANSCODER_A] = PIPE_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

1236

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |

drivers/gpu/drm/i915/display/intel_display_device.c

126

[TRANSCODER_A] = TRANSCODER_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

1319

[TRANSCODER_A] = PIPE_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

132

[TRANSCODER_A] = PIPE_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

1325

[TRANSCODER_A] = TRANSCODER_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

1333

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \

drivers/gpu/drm/i915/display/intel_display_device.c

1361

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),

drivers/gpu/drm/i915/display/intel_display_device.c

137

[TRANSCODER_A] = TRANSCODER_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

144

[TRANSCODER_A] = PIPE_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

150

[TRANSCODER_A] = TRANSCODER_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

158

[TRANSCODER_A] = PIPE_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

163

[TRANSCODER_A] = TRANSCODER_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

1854

display_runtime->cpu_transcoder_mask &= ~BIT(TRANSCODER_A);

drivers/gpu/drm/i915/display/intel_display_device.c

243

BIT(TRANSCODER_A) | BIT(TRANSCODER_B)

drivers/gpu/drm/i915/display/intel_display_device.c

255

.__runtime_defaults.cpu_transcoder_mask = BIT(TRANSCODER_A)

drivers/gpu/drm/i915/display/intel_display_device.c

306

BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \

drivers/gpu/drm/i915/display/intel_display_device.c

395

BIT(TRANSCODER_A) | BIT(TRANSCODER_B)

drivers/gpu/drm/i915/display/intel_display_device.c

452

BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \

drivers/gpu/drm/i915/display/intel_display_device.c

481

BIT(TRANSCODER_A) | BIT(TRANSCODER_B),

drivers/gpu/drm/i915/display/intel_display_device.c

506

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),

drivers/gpu/drm/i915/display/intel_display_device.c

535

BIT(TRANSCODER_A) | BIT(TRANSCODER_B),

drivers/gpu/drm/i915/display/intel_display_device.c

583

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |

drivers/gpu/drm/i915/display/intel_display_device.c

636

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |

drivers/gpu/drm/i915/display/intel_display_device.c

656

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),

drivers/gpu/drm/i915/display/intel_display_device.c

680

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |

drivers/gpu/drm/i915/display/intel_display_device.c

830

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \

drivers/gpu/drm/i915/display/intel_display_device.c

881

[TRANSCODER_A] = PIPE_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

889

[TRANSCODER_A] = TRANSCODER_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

905

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \

drivers/gpu/drm/i915/display/intel_display_device.c

972

[TRANSCODER_A] = PIPE_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

980

[TRANSCODER_A] = TRANSCODER_A_OFFSET, \

drivers/gpu/drm/i915/display/intel_display_device.c

997

BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \

drivers/gpu/drm/i915/display/intel_display_device.h

272

DISPLAY_INFO((display))->trans_offsets[TRANSCODER_A] + \

drivers/gpu/drm/i915/display/intel_display_irq.c

2120

u32 trans_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |

drivers/gpu/drm/i915/display/intel_display_irq.c

2323

u32 trans_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |

drivers/gpu/drm/i915/display/intel_display_power.h

128

(enum intel_display_power_domain)((tran) - TRANSCODER_A + POWER_DOMAIN_TRANSCODER_A))

drivers/gpu/drm/i915/display/intel_display_regs.h

1460

#define DP_MST_DPT_DPTP_ALIGN_WA(trans) REG_BIT(9 + (trans) - TRANSCODER_A)

drivers/gpu/drm/i915/display/intel_display_regs.h

1461

#define DP_MST_SHORT_HBLANK_WA(trans) REG_BIT(5 + (trans) - TRANSCODER_A)

drivers/gpu/drm/i915/display/intel_display_regs.h

1462

#define DP_MST_FEC_BS_JITTER_WA(trans) REG_BIT(0 + (trans) - TRANSCODER_A)

drivers/gpu/drm/i915/display/intel_display_regs.h

1476

[TRANSCODER_A] = _CHICKEN_TRANS_A, \

drivers/gpu/drm/i915/display/intel_dp_hdcp.c

27

case TRANSCODER_A:

drivers/gpu/drm/i915/display/intel_hdcp.c

2295

case TRANSCODER_A ... TRANSCODER_D:

drivers/gpu/drm/i915/display/intel_hdcp.c

443

case TRANSCODER_A:

drivers/gpu/drm/i915/display/intel_psr.c

1152

return cpu_transcoder == TRANSCODER_A || cpu_transcoder == TRANSCODER_B;

drivers/gpu/drm/i915/display/intel_psr.c

1154

return cpu_transcoder == TRANSCODER_A;

drivers/gpu/drm/i915/display/intel_psr_regs.h

73

0 : ((trans) - TRANSCODER_A + 1) * 8)

drivers/gpu/drm/i915/display/intel_vdsc.c

32

if (DISPLAY_VER(display) == 11 && cpu_transcoder == TRANSCODER_A)

drivers/gpu/drm/i915/gvt/display.c

212

for (trans = TRANSCODER_A; trans <= TRANSCODER_EDP; trans++) {

drivers/gpu/drm/i915/gvt/display.c

217

vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) &=

drivers/gpu/drm/i915/gvt/display.c

265

vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

266

vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_STATE_ENABLE;

drivers/gpu/drm/i915/gvt/display.c

274

vgpu_vreg_t(vgpu, PIPE_DATA_M1(display, TRANSCODER_A)) = TU_SIZE(64);

drivers/gpu/drm/i915/gvt/display.c

275

vgpu_vreg_t(vgpu, PIPE_DATA_M1(display, TRANSCODER_A)) |= 0x5b425e;

drivers/gpu/drm/i915/gvt/display.c

276

vgpu_vreg_t(vgpu, PIPE_DATA_N1(display, TRANSCODER_A)) = 0x800000;

drivers/gpu/drm/i915/gvt/display.c

277

vgpu_vreg_t(vgpu, PIPE_LINK_M1(display, TRANSCODER_A)) = 0x3cd6e;

drivers/gpu/drm/i915/gvt/display.c

278

vgpu_vreg_t(vgpu, PIPE_LINK_N1(display, TRANSCODER_A)) = 0x80000;

drivers/gpu/drm/i915/gvt/display.c

331

TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) |=

drivers/gpu/drm/i915/gvt/display.c

362

TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) |=

drivers/gpu/drm/i915/gvt/display.c

411

vgpu_vreg_t(vgpu, PIPE_DATA_M1(display, TRANSCODER_A)) = TU_SIZE(64);

drivers/gpu/drm/i915/gvt/display.c

412

vgpu_vreg_t(vgpu, PIPE_DATA_M1(display, TRANSCODER_A)) |= 0x5b425e;

drivers/gpu/drm/i915/gvt/display.c

413

vgpu_vreg_t(vgpu, PIPE_DATA_N1(display, TRANSCODER_A)) = 0x800000;

drivers/gpu/drm/i915/gvt/display.c

414

vgpu_vreg_t(vgpu, PIPE_LINK_M1(display, TRANSCODER_A)) = 0x3cd6e;

drivers/gpu/drm/i915/gvt/display.c

415

vgpu_vreg_t(vgpu, PIPE_LINK_N1(display, TRANSCODER_A)) = 0x80000;

drivers/gpu/drm/i915/gvt/display.c

426

vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) &=

drivers/gpu/drm/i915/gvt/display.c

429

vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) |=

drivers/gpu/drm/i915/gvt/display.c

452

vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) &=

drivers/gpu/drm/i915/gvt/display.c

455

vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) |=

drivers/gpu/drm/i915/gvt/display.c

478

vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) &=

drivers/gpu/drm/i915/gvt/display.c

481

vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) |=

drivers/gpu/drm/i915/gvt/display.c

526

vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_ENABLE;

drivers/gpu/drm/i915/gvt/handlers.c

2300

MMIO_DH(TRANSCONF(display, TRANSCODER_A), D_ALL, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

675

port = (vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(display, TRANSCODER_A)) &

drivers/gpu/drm/i915/gvt/handlers.c

691

link_m = vgpu_vreg_t(vgpu, PIPE_LINK_M1(display, TRANSCODER_A));

drivers/gpu/drm/i915/gvt/handlers.c

692

link_n = vgpu_vreg_t(vgpu, PIPE_LINK_N1(display, TRANSCODER_A));

drivers/gpu/drm/i915/gvt/handlers.c

695

htotal = (vgpu_vreg_t(vgpu, TRANS_HTOTAL(display, TRANSCODER_A)) >> TRANS_HTOTAL_SHIFT);

drivers/gpu/drm/i915/gvt/handlers.c

696

vtotal = (vgpu_vreg_t(vgpu, TRANS_VTOTAL(display, TRANSCODER_A)) >> TRANS_VTOTAL_SHIFT);

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

1249

MMIO_D(HSW_TVIDEO_DIP_GCP(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

143

MMIO_D(TRANSCONF(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

244

MMIO_D(TRANS_HTOTAL(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

245

MMIO_D(TRANS_HBLANK(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

246

MMIO_D(TRANS_HSYNC(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

247

MMIO_D(TRANS_VTOTAL(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

248

MMIO_D(TRANS_VBLANK(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

249

MMIO_D(TRANS_VSYNC(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

250

MMIO_D(BCLRPAT(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

251

MMIO_D(TRANS_VSYNCSHIFT(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

252

MMIO_D(PIPESRC(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

279

MMIO_D(PIPE_DATA_M1(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

280

MMIO_D(PIPE_DATA_N1(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

281

MMIO_D(PIPE_DATA_M2(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

282

MMIO_D(PIPE_DATA_N2(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

283

MMIO_D(PIPE_LINK_M1(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

284

MMIO_D(PIPE_LINK_N1(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

285

MMIO_D(PIPE_LINK_M2(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

286

MMIO_D(PIPE_LINK_N2(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

505

MMIO_D(TRANS_CLK_SEL(TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

519

MMIO_D(TRANS_MULT(display, TRANSCODER_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

522

MMIO_D(HSW_TVIDEO_DIP_CTL(display, TRANSCODER_A));