drivers/gpu/drm/gma500/cdv_device.c

257

regs->saveBLC_PWM_CTL2 = REG_READ(BLC_PWM_CTL2);

drivers/gpu/drm/gma500/cdv_device.c

329

REG_WRITE(BLC_PWM_CTL2, regs->saveBLC_PWM_CTL2);

drivers/gpu/drm/gma500/cdv_device.c

72

return REG_READ(BLC_PWM_CTL2) & PWM_LEGACY_MODE;

drivers/gpu/drm/gma500/cdv_intel_dp.c

2024

pwm_ctrl = REG_READ(BLC_PWM_CTL2);

drivers/gpu/drm/gma500/cdv_intel_dp.c

2026

REG_WRITE(BLC_PWM_CTL2, pwm_ctrl);

drivers/gpu/drm/gma500/cdv_intel_lvds.c

638

pwm = REG_READ(BLC_PWM_CTL2);

drivers/gpu/drm/gma500/cdv_intel_lvds.c

644

REG_WRITE(BLC_PWM_CTL2, pwm);

drivers/gpu/drm/gma500/oaktrail_device.c

100

REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2)));

drivers/gpu/drm/gma500/oaktrail_device.c

179

regs->saveBLC_PWM_CTL2 = PSB_RVDC32(BLC_PWM_CTL2);

drivers/gpu/drm/gma500/oaktrail_device.c

303

PSB_WVDC32(regs->saveBLC_PWM_CTL2, BLC_PWM_CTL2);

drivers/gpu/drm/gma500/oaktrail_device.c

69

REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2)));

drivers/gpu/drm/i915/display/intel_backlight.c

1369

ctl2 = intel_de_read(display, BLC_PWM_CTL2);

drivers/gpu/drm/i915/display/intel_backlight.c

392

intel_de_rmw(display, BLC_PWM_CTL2, BLM_PWM_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_backlight.c

620

ctl2 = intel_de_read(display, BLC_PWM_CTL2);

drivers/gpu/drm/i915/display/intel_backlight.c

626

intel_de_write(display, BLC_PWM_CTL2, ctl2);

drivers/gpu/drm/i915/display/intel_backlight.c

641

intel_de_write(display, BLC_PWM_CTL2, ctl2);

drivers/gpu/drm/i915/display/intel_backlight.c

642

intel_de_posting_read(display, BLC_PWM_CTL2);

drivers/gpu/drm/i915/display/intel_backlight.c

643

intel_de_write(display, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);