BLC_PWM_CPU_CTL2
cpu_ctl2 = intel_de_read(display, BLC_PWM_CPU_CTL2);
intel_de_write(display, BLC_PWM_CPU_CTL2,
cpu_ctl2 = intel_de_read(display, BLC_PWM_CPU_CTL2);
tmp = intel_de_read(display, BLC_PWM_CPU_CTL2);
intel_de_write(display, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
intel_de_rmw(display, BLC_PWM_CPU_CTL2, BLM_PWM_ENABLE, 0);
cpu_ctl2 = intel_de_read(display, BLC_PWM_CPU_CTL2);
intel_de_write(display, BLC_PWM_CPU_CTL2, cpu_ctl2);
intel_de_write(display, BLC_PWM_CPU_CTL2, cpu_ctl2);
intel_de_posting_read(display, BLC_PWM_CPU_CTL2);
intel_de_write(display, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
intel_de_read(display, BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,
MMIO_D(BLC_PWM_CPU_CTL2);