drivers/gpu/drm/tidss/tidss_dispc.c

459

void __iomem *base_ovr[TIDSS_MAX_PORTS];

drivers/gpu/drm/tidss/tidss_dispc.c

460

void __iomem *base_vp[TIDSS_MAX_PORTS];

drivers/gpu/drm/tidss/tidss_dispc.c

464

struct clk *vp_clk[TIDSS_MAX_PORTS];

drivers/gpu/drm/tidss/tidss_dispc.c

472

struct dss_vp_data vp_data[TIDSS_MAX_PORTS];

drivers/gpu/drm/tidss/tidss_dispc.h

87

const char *vp_name[TIDSS_MAX_PORTS]; /* Should match dt reg names */

drivers/gpu/drm/tidss/tidss_dispc.h

88

const char *ovr_name[TIDSS_MAX_PORTS]; /* Should match dt reg names */

drivers/gpu/drm/tidss/tidss_dispc.h

89

const char *vpclk_name[TIDSS_MAX_PORTS]; /* Should match dt clk names */

drivers/gpu/drm/tidss/tidss_dispc.h

90

const enum dispc_vp_bus_type vp_bus_type[TIDSS_MAX_PORTS];

drivers/gpu/drm/tidss/tidss_drv.h

27

bool is_ext_vp_clk[TIDSS_MAX_PORTS];

drivers/gpu/drm/tidss/tidss_drv.h

31

struct drm_crtc *crtcs[TIDSS_MAX_PORTS];

drivers/gpu/drm/tidss/tidss_irq.h

36

(DSS_IRQ_VP_BIT_N(TIDSS_MAX_PORTS, 0) + 1 * (plane) + (bit))

drivers/gpu/drm/tidss/tidss_kms.c

142

struct pipe pipes[TIDSS_MAX_PORTS];